14 Jul, 2011

9 commits

  • This writes a new value to PC which was obtained as the result of an ARM
    ALU instruction. For ARMv7 and later this performs interworking.

    On ARM kernels we shouldn't encounter any ALU instructions trying to
    switch to Thumb mode so support for this isn't strictly necessary.
    However, the approach taken in all other instruction decoding is for us
    to avoid unpredictable modification of the PC for security reasons. This
    is usually achieved by rejecting insertion of probes on problematic
    instruction, but for ALU instructions we can't do this as it depends on
    the contents of the CPU registers at the time the probe is hit. So, as
    we require some form of run-time checking to trap undesirable PC
    modification, we may as well simulate the instructions correctly, i.e.
    in the way they would behave in the absence of a probe.

    Signed-off-by: Jon Medhurst
    Acked-by: Nicolas Pitre

    Jon Medhurst
     
  • This patch improves the performance of LDM and STM instruction
    emulation. This is desirable because.

    - jprobes and kretprobes probe the first instruction in a function and,
    when the frame pointer is omitted, this instruction is often a STM
    used to push registers onto the stack.

    - The STM and LDM instructions are common in the body and tail of
    functions.

    - At the same time as being a common instruction form, they also have
    one of the slowest and most complicated simulation routines.

    The approach taken to optimisation is to use emulation rather than
    simulation, that is, a modified form of the instruction is run with
    an appropriate register context.

    Benchmarking on an OMAP3530 shows the optimised emulation is between 2
    and 3 times faster than the simulation routines. On a Kirkwood based
    device the relative performance was very significantly better than this.

    Signed-off-by: Jon Medhurst
    Acked-by: Nicolas Pitre

    Jon Medhurst
     
  • The encoding of these instructions is substantially the same for both
    ARM and Thumb, so we can have common decoding and simulation functions.

    This patch moves the simulation functions from kprobes-arm.c to
    kprobes-common.c. It also adds a new simulation function
    (simulate_ldm1_pc) for the case where we load into PC because this may
    need to interwork.

    The instruction decoding is done by a custom function
    (kprobe_decode_ldmstm) rather than just relying on decoding table
    entries because we will later be adding optimisation code.

    Signed-off-by: Jon Medhurst
    Acked-by: Nicolas Pitre

    Jon Medhurst
     
  • This writes a value to PC which was obtained as the result of a
    LDR or LDM instruction. For ARMv5T and later this must perform
    interworking.

    Signed-off-by: Jon Medhurst
    Acked-by: Nicolas Pitre

    Jon Medhurst
     
  • For hints which may have observable effects, like SEV (send event), we
    use kprobe_emulate_none which emulates the hint by executing the
    original instruction.

    For NOP we simulate the instruction using kprobe_simulate_nop, which
    does nothing. As probes execute with interrupts disabled this is also
    used for hints which may block for an indefinite time, like WFE (wait
    for event).

    Signed-off-by: Jon Medhurst
    Acked-by: Nicolas Pitre

    Jon Medhurst
     
  • The existing ARM instruction decoding functions are a mass of if/else
    code. Rather than follow this pattern for Thumb instruction decoding
    this patch implements an infrastructure for a new table driven scheme.

    This has several advantages:

    - Reduces the kernel size by approx 2kB. (The ARM instruction decoding
    will eventually have -3.1kB code, +1.3kB data; with similar or better
    estimated savings for Thumb decoding.)

    - Allows programmatic checking of decoding consistency and test case
    coverage.

    - Provides more uniform source code and is therefore, arguably, clearer.

    For a detailed explanation of how decoding tables work see the in-source
    documentation in kprobes.h, and also for kprobe_decode_insn().

    Signed-off-by: Jon Medhurst
    Acked-by: Nicolas Pitre

    Jon Medhurst
     
  • The str_pc_offset value is architecturally defined on ARMv7 onwards so
    we can make it a compile time constant. This means on Thumb kernels the
    runtime checking code isn't needed, which saves us from having to fix it
    to work for Thumb.

    Signed-off-by: Jon Medhurst
    Acked-by: Nicolas Pitre

    Jon Medhurst
     
  • Move str_pc_offset into kprobes-common.c as it will be needed by common
    code later.

    Signed-off-by: Jon Medhurst
    Acked-by: Nicolas Pitre

    Jon Medhurst
     
  • This file will contain the instruction decoding and emulation code
    which is common to both ARM and Thumb instruction sets.

    For now, we will just move over condition_checks from kprobes-arm.c
    This table is also renamed to kprobe_condition_checks to avoid polluting
    the public namespace with a too generic name.

    Signed-off-by: Jon Medhurst
    Acked-by: Nicolas Pitre

    Jon Medhurst