27 Feb, 2010
1 commit
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Because the VIA SuperIO chip only decodes 24 bits of address space but port
address space currently being configured as 32MB there is the theoretical
possibility of aliases within the I/O port address range.The complicated solution is to reserve all address range that potencially
could cause such aliases. But with the PCI spec limiting port allocations
for devices to a maximum of 256 bytes 16MB of port address space already is
way more than one would ever expect to be used so we just reduce the port
space to 16MB.Signed-off-by: Ralf Baechle
To: Yoichi Yuasa
Cc: Bjorn Helgaas
Cc: linux-mips@linux-mips.org
Cc: Benjamin Herrenschmidt
Patchwork: http://patchwork.linux-mips.org/patch/995/
27 Jun, 2007
1 commit
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Signed-off-by: Yoichi Yuasa
Signed-off-by: Ralf Baechle
27 Apr, 2007
2 commits
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This patch has merged GT64111 PCI routines and GT64120 PCI_0 routines.
GT64111 PCI is almost the same as GT64120's PCI_0.
This patch don't change GT64120 PCI routines.Signed-off-by: Yoichi Yuasa
Signed-off-by: Ralf Baechle -
It's removed #ifdef CONFIG_PCI/#endif from cobalt setup.c .
Signed-off-by: Yoichi Yuasa
Signed-off-by: Ralf Baechle