10 Sep, 2009

1 commit

  • * topic/asoc: (226 commits)
    ASoC: au1x: PSC-AC97 bugfixes
    ASoC: Fix WM835x Out4 capture enumeration
    ASoC: Remove unuused hw_read_t
    ASoC: fix pxa2xx-ac97.c breakage
    ASoC: Fully specify DC servo bits to update in wm_hubs
    ASoC: Debugged improper setting of PLL fields in WM8580 driver
    ASoC: new board driver to connect bfin-5xx with ad1836 codec
    ASoC: OMAP: Add functionality to set CLKR and FSR sources in McBSP DAI
    ASoC: davinci: i2c device creation moved into board files
    ASoC: Don't reconfigure WM8350 FLL if not needed
    ASoC: Fix s3c-i2s-v2 build
    ASoC: Make platform data optional for TLV320AIC3x
    ASoC: Add S3C24xx dependencies for Simtec machines
    ASoC: SDP3430: Fix TWL GPIO6 pin mux request
    ASoC: S3C platform: Fix s3c2410_dma_started() called at improper time
    ARM: OMAP: McBSP: Merge two functions into omap_mcbsp_start/_stop
    ASoC: OMAP: Fix setup of XCCR and RCCR registers in McBSP DAI
    OMAP: McBSP: Use textual values in DMA operating mode sysfs files
    ARM: OMAP: DMA: Add support for DMA channel self linking on OMAP1510
    ASoC: Select core DMA when building for S3C64xx
    ...

    Takashi Iwai
     

06 Sep, 2009

4 commits


04 Sep, 2009

1 commit

  • Functions invoked early when booting up a cpu can't use
    tracing because mcount requires a valid 'current_thread_info()'
    and TLB mappings to be setup.

    The code path of sun4v_register_mondo_queues --> register_one_mondo
    is one such case. sun4v_register_mondo_queues already has the
    necessary 'notrace' annotation, but register_one_mondo does not.

    Normally register_one_mondo is inlined so the bug doesn't trigger,
    but with some config/compiler combinations, it won't be so we
    must properly mark it notrace.

    While we're here, add 'notrace' annoations to prom_printf and
    prom_halt so that early error handling won't have the same problem.

    Reported-by: Alexander Beregalov
    Reported-by: Leif Sawyer
    Signed-off-by: David S. Miller

    David S. Miller
     

03 Sep, 2009

4 commits

  • This is a compromise and a temporary workaround for bootup NMI
    watchdog triggers some people see with qla2xxx devices present.

    This happens when, for example:

    CPU 0 is in the driver init and looping submitting mailbox commands to
    load the firmware, then waiting for completion.

    CPU 1 is receiving the device interrupts. CPU 1 is where the NMI
    watchdog triggers.

    CPU 0 is submitting mailbox commands fast enough that by the time CPU
    1 returns from the device interrupt handler, a new one is pending.
    This sequence runs for more than 5 seconds.

    The problematic case is CPU 1's timer interrupt running when the
    barrage of device interrupts begin. Then we have:

    timer interrupt
    return for softirq checking
    pending, thus enable interrupts

    qla2xxx interrupt
    return
    qla2xxx interrupt
    return
    ... 5+ seconds pass
    final qla2xxx interrupt for fw load
    return

    run timer softirq
    return

    At some point in the multi-second qla2xxx interrupt storm we trigger
    the NMI watchdog on CPU 1 from the NMI interrupt handler.

    The timer softirq, once we get back to running it, is smart enough to
    run the timer work enough times to make up for the missed timer
    interrupts.

    However, the NMI watchdogs (both x86 and sparc) use the timer
    interrupt count to notice the cpu is wedged. But in the above
    scenerio we'll receive only one such timer interrupt even if we last
    all the way back to running the timer softirq.

    The default watchdog trigger point is only 5 seconds, which is pretty
    low (the softwatchdog triggers at 60 seconds). So increase it to 30
    seconds for now.

    Signed-off-by: David S. Miller

    David S. Miller
     
  • I had the codes for L1 D-cache load accesses and misses swapped
    around, and the wrong codes for LL-cache accesses and misses.
    This corrects them.

    Reported-by: Corey Ashford
    Signed-off-by: Paul Mackerras
    Cc: Peter Zijlstra
    Cc:
    LKML-Reference:
    Signed-off-by: Ingo Molnar

    Paul Mackerras
     
  • The 32-bit parameters (len and csum) of csum_ipv6_magic() are passed in 64-bit
    registers in2 and in4. The high order 32 bits of the registers were never
    cleared, and garbage was sometimes calculated into the checksum.

    Fix this by clearing the high order 32 bits of these registers.

    Signed-off-by: Jiri Bohac
    Signed-off-by: Tony Luck

    Jiri Bohac
     
  • arch/ia64/kernel/dma-mapping.c:14: warning: control reaches end of non-void function
    arch/ia64/kernel/dma-mapping.c:14: warning: no return statement in function returning non-void

    This warning was introduced by commit: 390bd132b2831a2ad0268e84bffbfc0680debfe5
    Add dma_debug_init() for ia64

    Signed-off-by: Tony Luck

    Luck, Tony
     

29 Aug, 2009

2 commits

  • On Tue, Aug 18, 2009 at 01:45:17PM -0400, John David Anglin wrote:
    > CC arch/parisc/kernel/traps.o
    > arch/parisc/kernel/traps.c: In function 'handle_interruption':
    > arch/parisc/kernel/traps.c:535:18: warning: operation on 'regs->iasq[0]'
    > may be undefined

    Yes - Line 535 should use both [0] and [1].

    Reported-by: John David Anglin
    Signed-off-by: Grant Grundler
    Signed-off-by: Kyle McMartin
    Signed-off-by: Linus Torvalds

    Grant Grundler
     
  • …git/tip/linux-2.6-tip

    * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
    x86: Fix vSMP boot crash
    x86, xen: Initialize cx to suppress warning
    x86, xen: Suppress WP test on Xen

    Linus Torvalds
     

27 Aug, 2009

7 commits


26 Aug, 2009

7 commits

  • 2.6.31-rc7 does not boot on vSMP systems:

    [ 8.501108] CPU31: Thermal monitoring enabled (TM1)
    [ 8.501127] CPU 31 MCA banks SHD:2 SHD:3 SHD:5 SHD:6 SHD:8
    [ 8.650254] CPU31: Intel(R) Xeon(R) CPU E5540 @ 2.53GHz stepping 04
    [ 8.710324] Brought up 32 CPUs
    [ 8.713916] Total of 32 processors activated (162314.96 BogoMIPS).
    [ 8.721489] ERROR: parent span is not a superset of domain->span
    [ 8.727686] ERROR: domain->groups does not contain CPU0
    [ 8.733091] ERROR: groups don't span domain->span
    [ 8.737975] ERROR: domain->cpu_power not set
    [ 8.742416]

    Ravikiran Thirumalai bisected it to:

    | commit 2759c3287de27266e06f1f4e82cbd2d65f6a044c
    | x86: don't call read_apic_id if !cpu_has_apic

    The problem is that on vSMP systems the CPUID derived
    initial-APICIDs are overlapping - so we need to fall
    back on hard_smp_processor_id() which reads the local
    APIC.

    Both come from the hardware (influenced by firmware
    though) so it's a tough call which one to trust.

    Doing the quirk expresses the vSMP property properly
    and also does not affect other systems, so we go for
    this solution instead of a revert.

    Reported-and-Tested-by: Ravikiran Thirumalai
    Signed-off-by: Yinghai Lu
    Cc: Linus Torvalds
    Cc: Cyrill Gorcunov
    Cc: Shai Fultheim
    Cc: Suresh Siddha
    LKML-Reference:
    Signed-off-by: Ingo Molnar

    Yinghai Lu
     
  • * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
    sparc64: Validate linear D-TLB misses.
    sparc64: Update defconfig.
    sparc32: Update defconfig.
    sparc32: Kill trap table freeing code.
    sparc: sys32.S incorrect compat-layer splice() system call
    sparc: Use page_fault_out_of_memory() for VM_FAULT_OOM.
    sparc64: Sign extend length arg to truncate syscalls when compat.
    sparc: Fix cleanup crash in bbc_envctrl_cleanup()

    Linus Torvalds
     
  • Initialize cx before calling xen_cpuid(), in order to suppress the
    "may be used uninitialized in this function" warning.

    Signed-off-by: H. Peter Anvin
    Cc: Jeremy Fitzhardinge

    H. Peter Anvin
     
  • Xen always runs on CPUs which properly support WP enforcement in
    privileged mode, so there's no need to test for it.

    This also works around a crash reported by Arnd Hannemann, though I
    think its just a band-aid for that case.

    Reported-by: Arnd Hannemann
    Signed-off-by: Jeremy Fitzhardinge
    Acked-by: Pekka Enberg
    Signed-off-by: H. Peter Anvin

    Jeremy Fitzhardinge
     
  • When page alloc debugging is not enabled, we essentially accept any
    virtual address for linear kernel TLB misses. But with kgdb, kernel
    address probing, and other facilities we can try to access arbitrary
    crap.

    So, make sure the address we miss on will translate to physical memory
    that actually exists.

    In order to make this work we have to embed the valid address bitmap
    into the kernel image. And in order to make that less expensive we
    make an adjustment, in that the max physical memory address is
    decreased to "1 << 41", even on the chips that support a 42-bit
    physical address space. We can do this because bit 41 indicates
    "I/O space" and thus covers non-memory ranges.

    The result of this is that:

    1) kpte_linear_bitmap shrinks from 2K to 1K in size

    2) we need 64K more for the valid address bitmap

    We can't let the valid address bitmap be dynamically allocated
    once we start using it to validate TLB misses, otherwise we have
    crazy issues to deal with wrt. recursive TLB misses and such.

    If we're in a TLB miss it could be the deepest trap level that's legal
    inside of the cpu. So if we TLB miss referencing the bitmap, the cpu
    will be out of trap levels and enter RED state.

    To guard against out-of-range accesses to the bitmap, we have to check
    to make sure no bits in the physical address above bit 40 are set. We
    could export and use last_valid_pfn for this check, but that's just an
    unnecessary extra memory reference.

    On the plus side of all this, since we load all of these translations
    into the special 4MB mapping TSB, and we check the TSB first for TLB
    misses, there should be absolutely no real cost for these new checks
    in the TLB miss path.

    Reported-by: heyongli@gmail.com
    Signed-off-by: David S. Miller

    David S. Miller
     
  • …el/git/tip/linux-2.6-tip

    * 'timers-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
    clockevent: Prevent dead lock on clockevents_lock
    timers: Drop write permission on /proc/timer_list

    Linus Torvalds
     
  • …git/tip/linux-2.6-tip

    * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
    x86: Fix build with older binutils and consolidate linker script
    x86: Fix an incorrect argument of reserve_bootmem()
    x86: add vmlinux.lds to targets in arch/x86/boot/compressed/Makefile
    xen: rearrange things to fix stackprotector
    x86: make sure load_percpu_segment has no stackprotector
    i386: Fix section mismatches for init code with !HOTPLUG_CPU
    x86, pat: Allow ISA memory range uncacheable mapping requests

    Linus Torvalds
     

25 Aug, 2009

7 commits

  • binutils prior to 2.17 can't deal with the currently possible
    situation of a new segment following the per-CPU segment, but
    that new segment being empty - objcopy misplaces the .bss (and
    perhaps also the .brk) sections outside of any segment.

    However, the current ordering of sections really just appears
    to be the effect of cumulative unrelated changes; re-ordering
    things allows to easily guarantee that the segment following
    the per-CPU one is non-empty, and at once eliminates the need
    for the bogus data.init2 segment.

    Once touching this code, also use the various data section
    helper macros from include/asm-generic/vmlinux.lds.h.

    -v2: fix !SMP builds.

    Signed-off-by: Jan Beulich
    Cc:
    LKML-Reference:
    Signed-off-by: Ingo Molnar

    Jan Beulich
     
  • Functionality of functions omap_mcbsp_xmit_enable and omap_mcbsp_recv_enable
    can be merged into omap_mcbsp_start and omap_mcbsp_stop since API of
    those omap_mcbsp_start and omap_mcbsp_stop was changed recently allowing
    to start and stop individually the transmitter and receiver.

    This cleans up the code in arch/arm/plat-omap/mcbsp.c and in
    sound/soc/omap/omap-mcbsp.c which was the only user for those removed
    functions.

    Signed-off-by: Jarkko Nikula
    Acked-by: Eero Nurkkala
    Cc: Peter Ujfalusi
    Signed-off-by: Mark Brown

    Jarkko Nikula
     
  • Use more descriptive than numerical value when showing and storing the
    McBSP DMA operating mode. Show function is using similar syntax than e.g.
    the led triggers so that all possible values for store function are
    printed but with current value surrounded with square brackets.

    Signed-off-by: Jarkko Nikula
    Cc: Peter Ujfalusi
    Acked-by: Eduardo Valentin
    Signed-off-by: Mark Brown

    Jarkko Nikula
     
  • Implement DMA channel self linking on OMAP1510 using AUTO_INIT and REPEAT
    flags of the DMA CCR register.

    Created against linux-2.6.31-rc5.

    Tested on Amstrad Delta.

    Signed-off-by: Janusz Krzysztofik
    Acked-by: Tony Lindgren
    Signed-off-by: Mark Brown

    Janusz Krzysztofik
     
  • * 'fixes' of git://git.marvell.com/orion:
    [ARM] Orion NAND: Make asm volatile avoid GCC pushing ldrd out of the loop
    [ARM] Kirkwood: enable eSATA on QNAP TS-219P
    [ARM] Kirkwood: __init requires linux/init.h

    Linus Torvalds
     
  • * git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6:
    favr32: improve touchscreen response
    avr32/lib: fix unaligned memcpy where len < 4
    avr32/lib: fix unaligned memcpy()

    Linus Torvalds
     
  • This line looks suspicious, because if this is true, then the
    'flags' parameter of function reserve_bootmem_generic() will be
    unused when !CONFIG_NUMA. I don't think this is what we want.

    Signed-off-by: WANG Cong
    Cc: Yinghai Lu
    Cc: akpm@linux-foundation.org
    LKML-Reference:
    Signed-off-by: Ingo Molnar

    Amerigo Wang
     

24 Aug, 2009

3 commits

  • Initialize PCI/PCIe on the QNAP TS-119, TS-219 and TS-219P hardware
    allowing the use of the discrete eSATA controller connected to the PCIe
    bus in the TS-219P.

    Signed-off-by: John Holland
    Tested-by: Thomas Reitmayr
    Signed-off-by: Martin Michlmayr
    Signed-off-by: Nicolas Pitre

    John Holland
     
  • Include linux/init.h for __init to fix this error:

    CC [M] drivers/net/wireless/wl12xx/boot.o
    In file included from arch/arm/mach-kirkwood/include/mach/gpio.h:13,
    from arch/arm/include/asm/gpio.h:5,
    from include/linux/gpio.h:7,
    from drivers/net/wireless/wl12xx/boot.c:24:
    arch/arm/plat-orion/include/plat/gpio.h:32: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘orion_gpio_init’
    make[6]: *** [drivers/net/wireless/wl12xx/boot.o] Error 1
    make[5]: *** [drivers/net/wireless/wl12xx] Error 2

    Signed-off-by: Martin Michlmayr
    Signed-off-by: Nicolas Pitre

    Martin Michlmayr
     
  • setup_arch() unconditionally sets the preferred console to ttyS.
    This breaks the use of 3270 devices as the console. Provide a new
    function to set the default preferred console for s390. The preferred
    console depends on the conmode parameter that is used to switch
    between 3270 and 3215 terminal/console mode.

    Signed-off-by: Hendrik Brueckner
    Signed-off-by: Martin Schwidefsky

    Hendrik Brueckner
     

22 Aug, 2009

2 commits

  • As noted in 83d349f35e1ae72268c5104dbf9ab2ae635425d4 ("x86: don't send
    an IPI to the empty set of CPU's"), some APIC's will be very unhappy
    with an empty destination mask. That commit added a WARN_ON() for that
    case, and avoided the resulting problem, but didn't fix the underlying
    reason for why those empty mask cases happened.

    This fixes that, by checking the result of 'cpumask_andnot()' of the
    current CPU actually has any other CPU's left in the set of CPU's to be
    sent a TLB flush, and not calling down to the IPI code if the mask is
    empty.

    The reason this started happening at all is that we started passing just
    the CPU mask pointers around in commit 4595f9620 ("x86: change
    flush_tlb_others to take a const struct cpumask"), and when we did that,
    the cpumask was no longer thread-local.

    Before that commit, flush_tlb_mm() used to create it's own copy of
    'mm->cpu_vm_mask' and pass that copy down to the low-level flush
    routines after having tested that it was not empty. But after changing
    it to just pass down the CPU mask pointer, the lower level TLB flush
    routines would now get a pointer to that 'mm->cpu_vm_mask', and that
    could still change - and become empty - after the test due to other
    CPU's having flushed their own TLB's.

    See

    http://bugzilla.kernel.org/show_bug.cgi?id=13933

    for details.

    Tested-by: Thomas Björnell
    Cc: stable@kernel.org
    Signed-off-by: Linus Torvalds

    Linus Torvalds
     
  • The default_send_IPI_mask_logical() function uses the "flat" APIC mode
    to send an IPI to a set of CPU's at once, but if that set happens to be
    empty, some older local APIC's will apparently be rather unhappy. So
    just warn if a caller gives us an empty mask, and ignore it.

    This fixes a regression in 2.6.30.x, due to commit 4595f9620 ("x86:
    change flush_tlb_others to take a const struct cpumask"), documented
    here:

    http://bugzilla.kernel.org/show_bug.cgi?id=13933

    which causes a silent lock-up. It only seems to happen on PPro, P2, P3
    and Athlon XP cores. Most developers sadly (or not so sadly, if you're
    a developer..) have more modern CPU's. Also, on x86-64 we don't use the
    flat APIC mode, so it would never trigger there even if the APIC didn't
    like sending an empty IPI mask.

    Reported-by: Pavel Vilim
    Reported-and-tested-by: Thomas Björnell
    Reported-and-tested-by: Martin Rogge
    Cc: Mike Travis
    Cc: Ingo Molnar
    Cc: stable@kernel.org
    Signed-off-by: Linus Torvalds

    Linus Torvalds
     

21 Aug, 2009

2 commits