19 Jun, 2019
1 commit
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Based on 1 normalized pattern(s):
gplv2 only
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4 file(s).
Signed-off-by: Thomas Gleixner
Reviewed-by: Kate Stewart
Reviewed-by: Enrico Weigelt
Reviewed-by: Armijn Hemel
Reviewed-by: Allison Randal
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.666840552@linutronix.de
Signed-off-by: Greg Kroah-Hartman
31 May, 2019
1 commit
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Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of version 2 of the gnu general public license as
published by the free software foundationextracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 107 file(s).
Signed-off-by: Thomas Gleixner
Reviewed-by: Allison Randal
Reviewed-by: Richard Fontana
Reviewed-by: Steve Winslow
Reviewed-by: Alexios Zavras
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528171438.615055994@linutronix.de
Signed-off-by: Greg Kroah-Hartman
24 Nov, 2018
1 commit
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This patch for the DesignWare AHB Central
Direct Memory Access Controller adds the dma
protection control property:
"snps,dma-protection-control"as well as the properties specific values defines into
a new include file: include/dt-bindings/dma/dw-dmac.hNote: The protection control signals are one-to-one
mapped to the AHB HPROT[1:3] signals for this controller.
The HPROT0 (Data Access) is always hardwired to 1.Reviewed-by: Andy Shevchenko
Reviewed-by: Rob Herring
Signed-off-by: Christian Lamparter
Signed-off-by: Vinod Koul
02 May, 2018
1 commit
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Add the devicetree node to support the DMA controller found
in JZ480 SoCs.Tested-by: Mathieu Malaterre
Acked-by: James Hogan
Signed-off-by: Ezequiel Garcia
Signed-off-by: Ulf Hansson
23 Aug, 2015
1 commit
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Add the devicetree descriptor for the Analog Devices AXI-DMAC DMA
controller. This is a soft peripheral used in FPGAs and the bindings
describe how it is connected to the system (clock, interrupt, memory map)
as well as the configuration options that were used when the peripheral was
instantiated.Signed-off-by: Lars-Peter Clausen
Signed-off-by: Vinod Koul
19 Aug, 2015
1 commit
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The header just includes definitions of hardware-specific numbers which
can be written directly in the device tree, there's no need for a public
header containing these definitions.Signed-off-by: Alex Smith
Cc: Vinod Koul
Cc: Zubair Lutfullah Kakakhel
Cc: dmaengine@vger.kernel.org
Signed-off-by: Vinod Koul
01 Apr, 2015
1 commit
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This patch adds a driver for the DMA controller found in the Ingenic
JZ4780.It currently does not implement any support for the programmable firmware
feature of the controller - this is not necessary for most uses. It also
does not take priority into account when allocating channels, it just
allocates the first available channel. This can be implemented later.Signed-off-by: Alex Smith
Signed-off-by: Zubair Lutfullah Kakakhel
[Updated for dmaengine api changes, Add residue support, couple of minor fixes]
Signed-off-by: Vinod Koul
21 Jan, 2015
1 commit
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The DMA engine for the A10/A20 and derivatives require an opaque extra
argument.Add a dt-bindings header, and convert the device trees to it.
Signed-off-by: Maxime Ripard
06 Nov, 2014
1 commit
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New atmel DMA controller known as XDMAC, introduced with SAMA5D4
devices.Signed-off-by: Ludovic Desroches
Acked-by: Nicolas Ferre
Signed-off-by: Vinod Koul
04 Aug, 2014
1 commit
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The nbpfaxi dmaengine driver doesn't define any new bindings, it only
uses standard dmaengine bindings and defines 3 flags for the 3rd parameter
of the "dmas" property.Signed-off-by: Guennadi Liakhovetski
Acked-by: Arnd Bergmann
Signed-off-by: Vinod Koul
15 Jun, 2013
1 commit
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DMA-cell content is a concatenation of several values. In order to keep this
stuff human readable, macros are introduced.The values for the FIFO configuration are not the same as the ones used in the
configuration register in order to keep backward compatibility. Most devices
use the half FIFO configuration but USART ones have to use the ASAP
configuration. This parameter was not initially planed to be into the at91 dma
dt binding. The third cell will be used to store this parameter, it will
become a concatenation of the FIFO configuration and of the peripheral ID. In
order to keep backward compatibility i.e. FIFO configuration is equal to 0, we
have to perform a translation since the value to put in the register to set
half FIFO is 1.Acked-by: Arnd Bergmann
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Ludovic Desroches
Signed-off-by: Nicolas Ferre