15 Jan, 2012

1 commit

  • * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (119 commits)
    MIPS: Delete unused function add_temporary_entry.
    MIPS: Set default pci cache line size.
    MIPS: Flush huge TLB
    MIPS: Octeon: Remove SYS_SUPPORTS_HIGHMEM.
    MIPS: Octeon: Add support for OCTEON II PCIe
    MIPS: Octeon: Update PCI Latency timer and enable more error reporting.
    MIPS: Alchemy: Update cpu-feature-overrides
    MIPS: Alchemy: db1200: Improve PB1200 detection.
    MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.
    MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controller
    MIPS: Alchemy: irq: register pm at irq init time
    MIPS: Alchemy: Touchscreen support on DB1100
    MIPS: Alchemy: Hook up IrDA on DB1000/DB1100
    net/irda: convert au1k_ir to platform driver.
    MIPS: Alchemy: remove unused board headers
    MTD: nand: make au1550nd.c a platform_driver
    MIPS: Netlogic: Mark Netlogic chips as SMT capable
    MIPS: Netlogic: Add support for XLP 3XX cores
    MIPS: Netlogic: Merge some of XLR/XLP wakup code
    MIPS: Netlogic: Add default XLP config.
    ...

    Fix up trivial conflicts in arch/mips/kernel/{perf_event_mipsxx.c,
    traps.c} and drivers/tty/serial/Makefile

    Linus Torvalds
     

13 Jan, 2012

2 commits

  • Use the more commonly used __noreturn instead of ATTRIB_NORETURN.

    [akpm@linux-foundation.org: coding-style fixes]
    Signed-off-by: Joe Perches
    Cc: Ingo Molnar
    Cc: Peter Zijlstra
    Cc: Haavard Skinnemoen
    Cc: Hans-Christian Egtvedt
    Cc: Tony Luck
    Cc: Fenghua Yu
    Acked-by: Geert Uytterhoeven
    Acked-by: Ralf Baechle
    Cc: Benjamin Herrenschmidt
    Cc: Paul Mackerras
    Cc: Martin Schwidefsky
    Cc: Heiko Carstens
    Cc: Chris Metcalf
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Joe Perches
     
  • It's a very old and now unused prototype marking so just delete it.

    Neaten panic pointer argument style to keep checkpatch quiet.

    Signed-off-by: Joe Perches
    Cc: Ingo Molnar
    Cc: Peter Zijlstra
    Cc: Haavard Skinnemoen
    Cc: Hans-Christian Egtvedt
    Cc: Tony Luck
    Cc: Fenghua Yu
    Acked-by: Geert Uytterhoeven
    Acked-by: Ralf Baechle
    Cc: Benjamin Herrenschmidt
    Cc: Paul Mackerras
    Cc: Martin Schwidefsky
    Cc: Heiko Carstens
    Cc: Chris Metcalf
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Joe Perches
     

11 Jan, 2012

3 commits


07 Jan, 2012

1 commit

  • * 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (64 commits)
    cpu: Export cpu_up()
    rcu: Apply ACCESS_ONCE() to rcu_boost() return value
    Revert "rcu: Permit rt_mutex_unlock() with irqs disabled"
    docs: Additional LWN links to RCU API
    rcu: Augment rcu_batch_end tracing for idle and callback state
    rcu: Add rcutorture tests for srcu_read_lock_raw()
    rcu: Make rcutorture test for hotpluggability before offlining CPUs
    driver-core/cpu: Expose hotpluggability to the rest of the kernel
    rcu: Remove redundant rcu_cpu_stall_suppress declaration
    rcu: Adaptive dyntick-idle preparation
    rcu: Keep invoking callbacks if CPU otherwise idle
    rcu: Irq nesting is always 0 on rcu_enter_idle_common
    rcu: Don't check irq nesting from rcu idle entry/exit
    rcu: Permit dyntick-idle with callbacks pending
    rcu: Document same-context read-side constraints
    rcu: Identify dyntick-idle CPUs on first force_quiescent_state() pass
    rcu: Remove dynticks false positives and RCU failures
    rcu: Reduce latency of rcu_prepare_for_idle()
    rcu: Eliminate RCU_FAST_NO_HZ grace-period hang
    rcu: Avoid needlessly IPIing CPUs at GP end
    ...

    Linus Torvalds
     

20 Dec, 2011

1 commit


12 Dec, 2011

3 commits

  • Those two APIs were provided to optimize the calls of
    tick_nohz_idle_enter() and rcu_idle_enter() into a single
    irq disabled section. This way no interrupt happening in-between would
    needlessly process any RCU job.

    Now we are talking about an optimization for which benefits
    have yet to be measured. Let's start simple and completely decouple
    idle rcu and dyntick idle logics to simplify.

    Signed-off-by: Frederic Weisbecker
    Cc: Ingo Molnar
    Cc: Thomas Gleixner
    Cc: Peter Zijlstra
    Reviewed-by: Josh Triplett
    Signed-off-by: Paul E. McKenney

    Frederic Weisbecker
     
  • It is assumed that rcu won't be used once we switch to tickless
    mode and until we restart the tick. However this is not always
    true, as in x86-64 where we dereference the idle notifiers after
    the tick is stopped.

    To prepare for fixing this, add two new APIs:
    tick_nohz_idle_enter_norcu() and tick_nohz_idle_exit_norcu().

    If no use of RCU is made in the idle loop between
    tick_nohz_enter_idle() and tick_nohz_exit_idle() calls, the arch
    must instead call the new *_norcu() version such that the arch doesn't
    need to call rcu_idle_enter() and rcu_idle_exit().

    Otherwise the arch must call tick_nohz_enter_idle() and
    tick_nohz_exit_idle() and also call explicitly:

    - rcu_idle_enter() after its last use of RCU before the CPU is put
    to sleep.
    - rcu_idle_exit() before the first use of RCU after the CPU is woken
    up.

    Signed-off-by: Frederic Weisbecker
    Cc: Mike Frysinger
    Cc: Guan Xuetao
    Cc: David Miller
    Cc: Chris Metcalf
    Cc: Hans-Christian Egtvedt
    Cc: Ralf Baechle
    Cc: Paul E. McKenney
    Cc: Ingo Molnar
    Cc: Peter Zijlstra
    Cc: Thomas Gleixner
    Cc: H. Peter Anvin
    Cc: Russell King
    Cc: Paul Mackerras
    Cc: Heiko Carstens
    Cc: Paul Mundt
    Signed-off-by: Paul E. McKenney

    Frederic Weisbecker
     
  • The tick_nohz_stop_sched_tick() function, which tries to delay
    the next timer tick as long as possible, can be called from two
    places:

    - From the idle loop to start the dytick idle mode
    - From interrupt exit if we have interrupted the dyntick
    idle mode, so that we reprogram the next tick event in
    case the irq changed some internal state that requires this
    action.

    There are only few minor differences between both that
    are handled by that function, driven by the ts->inidle
    cpu variable and the inidle parameter. The whole guarantees
    that we only update the dyntick mode on irq exit if we actually
    interrupted the dyntick idle mode, and that we enter in RCU extended
    quiescent state from idle loop entry only.

    Split this function into:

    - tick_nohz_idle_enter(), which sets ts->inidle to 1, enters
    dynticks idle mode unconditionally if it can, and enters into RCU
    extended quiescent state.

    - tick_nohz_irq_exit() which only updates the dynticks idle mode
    when ts->inidle is set (ie: if tick_nohz_idle_enter() has been called).

    To maintain symmetry, tick_nohz_restart_sched_tick() has been renamed
    into tick_nohz_idle_exit().

    This simplifies the code and micro-optimize the irq exit path (no need
    for local_irq_save there). This also prepares for the split between
    dynticks and rcu extended quiescent state logics. We'll need this split to
    further fix illegal uses of RCU in extended quiescent states in the idle
    loop.

    Signed-off-by: Frederic Weisbecker
    Cc: Mike Frysinger
    Cc: Guan Xuetao
    Cc: David Miller
    Cc: Chris Metcalf
    Cc: Hans-Christian Egtvedt
    Cc: Ralf Baechle
    Cc: Paul E. McKenney
    Cc: Ingo Molnar
    Cc: Peter Zijlstra
    Cc: Thomas Gleixner
    Cc: H. Peter Anvin
    Cc: Russell King
    Cc: Paul Mackerras
    Cc: Heiko Carstens
    Cc: Paul Mundt
    Signed-off-by: Paul E. McKenney
    Reviewed-by: Josh Triplett

    Frederic Weisbecker
     

09 Dec, 2011

1 commit

  • mips used early_node_map[] just to prime free_area_init_nodes(). Now
    memblock can be used for the same purpose and early_node_map[] is
    scheduled to be dropped. Use memblock instead.

    Signed-off-by: Tejun Heo
    Acked-by: Ralf Baechle
    Cc: Benjamin Herrenschmidt
    Cc: Yinghai Lu
    Cc: linux-mips@linux-mips.org

    Tejun Heo
     

08 Dec, 2011

19 commits

  • Add new processor ID to asm/cpu.h and kernel/cpu-probe.c.
    Update to new CPU frequency detection code which works on XLP 3XX
    and 8XX.

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2971/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • - Add CPU_XLP and NLM_XLR_BOARD to arch/mips/Kconfig for Netlogic XLP boards
    - Update mips Makefiles to add XLP

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2968/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • Add support for Netlogic's XLP MIPS SoC. This patch adds:
    * XLP processor ID in cpu_probe.c and asm/cpu.h
    * XLP case to asm/module.h
    * CPU_XLP case to mm/tlbex.c
    * minor change to r4k cache handling to ignore XLP secondary cache
    * XLP cpu overrides to mach-netlogic/cpu-feature-overrides.h

    Signed-off-by: Jayachandran C
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2966/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • Use r4k_wait as the CPU wait function for XLR/XLS processors.

    Signed-off-by: Jayachandran C
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2728/
    Signed-off-by: Ralf Baechle

    Jayachandran C
     
  • Simplify the code by changing the place of event->destroy().

    Signed-off-by: Deng-Cheng Zhu
    Cc: Peter Zijlstra
    Cc: Paul Mackerras
    Cc: Ingo Molnar
    Cc: Arnaldo Carvalho de Melo
    Cc: David Daney
    Cc: Eyal Barzilay
    Cc: Zenon Fortuna
    Patchwork: https://patchwork.linux-mips.org/patch/3109/
    Signed-off-by: Ralf Baechle

    Deng-Cheng Zhu
     
  • Why removing pmu checking:
    Since 3.2-rc1, when arch level event init is called, the event is already
    connected to its PMU. Also, validate_event() is _only_ called by
    validate_group() in event init, so there is no need of checking or
    temporarily assigning event pmu during validate_group().

    Why removing event state checking:
    Events could be created in PERF_EVENT_STATE_OFF (attr->disabled == 1), when
    these events go through this checking, validate_group() does dummy work.
    But we do need to do group scheduling emulation for them in event init.
    Again, validate_event() is _only_ called by validate_group().

    Reference: http://www.spinics.net/lists/mips/msg42190.html
    Signed-off-by: Deng-Cheng Zhu
    Cc: Peter Zijlstra
    Cc: Paul Mackerras
    Cc: Ingo Molnar
    Cc: Arnaldo Carvalho de Melo
    Cc: David Daney
    Cc: Eyal Barzilay
    Cc: Zenon Fortuna
    Patchwork: https://patchwork.linux-mips.org/patch/3108/
    Signed-off-by: Ralf Baechle

    Deng-Cheng Zhu
     
  • Port the following patch for ARM by Mark Rutland:

    - 57ce9bb39b476accf8fba6e16aea67ed76ea523d
    ARM: 6902/1: perf: Remove erroneous check on active_events

    When initialising a PMU, there is a check to protect against races with
    other CPUs filling all of the available event slots. Since armpmu_add
    checks that an event can be scheduled, we do not need to do this at
    initialisation time. Furthermore the current code is broken because it
    assumes that atomic_inc_not_zero will unconditionally increment
    active_counts and then tries to decrement it again on failure.

    This patch removes the broken, redundant code.

    Signed-off-by: Deng-Cheng Zhu
    Cc: Peter Zijlstra
    Cc: Paul Mackerras
    Cc: Ingo Molnar
    Cc: Arnaldo Carvalho de Melo
    Cc: David Daney
    Cc: Eyal Barzilay
    Cc: Zenon Fortuna
    Patchwork: https://patchwork.linux-mips.org/patch/3106/
    Signed-off-by: Ralf Baechle

    Deng-Cheng Zhu
     
  • MIPS licensees may want to modify performance counters to count extra
    events. Also, now that the user is working on raw events, the manual is
    being used for sure. And feeding unsupported events shouldn't cause
    hardware failure and the like.

    [ralf@linux-mips.org: performance events also being used in internal
    performance evaluation and have a tendency to change as the micro-
    architecture evolves, even for minor revisions that may not be
    distinguishable by PrID. It's not very practicable to maintain a list
    of all events and there is no real benefit.]

    Signed-off-by: Deng-Cheng Zhu
    Cc: Peter Zijlstra
    Cc: Paul Mackerras
    Cc: Ingo Molnar
    Cc: Arnaldo Carvalho de Melo
    Cc: David Daney
    Cc: Eyal Barzilay
    Cc: Zenon Fortuna
    Patchwork: https://patchwork.linux-mips.org/patch/3107/
    Signed-off-by: Ralf Baechle

    Deng-Cheng Zhu
     
  • This patch provides support for kprobes on branch instructions. The branch
    instruction at the probed address is actually emulated and not executed
    out-of-line like other normal instructions. Instead the delay-slot instruction
    is copied and single stepped out of line.

    At the time of probe hit, the original branch instruction is evaluated
    and the target cp0_epc is computed similar to compute_retrun_epc(). It
    is also checked if the delay slot instruction can be skipped, which is
    true if there is a NOP in delay slot or branch is taken in case of
    branch likely instructions. Once the delay slot instruction is single
    stepped the normal execution resume with the cp0_epc updated the earlier
    computed cp0_epc as per the branch instructions.

    Signed-off-by: Maneesh Soni
    Signed-off-by: Victor Kamensky
    Cc: David Daney
    Cc: ananth@in.ibm.com
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2914/
    Signed-off-by: Ralf Baechle

    Maneesh Soni
     
  • This patch refactors MIPS branch emulation code so as to allow skipping
    delay slot instruction in case of branch likely instructions when branch is
    not taken. This is useful for keeping the code common for use cases like
    kprobes where one would like to handle the branch instructions keeping the
    delay slot instuction also in picture for branch likely instructions. Also
    allow emulation when instruction to be decoded is not at pt_regs->cp0_epc
    as in case of kprobes where pt_regs->cp0_epc points to the breakpoint
    instruction.

    The patch also exports the function for modules.

    Signed-off-by: Maneesh Soni
    Signed-off-by: Victor Kamensky
    Cc: David Daney
    Cc: ananth@in.ibm.com
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2913/
    Signed-off-by: Ralf Baechle

    Maneesh Soni
     
  • As ll/sc instruction are for atomic read-modify-write operations, allowing
    probes on top of these insturctions is a bad idea.

    Signed-off-by: Victor Kamensky
    Signed-off-by: Maneesh Soni
    Cc: David Daney
    Cc: ananth@in.ibm.com
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2912/
    Signed-off-by: Ralf Baechle

    Maneesh Soni
     
  • This patch fixes the arch_prepare_kprobe() on MIPS when it tries to find the
    instruction at the previous address to the probed address. The oops happens
    when the probed address is the first address in a kernel module and there is
    no previous address. The patch uses probe_kernel_read() to safely read the
    previous instruction.

    CPU 3 Unable to handle kernel paging request at virtual address ffffffffc0211ffc, epc == ffffffff81113204, ra == ffffffff8111511c
    Oops[#1]:
    Cpu 3
    $ 0 : 0000000000000000 0000000000000001 ffffffffc0212000 0000000000000000
    $ 4 : ffffffffc0220030 0000000000000000 0000000000000adf ffffffff81a3f898
    $ 8 : ffffffffc0220030 ffffffffffffffff 000000000000ffff 0000000000004821
    $12 : 000000000000000a ffffffff81105ddc ffffffff812927d0 0000000000000000
    $16 : ffffffff81a40000 ffffffffc0220030 ffffffffc0220030 ffffffffc0212660
    $20 : 0000000000000000 0000000000000008 efffffffffffffff ffffffffc0220000
    $24 : 0000000000000002 ffffffff8139f5b0
    $28 : a800000072adc000 a800000072adfca0 ffffffffc0220000 ffffffff8111511c
    Hi : 0000000000000000
    Lo : 0000000000000000
    epc : ffffffff81113204 arch_prepare_kprobe+0x1c/0xe8
    Tainted: P
    ra : ffffffff8111511c register_kprobe+0x33c/0x730
    Status: 10008ce3 KX SX UX KERNEL EXL IE
    Cause : 00800008
    BadVA : ffffffffc0211ffc
    PrId : 000d9008 (Cavium Octeon II)
    Modules linked in: bpa_mem crashinfo pds tun cpumem ipv6 exportfs nfsd OOBnd(P) OOBhal(P) cvmx_mdio cvmx_gpio aipcmod(P) mtsmod procfs(P) utaker_mod dplr_pci hello atomicm_foo [last unloaded: sysmgr_hb]
    Process stapio (pid: 5603, threadinfo=a800000072adc000, task=a8000000722e0438, tls=000000002b4bcda0)
    Stack : ffffffff81a40000 ffffffff81a40000 ffffffffc0220030 ffffffff8111511c
    ffffffffc0218008 0000000000000001 ffffffffc0218008 0000000000000001
    ffffffffc0220000 ffffffffc021efe8 1000000000000000 0000000000000008
    efffffffffffffff ffffffffc0220000 ffffffffc0220000 ffffffffc021d500
    0000000000000022 0000000000000002 1111000072be02b8 0000000000000000
    00000000000015e6 00000000000015e6 00000000007d0f00 a800000072be02b8
    0000000000000000 ffffffff811d16c8 a80000000382e3b0 ffffffff811d5ba0
    ffffffff81b0a270 ffffffff81b0a270 ffffffffc0212000 0000000000000013
    ffffffffc0220030 ffffffffc021ed00 a800000089114c80 000000007f90d590
    a800000072adfe38 a800000089114c80 0000000010020000 0000000010020000
    ...
    Call Trace:
    [] arch_prepare_kprobe+0x1c/0xe8
    [] register_kprobe+0x33c/0x730
    [] _stp_ctl_write_cmd+0x8e8/0xa88 [atomicm_foo]
    [] vfs_write+0xb4/0x178
    [] SyS_write+0x58/0x148
    [] handle_sysn32+0x44/0x84

    Code: ffb20010 ffb00000 dc820028 8c500000 0c4449e0 0004203c 14400029 3c048199

    Signed-off-by: Maneesh Soni
    Signed-off-by: Victor Kamensky
    Cc: David Daney
    Cc: ananth@in.ibm.com
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2915/
    Signed-off-by: Ralf Baechle

    Maneesh Soni
     
  • Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled],
    We run all interrupt handlers with interrupts disabled and we even check
    and yell when an interrupt handler returns with interrupts enabled (see
    commit [b738a50a: genirq: Warn when handler enables interrupts]).

    So now this flag is a NOOP and can be removed.

    [ralf@linux-mips.org: Fixed up conflicts in
    arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and
    arch/mips/kernel/perf_event.c.]

    Signed-off-by: Yong Zhang
    To: linux-kernel@vger.kernel.org
    Cc: tglx@linutronix.de
    linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2835/
    Signed-off-by: Ralf Baechle

    Yong Zhang
     
  • This patch addresses a couple of related problems:

    1) The kernel may reside in physical memory outside of the ranges set
    by plat_mem_setup(). If this is the case, init mem cannot be
    reused as it resides outside of the range of pages that the kernel
    memory allocators control.

    2) initrd images might be loaded in physical memory outside of the
    ranges set by plat_mem_setup(). The memory likewise cannot be
    reused. The patch doesn't handle this specific case, but the
    infrastructure is useful for future patches that do.

    The crux of the problem is that there are memory regions that need be
    memory_present(), but that cannot be free_bootmem() at the time of
    arch_mem_init(). We create a new type of memory (BOOT_MEM_INIT_RAM)
    for use with add_memory_region(). Then arch_mem_init() adds the init
    mem with this type if the init mem is not already covered by existing
    ranges.

    When memory is being freed into the bootmem allocator, we skip the
    BOOT_MEM_INIT_RAM ranges so they are not clobbered, but we do signal
    them as memory_present(). This way when they are later freed, the
    necessary memory manager structures have initialized and the Sparse
    allocater is prevented from crashing.

    The Octeon specific code that handled this case is removed, because
    the new general purpose code handles the case.

    Signed-off-by: David Daney
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/1988/
    Signed-off-by: Ralf Baechle

    David Daney
     
  • Initial commit of BMIPS SMP support code. Smoke-tested on a variety of
    BMIPS4350, BMIPS4380, and BMIPS5000 platforms.

    Signed-off-by: Kevin Cernekee
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2977/
    Signed-off-by: Ralf Baechle

    Kevin Cernekee
     
  • Some systems need to relocate the MIPS exception vector base during
    trap initialization. Add a hook to make this possible.

    Signed-off-by: Kevin Cernekee
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2959/
    Signed-off-by: Ralf Baechle

    Kevin Cernekee
     
  • Allow the board support code to register a raw notifier callback for
    NMI, similar to what is done for CU2 exceptions.

    Signed-off-by: Kevin Cernekee
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2958/
    Signed-off-by: Ralf Baechle

    Kevin Cernekee
     
  • Add basic support for the Au1300 variant(s):
    - New GPIO/Interrupt controller
    - DBDMA ids
    - USB setup
    - MMC support
    - enable various PSC drivers
    - detection code.

    Signed-off-by: Manuel Lauss
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2866/
    Signed-off-by: Ralf Baechle

    Manuel Lauss
     
  • Panic() invokes printk() to add a \n internally, so panic arguments should
    not themselves end in \n. Panic invocations in arch/mips and elsewhere
    are inconsistently sometimes terminating in \n, sometimes not.

    Signed-off-by: Ralf Baechle

    Ralf Baechle
     

06 Dec, 2011

1 commit

  • * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
    perf: Fix loss of notification with multi-event
    perf, x86: Force IBS LVT offset assignment for family 10h
    perf, x86: Disable PEBS on SandyBridge chips
    trace_events_filter: Use rcu_assign_pointer() when setting ftrace_event_call->filter
    perf session: Fix crash with invalid CPU list
    perf python: Fix undefined symbol problem
    perf/x86: Enable raw event access to Intel offcore events
    perf: Don't use -ENOSPC for out of PMU resources
    perf: Do not set task_ctx pointer in cpuctx if there are no events in the context
    perf/x86: Fix PEBS instruction unwind
    oprofile, x86: Fix crash when unloading module (nmi timer mode)
    oprofile: Fix crash when unloading module (hr timer mode)

    Linus Torvalds
     

14 Nov, 2011

1 commit

  • People (Linus) objected to using -ENOSPC to signal not having enough
    resources on the PMU to satisfy the request. Use -EINVAL.

    Requested-by: Linus Torvalds
    Cc: Stephane Eranian
    Cc: Will Deacon
    Cc: Deng-Cheng Zhu
    Cc: David Daney
    Cc: Ralf Baechle
    Signed-off-by: Peter Zijlstra
    Link: http://lkml.kernel.org/n/tip-xv8geaz2zpbjhlx0svmpp28n@git.kernel.org
    [ merged to newer kernel, fixed up MIPS impact ]
    Signed-off-by: Ingo Molnar

    Peter Zijlstra
     

11 Nov, 2011

2 commits

  • I am running SMP Linux 2.6.37-rc1 on BMIPS5000 (single core dual thread)
    and observe some abnormalities when doing system suspend/resume which I
    narrowed down to cpu hotplugging. The suspend brings the second thread
    processor down and then restarts it, after which I see memory corruption
    in userspace. I started digging and found out that problem occurs because
    while doing execve() the child process is getting the same ASID as the
    parent, which obviously corrupts parent's address space.

    Further digging showed that activate_mm() calls get_new_mmu_context() to
    get a new ASID, but at this time ASID field in entryHi is 1, and
    asid_cache(cpu) is 0x100 (it was just reset to ASID_FIRST_VERSION when
    the secondary TP was booting).

    So, get_new_mmu_context() increments the asid_cache(cpu) value to
    0x101, and thus puts 0x01 into entryHi. The result - ASID field does
    not get changed as it was supposed to.

    My solution is very simple - do not reset asid_cache(cpu) on TP warm
    restart.

    Patchwork: https://patchwork.linux-mips.org/patch/1797/
    Signed-off-by: Ralf Baechle

    Maksim Rayskiy
     
  • Fix the following compilation failure with v3.2-rc1 by including module.h:

    CC [M] arch/mips/kernel/cpufreq/loongson2_clock.o
    arch/mips/kernel/cpufreq/loongson2_clock.c:39:1: error: data definition has no type or storage class [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:39:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
    arch/mips/kernel/cpufreq/loongson2_clock.c:39:1: error: parameter names (without types) in function declaration [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:51:1: error: data definition has no type or storage class [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:51:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
    arch/mips/kernel/cpufreq/loongson2_clock.c:51:1: error: parameter names (without types) in function declaration [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:71:1: error: data definition has no type or storage class [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:71:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
    arch/mips/kernel/cpufreq/loongson2_clock.c:71:1: error: parameter names (without types) in function declaration [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:76:1: error: data definition has no type or storage class [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:76:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
    arch/mips/kernel/cpufreq/loongson2_clock.c:76:1: error: parameter names (without types) in function declaration [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:82:1: error: data definition has no type or storage class [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:82:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
    arch/mips/kernel/cpufreq/loongson2_clock.c:82:1: error: parameter names (without types) in function declaration [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:87:1: error: data definition has no type or storage class [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:87:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' [-Werror=implicit-int]
    arch/mips/kernel/cpufreq/loongson2_clock.c:87:1: error: parameter names (without types) in function declaration [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:93:1: error: data definition has no type or storage class [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:93:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
    arch/mips/kernel/cpufreq/loongson2_clock.c:93:1: error: parameter names (without types) in function declaration [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:131:1: error: data definition has no type or storage class [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:131:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
    arch/mips/kernel/cpufreq/loongson2_clock.c:131:1: error: parameter names (without types) in function declaration [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:147:1: error: data definition has no type or storage class [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:147:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
    arch/mips/kernel/cpufreq/loongson2_clock.c:147:1: error: parameter names (without types) in function declaration [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:166:1: error: data definition has no type or storage class [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:166:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Werror=implicit-int]
    arch/mips/kernel/cpufreq/loongson2_clock.c:166:1: error: parameter names (without types) in function declaration [-Werror]
    arch/mips/kernel/cpufreq/loongson2_clock.c:168:15: error: expected declaration specifiers or '...' before string constant
    arch/mips/kernel/cpufreq/loongson2_clock.c:169:20: error: expected declaration specifiers or '...' before string constant
    arch/mips/kernel/cpufreq/loongson2_clock.c:170:16: error: expected declaration specifiers or '...' before string constant

    Signed-off-by: Aaro Koskinen
    To: linux-mips@linux-mips.org
    To: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/2922/
    Signed-off-by: Ralf Baechle

    Aaro Koskinen
     

09 Nov, 2011

2 commits

  • Signed-off-by: David Daney
    To: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/2918/
    Signed-off-by: Ralf Baechle

    David Daney
     
  • The Kernel hangs occasionally during boot after "Calibrating delay loop..".
    This is caused by the c0_compare_int_usable() routine in cevt-r4k.c
    returning false which causes the system to disable the timer and hang later.
    The false return happens because the routine is using a series of four calls
    to irq_disable_hazard() as a delay while it waits for the timer changes to
    propagate to the cp0 cause register. On newer MIPS cores, like the 74K, the
    series of irq_disable_hazard() calls turn into ehb instructions and can take
    as little as a few clock ticks for all 4 instructions. This is not enough of
    a delay, so the routine thinks the timer is not working. This fix uses up
    to a max number of cycle counter ticks for the delay and uses
    back_to_back_c0_hazard() instead of irq_disable_hazard() to handle the
    hazard condition between cp0 writes and cp0 reads.

    Signed-off-by: Al Cooper
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/2911/
    Signed-off-by: Ralf Baechle

    Al Cooper
     

07 Nov, 2011

1 commit

  • * 'modsplit-Oct31_2011' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux: (230 commits)
    Revert "tracing: Include module.h in define_trace.h"
    irq: don't put module.h into irq.h for tracking irqgen modules.
    bluetooth: macroize two small inlines to avoid module.h
    ip_vs.h: fix implicit use of module_get/module_put from module.h
    nf_conntrack.h: fix up fallout from implicit moduleparam.h presence
    include: replace linux/module.h with "struct module" wherever possible
    include: convert various register fcns to macros to avoid include chaining
    crypto.h: remove unused crypto_tfm_alg_modname() inline
    uwb.h: fix implicit use of asm/page.h for PAGE_SIZE
    pm_runtime.h: explicitly requires notifier.h
    linux/dmaengine.h: fix implicit use of bitmap.h and asm/page.h
    miscdevice.h: fix up implicit use of lists and types
    stop_machine.h: fix implicit use of smp.h for smp_processor_id
    of: fix implicit use of errno.h in include/linux/of.h
    of_platform.h: delete needless include
    acpi: remove module.h include from platform/aclinux.h
    miscdevice.h: delete unnecessary inclusion of module.h
    device_cgroup.h: delete needless include
    net: sch_generic remove redundant use of
    net: inet_timewait_sock doesnt need
    ...

    Fix up trivial conflicts (other header files, and removal of the ab3550 mfd driver) in
    - drivers/media/dvb/frontends/dibx000_common.c
    - drivers/media/video/{mt9m111.c,ov6650.c}
    - drivers/mfd/ab3550-core.c
    - include/linux/dmaengine.h

    Linus Torvalds
     

01 Nov, 2011

2 commits