14 Mar, 2011

1 commit


28 Jan, 2011

4 commits


08 Jan, 2011

3 commits

  • The driver clearly tries to limit HPT370[A] to UltraDMA/66 if the PCI clock is
    less than 50 MHz but due to cut&paste type mistake this code has no effect...

    Signed-off-by: Sergei Shtylyov
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov
     
  • Fix 12 errors and 15 warnings given by checkpatch.pl:

    - *switch* and *case* not on the same indentation level;

    - no space between *for*/*switch*/*while* and open parenthesis;

    - space between an unary operator and its operand;

    - drive blacklist arrays not being *const*;

    - spaces before tabs;

    - lines over 80 characters.

    In addition to these changes, also do the following:

    - add new line after variable definitions;

    - fix the style of some multi-line comments.

    Signed-off-by: Sergei Shtylyov
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov
     
  • The Marvell bridge chips used on HighPoint SATA cards do not seem to support
    the UltraDMA modes 1, 2, and 3 as well as any MWDMA modes; these cards are
    based on HPT372/372A/372N/374 chips (judging from the vendor drivers), so
    the Linux drivers need to have a mode_filter() method for these chips...

    Signed-off-by: Sergei Shtylyov
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov
     

26 May, 2010

1 commit

  • Separate out ata_pci_bmdma_prepare_host() and ata_pci_bmdma_init_one()
    from their SFF counterparts. SFF ones no longer try to initialize
    BMDMA or set PCI master.

    Signed-off-by: Tejun Heo
    Signed-off-by: Jeff Garzik

    Tejun Heo
     

20 May, 2010

1 commit

  • When BMDMA initialization failed or BMDMA was not available for
    whatever reason, bmdma_addr was left at zero and used as an indication
    that BMDMA shouldn't be used. This leads to the following problems.

    p1. For BMDMA drivers which don't use traditional BMDMA register,
    ata_bmdma_mode_filter() incorrectly inhibits DMA modes. Those
    drivers either have to inherit from ata_sff_port_ops or clear
    ->mode_filter explicitly.

    p2. non-BMDMA drivers call into BMDMA PRD table allocation. It
    doesn't actually allocate PRD table if bmdma_addr is not
    initialized but is still confusing.

    p3. For BMDMA drivers which don't use traditional BMDMA register, some
    methods might not be invoked as expected (e.g. bmdma_stop from
    ata_sff_post_internal_cmd()).

    p4. SFF drivers w/ custom DMA interface implement noop BMDMA ops
    worrying libata core might call into one of them.

    These problems are caused by the muddy line between SFF and BMDMA and
    the assumption that all BMDMA controllers initialize bmdma_addr.

    This patch fixes p1 and p2 by removing the bmdma_addr assumption and
    moving prd allocation to BMDMA port start. Later patches will fix the
    remaining issues.

    This patch improves BMDMA initialization such that

    * When BMDMA register initialization fails, falls back to PIO instead
    of failing. ata_pci_bmdma_init() never fails now.

    * When ata_pci_bmdma_init() falls back to PIO, it clears
    ap->mwdma_mask and udma_mask instead of depending on
    ata_bmdma_mode_filter(). This makes ata_bmdma_mode_filter()
    unnecessary thus resolving p1.

    * ata_port_start() which actually is BMDMA specific is moved to
    ata_bmdma_port_start(). ata_port_start() and ata_sff_port_start()
    are killed.

    * ata_sff_port_start32() is moved and renamed to
    ata_bmdma_port_start32().

    Drivers which no longer call into PRD table allocation are...

    pdc_adma, sata_inic162x, sata_qstor, sata_sx4, pata_cmd640 and all
    drivers which inherit from ata_sff_port_ops.

    pata_icside sets ->port_start to ATA_OP_NULL as it doesn't need PRD
    but is a BMDMA controller and doesn't have custom port_start like
    other such controllers.

    Note that with the previous patch which makes all and only BMDMA
    drivers inherit from ata_bmdma_port_ops, this change doesn't break
    drivers which need PRD table.

    Signed-off-by: Tejun Heo
    Signed-off-by: Jeff Garzik

    Tejun Heo
     

02 Mar, 2010

4 commits

  • This allows parallel scan and the like to be set without having to stop
    using the existing full helper functions. This patch merely adds the argument
    and fixes up the callers. It doesn't undo the special cases already in the
    tree or add any new parallel callers.

    Signed-off-by: Alan Cox
    Signed-off-by: Jeff Garzik

    Alan Cox
     
  • Describe UDMA timing bits 18-20 and 21 separately; add a note to bit
    31 about it being meaningful for PIO only. Reformat the whole comment,
    while at it...

    Signed-off-by: Sergei Shtylyov
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov
     
  • As these drivers' set_piomode() and set_dmamode() methods are almost
    identical, factor out the common hpt{37x|3x2n}_set_mode() function
    to be called by both of them, the same as in 'pata_hpt366' driver.

    This results in ~5% decrease in the 'pata_hpt37x' driver binary
    size and in ~4% decrease in the 'pata_hpt3x2n' driver binary size
    (as measured on x86-32).

    Signed-off-by: Sergei Shtylyov
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov
     
  • Use ATA_DMA_* constants instead of the bare numbers for the BMIDE registers.

    Signed-off-by: Sergei Shtylyov
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov
     

04 Dec, 2009

2 commits

  • Some places were using PCI_CLASS_REVISION instead of PCI_REVISION_ID, so
    they weren't converted by commit 44c10138fd4bbc4b6d6bff0873c24902f2a9da65
    (PCI: Change all drivers to use pci_device->revision).

    Signed-off-by: Sergei Shtylyov
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov
     
  • These drivers inherited from the older 'hpt366' IDE driver the buggy timing
    register masks in their set_piomode() metods. As a result, too low command
    cycle active time is programmed for slow PIO modes. Quite fortunately, it's
    later "fixed up" by the set_dmamode() methods which also "helpfully" reprogram
    the command timings, usually to PIO mode 4; unfortunately, setting an UltraDMA
    mode #N also reprograms already set PIO data timings, usually to MWDMA mode #
    max(N, 2) timings...

    However, the drivers added some breakage of their own too: the bit that they
    set/clear to control the FIFO is sometimes wrong -- it's actually the MSB of
    the command cycle setup time; also, setting it in DMA mode is wrong as this
    bit is only for PIO actually and clearing it for PIO modes is not needed as
    no mode in any timing table has it set...

    Fix all this, inverting the masks while at it, like in the 'hpt366' and
    'pata_hpt366' drivers; bump the drivers' versions, accounting for recent
    patches that forgot to do it...

    Signed-off-by: Sergei Shtylyov
    Cc: stable@kernel.org
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov
     

03 Dec, 2009

3 commits


21 Sep, 2009

1 commit


17 Apr, 2009

1 commit

  • The libata driver has copied the code from the IDE driver which caused a post
    2.4.18 regression on many HPT370[A] chips -- DMA stopped to work completely,
    only causing timeouts. Now remove hpt370_bmdma_start() for good...

    Signed-off-by: Sergei Shtylyov
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov
     

25 Mar, 2009

1 commit


18 Apr, 2008

7 commits

  • SFF functions have confusing names. Some have sff prefix, some have
    bmdma, some std, some pci and some none. Unify the naming by...

    * SFF functions which are common to both BMDMA and non-BMDMA are
    prefixed with ata_sff_.

    * SFF functions which are specific to BMDMA are prefixed with
    ata_bmdma_.

    * SFF functions which are specific to PCI but apply to both BMDMA and
    non-BMDMA are prefixed with ata_pci_sff_.

    * SFF functions which are specific to PCI and BMDMA are prefixed with
    ata_pci_bmdma_.

    * Drop generic prefixes from LLD specific routines. For example,
    bfin_std_dev_select -> bfin_dev_select.

    The following renames are noteworthy.

    ata_qc_issue_prot() -> ata_sff_qc_issue()
    ata_pci_default_filter() -> ata_bmdma_mode_filter()
    ata_dev_try_classify() -> ata_sff_dev_classify()

    This rename is in preparation of separating SFF support out of libata
    core layer. This patch strictly renames functions and doesn't
    introduce any behavior difference.

    Signed-off-by: Tejun Heo

    Tejun Heo
     
  • Currently reset methods are not specified directly in the
    ata_port_operations table. If a LLD wants to use custom reset
    methods, it should construct and use a error_handler which uses those
    reset methods. It's done this way for two reasons.

    First, the ops table already contained too many methods and adding
    four more of them would noticeably increase the amount of necessary
    boilerplate code all over low level drivers.

    Second, as ->error_handler uses those reset methods, it can get
    confusing. ie. By overriding ->error_handler, those reset ops can be
    made useless making layering a bit hazy.

    Now that ops table uses inheritance, the first problem doesn't exist
    anymore. The second isn't completely solved but is relieved by
    providing default values - most drivers can just override what it has
    implemented and don't have to concern itself about higher level
    callbacks. In fact, there currently is no driver which actually
    modifies error handling behavior. Drivers which override
    ->error_handler just wraps the standard error handler only to prepare
    the controller for EH. I don't think making ops layering strict has
    any noticeable benefit.

    This patch makes ->prereset, ->softreset, ->hardreset, ->postreset and
    their PMP counterparts propoer ops. Default ops are provided in the
    base ops tables and drivers are converted to override individual reset
    methods instead of creating custom error_handler.

    * ata_std_error_handler() doesn't use sata_std_hardreset() if SCRs
    aren't accessible. sata_promise doesn't need to use separate
    error_handlers for PATA and SATA anymore.

    * softreset is broken for sata_inic162x and sata_sx4. As libata now
    always prefers hardreset, this doesn't really matter but the ops are
    forced to NULL using ATA_OP_NULL for documentation purpose.

    * pata_hpt374 needs to use different prereset for the first and second
    PCI functions. This used to be done by branching from
    hpt374_error_handler(). The proper way to do this is to use
    separate ops and port_info tables for each function. Converted.

    Signed-off-by: Tejun Heo

    Tejun Heo
     
  • port_info->private_data is currently used for two purposes - to record
    private data about the port_info or to specify host->private_data to
    use when allocating ata_host.

    This overloading is confusing and counter-intuitive in that
    port_info->private_data becomes host->private_data instead of
    port->private_data. In addition, port_info and host don't correspond
    to each other 1-to-1. Currently, the first non-NULL
    port_info->private_data is used.

    This patch makes port_info->private_data just be what it is -
    private_data for the port_info where LLD can jot down extra info.
    libata no longer sets host->private_data to the first non-NULL
    port_info->private_data, @host_priv argument is added to
    ata_pci_init_one() instead. LLDs which use ata_pci_init_one() can use
    this argument to pass in pointer to host private data. LLDs which
    don't should use init-register model anyway and can initialize
    host->private_data directly.

    Adding @host_priv instead of using init-register model for LLDs which
    use ata_pci_init_one() is suggested by Alan Cox.

    Signed-off-by: Tejun Heo
    Cc: Alan Cox

    Tejun Heo
     
  • ata_pci_init_one() is the only function which uses ops->irq_handler
    and pi->sht. Other initialization functions take the same information
    as arguments. This causes confusion and duplicate unused entries in
    structures.

    Make ata_pci_init_one() take sht as an argument and use ata_interrupt
    implicitly. All current users use ata_interrupt and if different irq
    handler is necessary open coding ata_pci_init_one() using
    ata_prepare_sff_host() and ata_activate_sff_host can be done under ten
    lines including error handling and driver which requires custom
    interrupt handler is likely to require custom initialization anyway.

    As ata_pci_init_one() was the last user of ops->irq_handler, this
    patch also kills the field.

    Signed-off-by: Tejun Heo

    Tejun Heo
     
  • libata lets low level drivers build ata_port_operations table and
    register it with libata core layer. This allows low level drivers
    high level of flexibility but also burdens them with lots of
    boilerplate entries.

    This becomes worse for drivers which support related similar
    controllers which differ slightly. They share most of the operations
    except for a few. However, the driver still needs to list all
    operations for each variant. This results in large number of
    duplicate entries, which is not only inefficient but also error-prone
    as it becomes very difficult to tell what the actual differences are.

    This duplicate boilerplates all over the low level drivers also make
    updating the core layer exteremely difficult and error-prone. When
    compounded with multi-branched development model, it ends up
    accumulating inconsistencies over time. Some of those inconsistencies
    cause immediate problems and fixed. Others just remain there dormant
    making maintenance increasingly difficult.

    To rectify the problem, this patch implements ata_port_operations
    inheritance. To allow LLDs to easily re-use their own ops tables
    overriding only specific methods, this patch implements poor man's
    class inheritance. An ops table has ->inherits field which can be set
    to any ops table as long as it doesn't create a loop. When the host
    is started, the inheritance chain is followed and any operation which
    isn't specified is taken from the nearest ancestor which has it
    specified. This operation is called finalization and done only once
    per an ops table and the LLD doesn't have to do anything special about
    it other than making the ops table non-const such that libata can
    update it.

    libata provides four base ops tables lower drivers can inherit from -
    base, sata, pmp, sff and bmdma. To avoid overriding these ops
    accidentaly, these ops are declared const and LLDs should always
    inherit these instead of using them directly.

    After finalization, all the ops table are identical before and after
    the patch except for setting .irq_handler to ata_interrupt in drivers
    which didn't use to. The .irq_handler doesn't have any actual effect
    and the field will soon be removed by later patch.

    * sata_sx4 is still using old style EH and currently doesn't take
    advantage of ops inheritance.

    Signed-off-by: Tejun Heo

    Tejun Heo
     
  • libata lets low level drivers build scsi_host_template and register it
    to the SCSI layer. This allows low level drivers high level of
    flexibility but also burdens them with lots of boilerplate entries.

    This patch implements SHT initializers which can be used to initialize
    all the boilerplate entries in a sht. Three variants of them are
    implemented - BASE, BMDMA and NCQ - for different types of drivers.
    Note that entries can be overriden by putting individual initializers
    after the helper macro.

    All sht tables are identical before and after this patch.

    Signed-off-by: Tejun Heo

    Tejun Heo
     
  • PCI device should be powered up or powered up before its PCI regsiters
    are accessed. Although PCI configuration register access is allowed
    in D3hot, PCI device is free to reset its status when transiting from
    D3hot to D0 causing configuration data to change.

    Many libata SFF drivers which use ata_pci_init_one() read and update
    configuration registers before calling ata_pci_init_one() which
    enables the PCI device. Also, in resume paths, some drivers access
    registers without resuming the PCI device.

    This patch adds a call to pcim_enable_device() in init path if
    register is accessed before calling ata_pci_init_one() and make resume
    paths first resume PCI devices, access PCI configuration regiters then
    resume ATA host.

    While at it...

    * cmd640 was strange in that it set ->resume even when CONFIG_PM is
    not. This is by-product of minimal build fix. Updated.

    * In cs5530, Don't BUG() on reinit failure. Just whine and fail
    resume.

    Signed-off-by: Tejun Heo

    Tejun Heo
     

05 Mar, 2008

1 commit


23 Jan, 2008

1 commit

  • WARNING: line over 80 characters
    #70: FILE: drivers/ata/pata_hpt37x.c:850:
    + struct pci_dev *pdev_0 = pci_get_slot(pdev->bus, pdev->devfn - 1);

    ERROR: else should follow close brace '}'
    #78: FILE: drivers/ata/pata_hpt37x.c:858:
    + }
    + else

    total: 1 errors, 1 warnings, 100 lines checked
    Your patch has style problems, please review. If any of these errors
    are false positives report them to the maintainer, see
    CHECKPATCH in MAINTAINERS.

    Please run checkpatch prior to sending patches

    Cc: Alan Cox
    Signed-off-by: Andrew Morton
    Signed-off-by: Jeff Garzik

    Andrew Morton
     

20 Dec, 2007

1 commit


24 Nov, 2007

1 commit


06 Nov, 2007

1 commit


13 Oct, 2007

4 commits


15 Aug, 2007

2 commits

  • Fix several inconsistencies in these drivers WRT reporting the clocks:

    - when using DPLL mode, 'pata_hpt37x' driver reported the DPLL frequency as the
    PCI clock -- make it properly report both clocks and add the same ability to
    the 'pata_hpt3x2n' driver;

    - both drivers sometimes use "pata_hpt3*:" and sometimes "hpt3*:" in the
    messages -- make them use only the former one;

    - the message about failed DPLL stablizatios deserves KERN_ERR and a bang. :-)

    Signed-off-by: Sergei Shtylyov
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov
     
  • The DPLL tuning code always set up it for 66 MHz due to wrong UltraDMA mask
    including mode 5 used to check for the necessity of 66 MHz clocking -- this
    caused 66 MHz clock to be used for HPT374 chip that does not tolerate it.
    While fixing this, also remove PLL mode from the TODO list -- I don't think
    it's still a relevant item.

    Signed-off-by: Sergei Shtylyov
    Signed-off-by: Jeff Garzik

    Sergei Shtylyov