Eric Lee / smarc-fsl-linux-kernel

01 Jun, 2011

1 commit

  • 6dd9a7c73   intel-iommu: Enable super page (2MiB, 1GiB, etc.) support ... Browse Code »

    There are no externally-visible changes with this. In the loop in the
    internal __domain_mapping() function, we simply detect if we are mapping:
    - size >= 2MiB, and
    - virtual address aligned to 2MiB, and
    - physical address aligned to 2MiB, and
    - on hardware that supports superpages.

    (and likewise for larger superpages).

    We automatically use a superpage for such mappings. We never have to
    worry about *breaking* superpages, since we trust that we will always
    *unmap* the same range that was mapped. So all we need to do is ensure
    that dma_pte_clear_range() will also cope with superpages.

    Adjust pfn_to_dma_pte() to take a superpage 'level' as an argument, so
    it can return a PTE at the appropriate level rather than always
    extending the page tables all the way down to level 1. Again, this is
    simplified by the fact that we should never encounter existing small
    pages when we're creating a mapping; any old mapping that used the same
    virtual range will have been entirely removed and its obsolete page
    tables freed.

    Provide an 'intel_iommu=sp_off' argument on the command line as a
    chicken bit. Not that it should ever be required.

    ==

    The original commit seen in the iommu-2.6.git was Youquan's
    implementation (and completion) of my own half-baked code which I'd
    typed into an email. Followed by half a dozen subsequent 'fixes'.

    I've taken the unusual step of rewriting history and collapsing the
    original commits in order to keep the main history simpler, and make
    life easier for the people who are going to have to backport this to
    older kernels. And also so I can give it a more coherent commit comment
    which (hopefully) gives a better explanation of what's going on.

    The original sequence of commits leading to identical code was:

    Youquan Song (3):
    intel-iommu: super page support
    intel-iommu: Fix superpage alignment calculation error
    intel-iommu: Fix superpage level calculation error in dma_pfn_level_pte()

    David Woodhouse (4):
    intel-iommu: Precalculate superpage support for dmar_domain
    intel-iommu: Fix hardware_largepage_caps()
    intel-iommu: Fix inappropriate use of superpages in __domain_mapping()
    intel-iommu: Fix phys_pfn in __domain_mapping for sglist pages

    Signed-off-by: Youquan Song
    Signed-off-by: David Woodhouse

    Youquan Song
     

18 May, 2009

1 commit

29 Apr, 2009

1 commit

  • 4ed0d3e6c   Intel IOMMU Pass Through Support ... Browse Code »

    The patch adds kernel parameter intel_iommu=pt to set up pass through
    mode in context mapping entry. This disables DMAR in linux kernel; but
    KVM still runs on VT-d and interrupt remapping still works.

    In this mode, kernel uses swiotlb for DMA API functions but other VT-d
    functionalities are enabled for KVM. KVM always uses multi level
    translation page table in VT-d. By default, pass though mode is disabled
    in kernel.

    This is useful when people don't want to enable VT-d DMAR in kernel but
    still want to use KVM and interrupt remapping for reasons like DMAR
    performance concern or debug purpose.

    Signed-off-by: Fenghua Yu
    Acked-by: Weidong Han
    Signed-off-by: David Woodhouse

    Fenghua Yu
     

24 Mar, 2009

1 commit

04 Jan, 2009

1 commit

  • c66b9906f   intel-iommu: fix build error with INTR_REMAP=y and DMAR=n ... Browse Code »

    dmar.o can be built in the CONFIG_INTR_REMAP=y case but
    iommu_calculate_agaw() is only available if VT-d is built as well.

    So create an inline version of iommu_calculate_agaw() for the
    !CONFIG_DMAR case. The iommu->agaw value wont be used in this
    case, but the code is cleaner (has less #ifdefs) if we have it around
    unconditionally.

    Signed-off-by: Ingo Molnar

    Ingo Molnar
     

03 Jan, 2009

9 commits

18 Oct, 2008

1 commit

  • 5b6985ce8   intel-iommu: IA64 support ... Browse Code »

    The current Intel IOMMU code assumes that both host page size and Intel
    IOMMU page size are 4KiB. The first patch supports variable page size.
    This provides support for IA64 which has multiple page sizes.

    This patch also adds some other code hooks for IA64 platform including
    DMAR_OPERATION_TIMEOUT definition.

    [dwmw2: some cleanup]
    Signed-off-by: Fenghua Yu
    Signed-off-by: Tony Luck
    Signed-off-by: David Woodhouse

    Fenghua Yu
     

15 Oct, 2008

1 commit

  • 387179464   VT-d: Changes to support KVM ... Browse Code »

    This patch extends the VT-d driver to support KVM

    [Ben: fixed memory pinning]
    [avi: move dma_remapping.h as well]

    Signed-off-by: Kay, Allen M
    Signed-off-by: Weidong Han
    Signed-off-by: Ben-Ami Yassour
    Signed-off-by: Amit Shah
    Acked-by: Mark Gross
    Signed-off-by: Avi Kivity

    Kay, Allen M