22 Oct, 2024
5 commits
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Fix Coverity issue: CID 5484434 of "dereference null return value".
The function pxp_get_format could return NULL, so add the check before use.Signed-off-by: Robby Cai
Reviewed-by: Guoniu Zhou -
The pmic pf9453 A2 has changed the LDO_SNVS voltage range, so update it.
Signed-off-by: Joy Zou
Reviewed-by: Ye Li -
The pmic pf9453 A2 has changed the LDO_SNVS voltage range, so update it.
Signed-off-by: Joy Zou
Reviewed-by: Ye Li -
The LDO1 and LDO2 voltage num is wrong, so correct it.
Signed-off-by: Joy Zou
Reviewed-by: Ye Li -
Except lpddr5, i.MX95 also support lpddr4x. This will add a metric for
lpddr4x.Signed-off-by: Xu Yang
Cc: shawnguo@kernel.org
Cc: will@kernel.org
Cc: james.clark@linaro.org
Cc: mike.leach@linaro.org
Cc: imx@lists.linux.dev
Cc: john.g.garry@oracle.com
Cc: kernel@pengutronix.de
Cc: s.hauer@pengutronix.de
Link: https://lore.kernel.org/r/20240924030812.3211029-1-xu.yang_2@nxp.com
Signed-off-by: Namhyung Kim
21 Oct, 2024
3 commits
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error log:
error: variable 'data_ddr' is uninitialized when used here [-Werror,-Wuninitialized]
ret = neutron_rproc_elf_load(rproc, buf->firmware_p, data_ddr, 0x1);
^~~~~~~~Change-Id: If3852cf0214f594b7fc6bcc147226558ecb75ec0
Signed-off-by: Zhipeng Wang -
This reverts commit d95ba73844cb8125b2104f265836836b5b24810e.
This workaround may fail some android case, the proper solution is that
parse drop the first Non-I frame in the beginning.Signed-off-by: Ming Qian
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There is a new neutron fine-tuning workflow. Different model files have
different firmware, which requires the neutron linux driver to support
loading different firmware for different models. This patch adds new
interfaces to support loading firmware during runtime.This is a temporary workflow, but will be around for a whiles.
Signed-off-by: Jiwei.Fu
Reviewed-by: Peng Fan
18 Oct, 2024
1 commit
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For iMX91, m33_root clock is still used, so remove clocks
property in -ld.dts to reuse clocks proerty in dtsi file.Signed-off-by: Pengfei Li
Reviewed-by: Jacky Bai
17 Oct, 2024
11 commits
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Change CMD and RSP tag id of dubug MU for i.MX95
to support running SHE NVM on Debug MUSigned-off-by: Meenakshi Aggarwal
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On i.MX8MM the register of volume control has positive and negative
values. It is different from other platforms like i.MX8MP and i.MX93
which only have positive values. Add a volume_sx flag to use SX_TLV
volume control for this kind of platform. Use common TLV volume control
for other platforms.Fixes: cdfa92eb90f5 ("ASoC: fsl_micfil: Correct the number of steps on SX controls")
Signed-off-by: Chancel Liu
Reviewed-by: Shengjiu Wang -
extend the fence timeout to 5s, although it will be cut off to
MAX_TIMEOUT_MS(4500) on host sideSigned-off-by: Jiyu Yang
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Add two fwnode properties "orientation" and "rotation" for camera
connected to TI SerDes DT node.Signed-off-by: Guoniu.zhou
Reviewed-by: Robby Cai -
Add V4L2_CID_CAMERA_ORIENTATION and V4L2_CID_CAMERA_SENSOR_ROTATION
support for AP1302 device by adding "orientation" and "rotation" two
fwnode properityes to fix libcamera warning since they are recommended
V4L2 control in libcamera.Signed-off-by: Guoniu.zhou
Reviewed-by: Robby Cai -
Add two fwnode properties "orientation" and "rotation" for AP1302
DT node.Signed-off-by: Guoniu.zhou
Reviewed-by: Robby Cai -
The __setup macro does not always trigger the compiler to treat the
function as "used". The following build error may be encountered:drivers/pci/controller/dwc/pci-imx6.c:1847:19: error: unused function 'imx6_pcie_compliance_test_enable' [-Werror,-Wunused-function]
1847 | static int __init imx6_pcie_compliance_test_enable(char *str)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.Change-Id: Ie3f8cdf1cd624b29e2df8867d063ad9fb1fdea8b
Signed-off-by: Zhipeng Wang -
Use v4l2 ctrl V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE and
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY to instead of private ctrl id
V4L2_CID_DIS_REORDER.The range of V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY is [0, 0]
Signed-off-by: Ming Qian
Reviewed-by: TaoJiang -
According to latest RM, media_axi_clk_root is 333Mhz at ND mode.
Update assigned clock rate in dts to align with RM.Signed-off-by: Pengfei Li
Reviewed-by: Ye Li -
According the latest RM, the ND frequency of MEDIA AXI should be 333M
for i.MX91.Signed-off-by: Pengfei Li
Reviewed-by: Ye Li -
LCDIF pinctrl should be put into the -tianma-wvga-panel.dts.
Meanwhile put all LCDIF pins into GPIO when panel is disabled
to save power on NVCC_3p3, which can save around 4mW/6mW for
evk/qsb during suspend.Signed-off-by: Xinyu Chen
Signed-off-by: Pengfei Li
Acked-by: Liu Ying
16 Oct, 2024
14 commits
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The mx95mbcam_ctrl_type_ops structure is not used anywhere. Remove it.
Also, remove the mx95mbcam_ctrl_type_op_validate() which was only
referenced in the structure.Signed-off-by: Laurentiu Palcu
Reviewed-by: Robert Chiras -
The issue can happen with csi2_video_pipe_mask array accesses if
csi_of_ep.port < MAX96724_SRC_PAD or higher than MAX96724_N_PADS. Add a
check to make sure we don't get there. Since the function can now return
-EINVAL, add also a check in the caller function to handle this
situation.Signed-off-by: Laurentiu Palcu
Reviewed-by: Robert Chiras -
The v4l2_subdev_state_get_opposite_stream_format() function can return
NULL. Add a check before continuing.Signed-off-by: Laurentiu Palcu
Reviewed-by: Robert Chiras -
There is a valid issue inside the function where ret is assigned the
returned value of max96724_xlate_streams() in case of error and then we
jump to 'unlock' only to return 0. So, let's use that ret value this
time. Also, initialize ret to 0 to avoid returning wrong value if
pos == -1 in the while loop.Signed-off-by: Laurentiu Palcu
Reviewed-by: Robert Chiras -
This patch covers multiple Coverity "uninitialized scalar variable"
issues, all of them false positives since they'll get written in
subsequent function calls when their address is passed on as arguments
to those functions. However, I don't see any issues with initializing
those variables first and Coverity will be happy about it.Signed-off-by: Laurentiu Palcu
Reviewed-by: Robert Chiras -
This is a false positive Coverity issue as reg_val will be written when
calling regmap_read(). However, there's nothing inherently wrong with
initializing the variable to 0 and this will also make Coverity happy.Signed-off-by: Laurentiu Palcu
Reviewed-by: Robert Chiras -
The error revealed a hidden bug with setting the WB registers for LCG,
SPD and VS. They all replicated the HCG values because of incorrect
pointer arithmetic in the for loop initialization.Signed-off-by: Laurentiu Palcu
Reviewed-by: Robert Chiras -
The issue reported in ox03c10_streaming_start() is genuine. Variable
'ret' was not initialized which could lead to reporting that starting
streaming failed.The issue reported in ox03c10_otp_correction_get() is a false positive.
Even though the regmap_bulk_read() will overwrite all the array values
with the ones read from the sensor, let's initialize the array to 0 to
silence Coverity.Signed-off-by: Laurentiu Palcu
Reviewed-by: Robert Chiras -
There are two problems when switch to ND mode with no_od_mode enabled
like iMX91.
1. The voltage change should be first step if switch from LD or SWFFC
to ND with no_od_mode. And it should be last step if switch from
OD (no_od_mode is false)
2. The NIC clock rate must be higher MEDIA AXI clock, otherwise writing to
registers in Mediamix will cause system hang due to HW issue on axi2apb.
So must increase NIC clock prior than MEDIA AXI when switch from LD or
SWFFC to ND. And decrease NIC clock at last when switch from OD to ND.Signed-off-by: Ye Li
Reviewed-by: Jacky Bai -
Add Tianma TM050RDH03 5.0" WVGA TFT LCD panel support on
i.MX93 9x9 QSB platform.Signed-off-by: Liu Ying
Reviewed-by: Robby Cai -
After adding the dynamic setting for oclk-prsc, we no longer need to
set the static oclk-prsc method through DTS.
So drop it.Signed-off-by: Clark Wang
Reviewed-by: Wei Fang -
Before this, the default value of oclk_prsc is 2, or set by dts.
It cannot dynamically meet the provided cycle and pulse width
that are too large or too small by the user.The current logic will try to set the duty cycle of the output pulse
to 50%.
However, due to IP restrictions, when priv->clk_freq is 333MHz, the
maximum high level time of the pulse is ~6ms. When the user sets a
period longer than 12ms, it cannot guarantee a 50% duty cycle.Signed-off-by: Clark Wang
Reviewed-by: Wei Fang -
The realtek phy CLKOUT signal is not used. Disable it to save power.
Signed-off-by: Clark Wang
Reviewed-by: Wei Fang -
For i.MX95 ENETC PF, the actual offset of the SG_DROP_COUNT in the
STSE_DATA element of Ingress Stream Count Table is bit 201 or the
offset within the entire Ingress Stream Count Table Response Data
Buffer format is bit 233. So add a workaround for errata ERR052134.Signed-off-by: Wei Fang
Reviewed-by: Clark Wang
15 Oct, 2024
6 commits
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DTS property "eee-broken-1000t;" was added on 8mm for FEC to avoid issue
of ptp sync. NETC should not have this issue.
So, remove this property for NETC phys.Signed-off-by: Clark Wang
Reviewed-by: Wei Fang -
Add EEE support for i.MX95/ENETC V4. It will be disabled by default.
Can enable it with this command:
$ ethtool --set-eee eth0 tx-timer 5000 tx-lpi on eee onSigned-off-by: Clark Wang
Reviewed-by: Wei Fang -
These msleep() were added during bringup. However, as msleep() will
slow down xpcs initialization and during high CPU utilization, it may
lead to polling timeouts. So, remove these unnecessary delays.Fixes: f5d7b7a0ff41 ("LF-10639-4 net: pcs: xpcs: add mx95 serdes support")
Signed-off-by: Clark Wang
Reviewed-by: Wei Fang -
This adds support for driving the chip into sleep or wakeup with a GPIO.
If the device tree property device-wakeup-gpios is defined, the driver
utilizes this GPIO for controlling the chip's power save state, else it
uses the default UART-break method.Signed-off-by: Neeraj Sanjay Kale
Signed-off-by: Luiz Augusto von Dentz
(cherry picked from commit 039468a219126b10e988bf67f73d8a6687cba7dc)
Signed-off-by: Luke Wang -
This adds a new optional device tree property device-wakeup-gpios, which
specifies the GPIO connected to BT_WAKE_IN pin of the NXP chipset.If this property is defined, the driver will use this GPIO for driving chip
into sleep/wakeup state, else use the UART break signal by default.Signed-off-by: Neeraj Sanjay Kale
Reviewed-by: Rob Herring (Arm)
Signed-off-by: Luiz Augusto von Dentz
(cherry picked from commit 99ba211a9b71ba81535045d7f46cefc0c738ddc2)
Signed-off-by: Luke Wang -
This adds a new optional device tree property called firware-name.
Signed-off-by: Neeraj Sanjay Kale
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Luiz Augusto von Dentz
(cherry picked from commit 921825453873a15e8c83d6c171f0a6cf128fc963)
Signed-off-by: Luke Wang
