12 Sep, 2016

8 commits


08 Sep, 2016

2 commits


07 Sep, 2016

3 commits

  • The Aspeed SoCs contain GPIOs banked by letter, where each bank contains
    8 pins. The GPIO banks are then grouped in sets of four in the register
    layout.

    The implementation exposes multiple banks through the one driver and
    requests and releases pins via the pinctrl subsystem. The hardware
    supports generation of interrupts from all GPIO-capable pins.

    A number of hardware features are not yet supported: Configuration of
    interrupt direction (ARM or LPC), debouncing, and WDT reset tolerance
    for output ports.

    Signed-off-by: Joel Stanley
    Signed-off-by: Alistair Popple
    Signed-off-by: Jeremy Kerr
    Signed-off-by: Andrew Jeffery
    Signed-off-by: Linus Walleij

    Joel Stanley
     
  • Signed-off-by: Andrew Jeffery
    Acked-by: Joel Stanley
    Acked-by: Rob Herring
    Signed-off-by: Linus Walleij

    Andrew Jeffery
     
  • The recent addition of the regulator support has led to the pca953x_remove
    function returning uninitialized data when no platform data pointer is
    provided, as gcc warns when using -Wmaybe-uninitialized:

    drivers/gpio/gpio-pca953x.c: In function 'pca953x_remove':
    drivers/gpio/gpio-pca953x.c:860:9: error: 'ret' may be used uninitialized in this function [-Werror=maybe-uninitialized]

    This restores the previous behavior, returning 0 on success.

    Signed-off-by: Arnd Bergmann
    Fixes: e23efa311110 ("gpio: pca954x: Add vcc regulator and enable it")
    Acked-by: Phil Reid
    Signed-off-by: Linus Walleij

    Arnd Bergmann
     

24 Aug, 2016

1 commit


23 Aug, 2016

4 commits

  • The Kconfig currently controlling compilation of this code is:

    drivers/gpio/Kconfig:config GPIO_VF610
    drivers/gpio/Kconfig: def_bool y

    ...meaning that it currently is not being built as a module by anyone.

    Lets remove the couple traces of modular infrastructure use, so that
    when reading the driver there is no doubt it is builtin-only.

    We delete the MODULE_LICENSE tag etc. since all that information
    is now contained at the top of the file in the comments.

    We don't replace module.h with init.h since the file already has that.

    Cc: Alexandre Courbot
    Cc: Stefan Agner
    Cc: linux-gpio@vger.kernel.org
    Signed-off-by: Paul Gortmaker
    Signed-off-by: Linus Walleij

    Paul Gortmaker
     
  • The Kconfig currently controlling compilation of this code is:

    drivers/gpio/Kconfig:config GPIO_SPEAR_SPICS
    drivers/gpio/Kconfig: bool "ST SPEAr13xx SPI Chip Select as GPIO support"

    ...meaning that it currently is not being built as a module by anyone.

    Lets remove the couple traces of modular infrastructure use, so that
    when reading the driver there is no doubt it is builtin-only.

    We delete the MODULE_LICENSE tag etc. since all that information
    is now contained at the top of the file in the comments.

    Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.

    Cc: Alexandre Courbot
    Cc: Shiraz Hashim
    Cc: linux-gpio@vger.kernel.org
    Signed-off-by: Paul Gortmaker
    Signed-off-by: Linus Walleij

    Paul Gortmaker
     
  • The Kconfig currently controlling compilation of this code is:

    drivers/gpio/Kconfig:config GPIO_MXC
    drivers/gpio/Kconfig: def_bool y

    ...meaning that it currently is not being built as a module by anyone.

    Lets remove the couple traces of modular infrastructure use, so that
    when reading the driver there is no doubt it is builtin-only.

    We delete the MODULE_LICENSE tag etc. since all that information
    was (or is now) contained at the top of the file in the comments.
    Note the original e-mail had a missing/typo'd @ symbol anyway.

    We don't replace module.h with init.h since the file already has that.

    Cc: Alexandre Courbot
    Cc: Daniel Mack
    Cc: Juergen Beisert
    Cc: linux-gpio@vger.kernel.org
    Signed-off-by: Paul Gortmaker
    Signed-off-by: Linus Walleij

    Paul Gortmaker
     
  • The Kconfig currently controlling compilation of this code is:

    drivers/gpio/Kconfig:config GPIO_MSIC
    drivers/gpio/Kconfig: bool "Intel MSIC mixed signal gpio support"

    ...meaning that it currently is not being built as a module by anyone.

    Lets remove the couple traces of modular infrastructure use, so that
    when reading the driver there is no doubt it is builtin-only.

    We delete the MODULE_LICENSE tag etc. since all that information
    is already contained at the top of the file in the comments.

    We don't replace module.h with init.h since the file already has that.

    Cc: Alexandre Courbot
    Cc: Mathias Nyman
    Cc: linux-gpio@vger.kernel.org
    Signed-off-by: Paul Gortmaker
    Signed-off-by: Linus Walleij

    Paul Gortmaker
     

19 Aug, 2016

5 commits


11 Aug, 2016

7 commits

  • This patch adds support for the GPIO found in Broadcom's bcm63xx-gpio
    chips.
    This GPIO controller is used in the following Broadcom SoCs: BCM6338, BCM6345.
    It can be used in newer SoCs, without the capability of pin multiplexing.

    Signed-off-by: Christian Lamparter
    Signed-off-by: Álvaro Fernández Rojas
    Signed-off-by: Linus Walleij

    Christian Lamparter
     
  • This patch adds the device tree bindings for the Broadcom's BCM6345
    memory-mapped GPIO controllers.

    The gpios will be supported by gpio-mmio code of the
    GPIO generic library.

    Signed-off-by: Álvaro Fernández Rojas
    Signed-off-by: Linus Walleij

    Álvaro Fernández Rojas
     
  • Immutable branch between MFD and GPIO due for the v4.9 merge window

    Linus Walleij
     
  • The Diamond Systems GPIO-MM device features 48 lines of digital I/O via
    the emulation of dual 82C55A PPI chips. This driver provides GPIO
    support for these 48 channels of digital I/O. The base port addresses
    for the devices may be configured via the base array module parameter.

    Signed-off-by: William Breathitt Gray
    Signed-off-by: Linus Walleij

    William Breathitt Gray
     
  • This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
    This driver is based on gpio-crystalcove.c.

    Changes in v7:
    - Fixed various coding style comments from Andy Shevchenko
    Changes in v6:
    - Removed unnecessary wcove_gpio_remove()
    - Used devm_gpiochip_remove() instead of gpiochip_remove()
    - Various coding style changes per Mika's comment
    Changes in v5:
    - Revisited the interrupt handler code to iterate until all pending
    interrupts are handled. This change is to avoid missing interrupt
    when we're inside the interrupt handler.
    - Used regmap_bulk_read() to read address adjacent registers.
    Changes in v4:
    - Converted CTLI_INTCNT_XX macros to less verbose ones INT_DETECT_XX.
    - Add comments about why there is no .pm for the driver.
    - Header files re-ordered.
    - Various coding style change to address Andy's comments.
    Changes in v3:
    - Fixed the year in copyright line(2015-->2016).
    - Removed DRV_NAME macro.
    - Added kernel-doc for regmap_irq_chip of the wcove_gpio structure.
    - Line length fix.
    Changes in v2:
    - Typo fix (Whsikey --> Whiskey).
    - Included linux/gpio/driver.h instead of linux/gpio.h
    - Implemented .set_single_ended().
    - Added GPIO register description.
    - Replaced container_of() with gpiochip_get_data().
    - Removed unnecessary "if (gpio > WCOVE_VGPIO_NUM" check.
    - Removed the device id table and added MODULE_ALIAS().

    Signed-off-by: Ajay Thomas
    Signed-off-by: Bin Gao
    Reviewed-by: Andy Shevchenko
    Reviewed-by: Mika Westerberg
    Signed-off-by: Linus Walleij

    Bin Gao
     
  • The AXP209 PMIC has a bunch of GPIOs accessible, that are usually used to
    control LEDs or backlight.

    Add a driver for them

    Signed-off-by: Maxime Ripard
    Acked-by: Rob Herring
    Signed-off-by: Linus Walleij

    Maxime Ripard
     
  • Some i2c gpio devices are connected to a switchable power supply
    which needs to be enabled prior to probing the device. This patch
    allows the drive to enable the devices vcc regulator prior to probing.

    Signed-off-by: Phil Reid
    Signed-off-by: Linus Walleij

    Phil Reid
     

10 Aug, 2016

10 commits

  • The particularities of this variant are:
    - GPIO_XXX_LSB and GPIO_XXX_MSB memory locations are inverted compared
    to other variants.
    - There is no Edge detection, Rising Edge and Falling Edge registers.
    - IRQ flags are cleared when read, no need to write in Status register.

    Signed-off-by: Amelie DELAUNAY
    Signed-off-by: Patrice Chotard
    Reviewed-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • STMPE1600 is a 16-bit port expander.
    Datasheet is available here :
    http://www2.st.com/content/st_com/en/products/interfaces-and-transceivers/
    i-o-expanders-and-level-translators/i-o-expanders/stmpe1600.html

    Signed-off-by: Amelie DELAUNAY
    Signed-off-by: Patrice Chotard
    Acked-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • This patch adds a new compatible string for stmpe mfd to support
    stmpe1600 variant.

    Signed-off-by: Amelie DELAUNAY
    Acked-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • This update allows to use registers map as following :
    regs[reg_index + offset] instead of
    regs[reg_index] + offset

    This makes code clearer and will facilitate the addition of STMPE1600
    on which LSB and MSB registers are respectively located at addr and addr + 1.
    Despite for all others STMPE variant, LSB and MSB registers are respectively
    located in reverse order at addr + 1 and addr.

    For variant which have 3 registers's bank, we use LSB,CSB and MSB indexes
    which contains respectively LSB (or LOW), CSB (or MID) and MSB (or HIGH)
    register addresses (STMPE1801/STMPE24xx).
    For variant which have 2 registers's bank, we use LSB and CSB indexes only.
    In this case the CSB index contains the MSB regs address (STMPE 1601).

    Signed-off-by: Patrice Chotard
    Reviewed-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • this update allows to use registers map as following :
    regs[reg_index + offset] instead of
    regs[reg_index] + offset

    This makes code clearer and will facilitate the addition of STMPE1600
    on which LSB and MSB registers are respectively located at addr and addr + 1.
    Despite for all others STMPE variant, LSB and MSB registers are respectively
    located in reverse order at addr + 1 and addr.

    For variant which have 3 registers's bank, we use LSB,CSB and MSB indexes
    which contains respectively LSB (or LOW), CSB (or MID) and MSB (or HIGH)
    register addresses (STMPE1801/STMPE24xx).
    For variant which have 2 registers's bank, we use LSB and CSB indexes only.
    In this case the CSB index contains the MSB regs address (STMPE 1601).

    Signed-off-by: Patrice Chotard
    Reviewed-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • In order to prepare the ground to STMPE1600,
    as STMPE1600's SYS_CTRL register has the same layout as
    STMPE801 variant, unify STMPExxx_REG_SYS_CTRL_RESET/INT_EN/INT_HI
    bit masks to more generic STMPE_SYS_CTRL_RESET/INT_EN/INT_HI

    Signed-off-by: Patrice Chotard
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • On STMPE801/1801 datasheets, it's mentionned writing
    in interrupt status register has no effect, bits are
    cleared when reading.

    Signed-off-by: Amelie DELAUNAY
    Signed-off-by: Patrice Chotard
    Reviewed-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • By cross-checking STMPE 610/801/811/1601/2401/2403 datasheets,
    it appears that edge detection and rising/falling edge detection
    is not supported by all STMPE variant:

    GPIO GPIO
    Edge detection rising/falling
    edge detection
    610 | X | X |
    801 | | |
    811 | X | X |
    1600 | | |
    1601 | X | X |
    1801 | | X |
    2401 | X | X |
    2403 | X | X |

    Rework stmpe_dbg_show_one() and stmpe_gpio_irq to correctly
    take these cases into account.

    Signed-off-by: Patrice Chotard
    Reviewed-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • Reset was only implemented for STMPE1801 variant despite
    all variant have a SOFT_RESET bit.

    For STMPE2401/2403/801/1601/1801 SOFT_RESET bit is bit 7
    of SYS_CTRL register.
    For STMPE610/811 (which have the same variant id) SOFT_RESET
    bit is bit 1 of SYS_CTRL register.

    Signed-off-by: Patrice Chotard
    Acked-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • As STMPE1801/1601/24xx has a SYS_CTRL register and
    STMPE1601/2403 has even a SYS_CTRL2 register, add
    STMPE_IDX_SYS_CTRL/2 and update driver code accordingly

    This update prepares the ground for not yet supported STMPE1600
    which share similar REG_SYS_CTRL register.

    Signed-off-by: Patrice Chotard
    Acked-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard