14 Oct, 2011
12 commits
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Previously the fclk rate was calculated by dividing the pll through
the divider value of the armdiv. With a real armdiv clk in place it's
possible to simply read its value, which does essentially the same.This change makes the whole fdiv_fn function pointers supplied to
s3c2443_common_init_clocks and s3c2443_common_setup_clocks
obsolete, so remove it too.Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
Cpufreq uses frequencies in kHz and not Hz, so set_rate and round_rate
would be called with a frequency of 266666000 instead of 266666666 but
the clock functions check for rates smaller or equal to the targetrate.As the armdiv does not support steps this small we can accommodate
this by simply also setting the last 3 digits of the calculated rate
to zero.Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
The armdiv array may contain unset divider values.
Check the relevant value to prevent division by zero
errors. Also check for set nr_armdiv and armdivmask
before meddling with clkdiv0.Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
The system-layout of the armdiv and armclk is common to
S3C2443/S3C2416/S3C2450 and only differs in the array of
possible dividers. Therefore it is possible to reuse the
clock definitions for all of these SoCs.Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
This is needed for making the armdiv clock common to S3C2443
and S3C2416/2450.Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
The S3C2416/2450 has only 3 bits for the armdiv setting instead
of the 4 bits of the S3C2443.Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
Add voltage regulator and platform data definition for M-5MOLS sensor
and MIPI-CSI receiver drivers. Add CAM power domain dependencies for
FIMC device and set up camera port A GPIO. Configure I2C0 bus timings.Signed-off-by: Sylwester Nawrocki
Signed-off-by: HeungJun Kim
Signed-off-by: Kyungmin Park
Signed-off-by: Kukjin Kim -
This patch enables multi-format codec (MFC) support on ORIGEN board.
Signed-off-by: Sachin Kamat
Signed-off-by: Kukjin Kim -
The ADC of the S3C2416/2450 SoC is 10 or 12 bit wide, has its
source selection in the register base+0x18 and its width
selection in bit 03 of the ADCCON register.Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
The S3C2443-adc is 10 bit wide and has its mux-select
in an extra register at base+0x18Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim
12 Oct, 2011
11 commits
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The adc blocks of S3C2443 and S3C2416 contain quirks not present
in the stock S3C24xx adc. Therefore allow them to alter the
device name via s3c_adc_setname.Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
The mux bits in the adccon register should be cleared only
if muxing is really done in ADCCON and not another register.This patch introduces a conditional for this.
Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
The adc blocks of the S3C2443 and S3C2416 define some
additional registers and bits.Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
In drivers/gpio/gpio-samsung.c, there are certain structures
and functions which are not getting used if the particular
CPU is not selected. These code segments are moved under CPU
specific macros to remove compilation warnings.Signed-off-by: Tushar Behera
Acked-by: Grant Likely
Signed-off-by: Kukjin Kim -
Some of the gpio chips of exynos4 are assigned a default gpio config without
the exynos4 specific pull up/down callbacks which resulted in incorrect
setting of pull up/down configuration.Fix this by adding two new exynos4 specific entries in the array of default
configs with set_pull and get_pull callbacks set to exynos4 specific callbacks
The new default gpio configs can then be used for exynos4 gpio chips.Signed-off-by: Thomas Abraham
Signed-off-by: Kukjin Kim -
The S3C64xx CPUs have TCMs so enable the kernel support for it
on these systems.Signed-off-by: Mark Brown
Acked-by: Linus Walleij
Signed-off-by: Kukjin Kim -
Only register gpio banks provided by SoC instead of the maximum possible
to lessen confusion, get rid of a warning from gpiolib and stop it from
eating into the extra gpios for configs with S3C24XX_GPIO_EXTRA != 0.Signed-off-by: Peter Korsgaard
Signed-off-by: Kukjin Kim -
S3C_GPIO_SPACE cannont be NON-zero, not zero.
Signed-off-by: Peter Korsgaard
Signed-off-by: Kukjin Kim -
The 'nuri_cm_devices' is defined but not used.
Cc: Kyungmin Park
Signed-off-by: Kukjin Kim -
This patch registers all the available power domains on ORIGEN board.
Signed-off-by: Sachin Kamat
Signed-off-by: Kukjin Kim -
Since the DC5V line is connected directly to the HDMI connector,
"hdmi-en" regulator would become a dummy regulator on origen board
(by defining REGULATOR_DUMMY in the kernel config file).Signed-off-by: Sachin Kamat
Signed-off-by: Kukjin Kim
04 Oct, 2011
17 commits
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Add suspend-to-ram support for SMDK6440/50
Signed-off-by: Abhilash Kesavan
Signed-off-by: Kukjin Kim -
The sleep code for S5PV210 and EXYNOS4 are identical; moreover
S5p64X0 and S5PC100 for which support will be added soon can
use the same procedure. Create a common sleep code in the plat-s5p
directory so that it can be re-used.Signed-off-by: Abhilash Kesavan
Signed-off-by: Kukjin Kim -
Pave the way for adding PM support on S5P64X0, which is more similar
to the S3C64XX series than the S5P series. Hence, the common pm code
(containing dummy functions) should not be used for S5P64X0.Signed-off-by: Abhilash Kesavan
Signed-off-by: Kukjin Kim -
Conflicts:
arch/arm/plat-s5p/include/plat/pll.h -
Conflicts:
arch/arm/mach-exynos4/clock.c
arch/arm/mach-s3c2412/gpio.c
arch/arm/mach-s5p64x0/dma.c
arch/arm/mach-s5p64x0/gpiolib.c -
This patch moves header files from plat-s5p to plat-samsung to
remove plat-s5p directory to make one plat-samsung directory
for Samsung SoCs.Signed-off-by: Kukjin Kim
-
This patch moves header files from plat-s3c24xx to plat-samsung to
remove plat-s3c24xx directory to make one plat-samsung directory for
Samsung SoCs. And this patch includes fixing coding style, too.Cc: Ben Dooks
Signed-off-by: Kukjin Kim -
This patch moves SoC header files for supporting each SoCs to
plat-samsung directory. This is required to make one plat-
directory for Samsung SoCs.Cc: Ben Dooks
Signed-off-by: Kukjin Kim -
Removed
- arch/arm/plat-s3c24xx/include/plat/pll.h
- arch/arm/mach-s3c64xx/include/mach/pll.h
- arch/arm/plat-s5p/include/plat/pll.h
- arch/arm/plat-samsung/include/plat/pll6553x.hAnd created
- arch/arm/plat-samsung/include/plat/pll.hCc: Ben Dooks
[kgene.kim@samsung.com: changed title]
[kgene.kim@samsung.com: fixed conflicts in plat-s5p/include/pll.h]
Signed-off-by: Kukjin Kim -
Removed
- arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
- arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
- arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
- arch/arm/mach-s5pc100/include/mach/pwm-clock.h
- arch/arm/mach-s5pv210/include/mach/pwm-clock.h
- arch/arm/mach-exynos4/include/mach/pwm-clock.hAnd created
- arch/arm/plat-samsung/include/plat/pwm-clock.hCc: Ben Dooks
[kgene.kim@samsung.com: changed title]
Signed-off-by: Kukjin Kim -
According to commit a3831cf ("ARM: Consolidate the
clkdev header files"), current mach/clkdev.h is no
needed in Samsung stuff.Cc: Ben Dooks
Signed-off-by: Kukjin Kim -
The sdhci platform helper function that sets up the default controller
configuration is removed for all Samsung platforms since such default
controller configuration can be handled by the driver.Cc: Ben Dooks
Signed-off-by: Thomas Abraham
Signed-off-by: Kukjin Kim -
This patch adds definitions to enable support for s5p-fimc driver on
SMDKV310 board.Signed-off-by: Sachin Kamat
Signed-off-by: Kukjin Kim -
This patch adds header file protection macros to prevent duplication.
Signed-off-by: Sachin Kamat
Signed-off-by: Kukjin Kim
