18 May, 2013
1 commit
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devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.Signed-off-by: Wolfram Sang
26 Mar, 2013
8 commits
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of_get_property returns value in Big Endian format.
Before using this value it should be converted to little endian
using be32_to_cpup().
Custom configs of emif are read from dt using of_get_property,
but these are not converted to litte endian format.
Correcting the same here.Signed-off-by: Lokesh Vutla
Acked-by: Santosh Shilimkar
Signed-off-by: Greg Kroah-Hartman -
ERRATA DESCRIPTION :
The EMIF supports power-down state for low power. The EMIF
automatically puts the SDRAM into power-down after the memory is
not accessed for a defined number of cycles and the
EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE bit field is set to 0x4.
As the EMIF supports automatic output impedance calibration, a ZQ
calibration long command is issued every time it exits active
power-down and precharge power-down modes. The EMIF waits and
blocks any other command during this calibration.
The EMIF does not allow selective disabling of ZQ calibration upon
exit of power-down mode. Due to very short periods of power-down
cycles, ZQ calibration overhead creates bandwidth issues and
increases overall system power consumption. On the other hand,
issuing ZQ calibration long commands when exiting self-refresh is
still required.WORKAROUND :
Because there is no power consumption benefit of the power-down due
to the calibration and there is a performance risk, the guideline
is to not allow power-down state and, therefore, to not have set
the EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE bit field to 0x4.This is applicable only for EMIF4D IP used in OMAP4 Soc's.
Signed-off-by: Grygorii Strashko
Signed-off-by: Vitaly Chernooky
Signed-off-by: Oleksandr Dmytryshyn
Signed-off-by: Lokesh Vutla
Acked-by: Santosh Shilimkar
Signed-off-by: Greg Kroah-Hartman -
The issue was that only the first timings table was added to the
emif platform data at the emif driver registration. All other
timings tables was filled with zeros. Now all emif timings table
are added to the platform data.Signed-off-by: Oleksandr Dmytryshyn
Signed-off-by: Lokesh Vutla
Acked-by: Santosh Shilimkar
Signed-off-by: Greg Kroah-Hartman -
Some machine or kernel variants might have missed implementation
of power off handlers. We DONOT want to let the system be in
"out of spec" state in this condition. So, WARN and attempt
a machine restart in the hopes of clearing the out-of-spec
temperature condition.NOTE: This is not the safest option, but safer than leaving the
system in unstable conditions.Signed-off-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
Acked-by: Santosh Shilimkar
Signed-off-by: Greg Kroah-Hartman -
As per JESD209-2E specification for LPDDR2,
http://www.jedec.org/standards-documents/results/jesd209-2E
Table 73, LPDDR2 memories come in two flavors - Standard and
Extended. The Standard types can operate from -25C to +85C
However, beyond that and upto +105C can only be supported by
Extended types.Unfortunately, it seems there is no info in MR0(device info) or
MR[1,2](device feature) for run time detection of this capability
as far as seen on the spec. Hence, we provide a custom_config
flag to be populated by platforms which have these "extended"
type memories.For the "Standard" memories, we need to consider MR4 notifications
of temperature triggers >85C as equivalent to thermal shutdown
events (equivalent to Spec specified thermal shutdown events for
"extended" parts).Reported-by: Richard Woodruff
Signed-off-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
Acked-by: Santosh Shilimkar
Signed-off-by: Greg Kroah-Hartman -
In case the custom timings provide values which overflow
the maximum possible field value, warn and use maximum
permissible value.Signed-off-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
Acked-by: Santosh Shilimkar
Signed-off-by: Greg Kroah-Hartman -
Program the power management shadow register on freq update
Else the concept of threshold frequencies dont really matter
as the system always uses the performance mode timing for LP
which is programmed in at init time.Signed-off-by: Nishanth Menon
Signed-off-by: Ambresh K
Signed-off-by: Lokesh Vutla
Acked-by: Santosh Shilimkar
Signed-off-by: Greg Kroah-Hartman -
The driver tries to round up the specified timeout cycles to
the next power of 2 value. This should be done defore updating
timeout variable.
Correcting this here.Reported-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
Acked-by: Santosh Shilimkar
Signed-off-by: Greg Kroah-Hartman
16 Mar, 2013
1 commit
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This patch converts the drivers to use the
module_platform_driver_probe() macro which makes the code smaller and
a bit simpler.Signed-off-by: Fabio Porcedda
Cc: Benoit Cousson
Cc: Aneesh V
Signed-off-by: Greg Kroah-Hartman
23 Jan, 2013
1 commit
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Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.devm_ioremap_resource() provides its own error messages so all explicit
error messages can be removed from the failure code paths.Signed-off-by: Thierry Reding
Signed-off-by: Greg Kroah-Hartman
27 Sep, 2012
1 commit
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Add ifdef CONFIG_DEBUG_FS guard for emif_debugfs_[init|exit], and adds stub
functions for the case CONFIG_DEBUG_FS is not set.When CONFIG_DEBUG_FS is enabled, debugfs_create_dir and debugfs_create_file
return NULL on failure, fix it.Signed-off-by: Axel Lin
Acked-by : Santosh Shilimkar
Signed-off-by: Greg Kroah-Hartman
05 Sep, 2012
1 commit
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Device tree support for the EMIF driver. LPDDR2 generic timings
extraction from device is managed using couple of helper
functions which can be used by other memory controller
drivers.Reviewed-by: Benoit Cousson
Reviewed-by: Grant Likely
Tested-by: Lokesh Vutla
Signed-off-by: Aneesh V
Signed-off-by: Santosh Shilimkar
Cc: Greg Kroah-Hartman
Signed-off-by: Greg Kroah-Hartman
03 May, 2012
4 commits
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Add debug entries for:
1. calculated registers per frequency
2. last polled value of MR4(temperature level
of LPDDR2 memory)Signed-off-by: Aneesh V
Reviewed-by: Santosh Shilimkar
Reviewed-by: Benoit Cousson
[santosh.shilimkar@ti.com: Moved to drivers/memory from drivers/misc]
Signed-off-by: Santosh Shilimkar
Tested-by: Lokesh Vutla
Signed-off-by: Greg Kroah-Hartman -
Add settings that are not dependent on frequency
or any other transient parameters. This includes
- power managment control init
- impedence calibration control
- frequency independent phy configuration registers
- initialization of temperature pollingSigned-off-by: Aneesh V
Reviewed-by: Santosh Shilimkar
Reviewed-by: Benoit Cousson
[santosh.shilimkar@ti.com: Moved to drivers/memory from drivers/misc]
Signed-off-by: Santosh Shilimkar
Tested-by: Lokesh Vutla
Signed-off-by: Greg Kroah-Hartman -
Add an ISR for EMIF that:
1. reports details of access errors
2. takes action on thermal eventsAlso clear all interrupts on shut-down. Pending IRQs
may casue problems during warm-reset.Temperature handling:
EMIF can be configured to poll the temperature level
of an LPDDR2 device from the MR4 mode register in the
device. EMIF generates an interrupt whenever it identifies
a temperature level change between two consecutive pollings.Some of the timing parameters need to be de-rated at high
temperatures. The interrupt handler takes care of doing
this and also takes care of going back to nominal settings
when temperature falls back to nominal levels.Signed-off-by: Aneesh V
Reviewed-by: Santosh Shilimkar
Reviewed-by: Benoit Cousson
[santosh.shilimkar@ti.com: Moved to drivers/memory from drivers/misc]
Signed-off-by: Santosh Shilimkar
Signed-off-by: Greg Kroah-Hartman -
Change SDRAM timings and other settings as necessary
on voltage and frequency changes. We calculate these
register settings based on data from the device data
sheet and inputs such a frequency, voltage state(stable
or ramping), temperature level etc.TODO: frequency and voltage change handling needs to
be integrated with clock framework and regulator
framework respectively. This is not done today
due to missing pieces in the kernel.Signed-off-by: Aneesh V
Reviewed-by: Santosh Shilimkar
Reviewed-by: Benoit Cousson
[santosh.shilimkar@ti.com: Moved to drivers/memory from drivers/misc]
Signed-off-by: Santosh Shilimkar
Tested-by: Lokesh Vutla
Signed-off-by: Greg Kroah-Hartman
02 May, 2012
1 commit
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EMIF is an SDRAM controller used in various Texas Instruments
SoCs. EMIF supports, based on its revision, one or more of
LPDDR2/DDR2/DDR3 protocols.Add the basic infrastructure for EMIF driver that includes
driver registration, probe, parsing of platform data etc.Signed-off-by: Aneesh V
Reviewed-by: Santosh Shilimkar
Reviewed-by: Benoit Cousson
[santosh.shilimkar@ti.com: Moved to drivers/memory from drivers/misc]
Signed-off-by: Santosh Shilimkar
Tested-by: Lokesh Vutla
Signed-off-by: Greg Kroah-Hartman