22 Feb, 2019
2 commits
-
After system suspend, CQE is in cqhci_off state, which set the HALT bit, make
CQE in HALT state. If the SoC do not power down the USDHC module, then when
system resume back, this bit keep the same, still set. So need to clear this
bit when enable CQE for the first request after system resume back. If not,
imx8mm will stuck in the first CMDQ request after system resume back. On
imx8qxp and imx8qm, we do not find this issue because usdhc module lost power
during system suspend/resume, and all the register return to the default reset
value, and the reset value of bit HALT is 0.Signed-off-by: Haibo Chen
(cherry picked from commit 49d6f5d5cca3a66fa65568a50f75cbbac87ba312) -
the commit 885c943ca13d ("ENGR00288842 mmc: sdhci-esdhc-imx: add
ADMA Length Mismatch errata fix") involve the fix of ERR004536.
But double confirm with IC, need to clear the bit 7 of register
0x6c rather than set this bit 7.
here is the function of bit 7 of 0x6c:
0: enable the new IC fix for ERR004536
1: do not use the IC fix, keep the same as beforeDue to the reset value of this bit 7 is 0, and ROM code also do not
touch this bit 7, so this patch directly remove the operation of this
bit 7, make sure the fix of ERR004536 can work.Note, for all versons of 6DQP 6DQ 6DL and 6SL, IC do not has this
hardware fix, so writing this bit has no effect and we keep using
ADMA as before which has been used for several years with the
consideration of no performance drop.For other SoC like imx6SLL imx6SX imx6UL/imx6ULL imx7 imx8, IC already
contain this hareware fix, so must make sure the bit 7 of the register
0x6c is 0. If not, we meet the ADMA length mismatch error on imx8mm-evk
and imx8qxp-ddr3l-val board when enable CMDQ.Signed-off-by: Haibo Chen
(cherry picked from commit 2ea2f2b374545ff63a714fabc16c0d7c6b3b47b6)
12 Feb, 2019
38 commits
-
The bit ESDHC_STD_TUNING_EN may be configed by bootloader code if
it choose to use standard tuning method. So on linux side, if
choose to use manual tuning method, need to clear the bit
ESDHC_STD_TUNING_EN, remove the impact of bootloader code.Reviewed-by: Dong Aisheng
Signed-off-by: Haibo Chen -
CID 4058489: Unchecked return value (CHECKED_RETURN)
2. check_return: Calling dma_set_mask_and_coherent without checking
return value. -
The field support_vsel is currently only used in the device tree
case. Get rid of it. No change in behavior.Signed-off-by: Stefan Agner
Signed-off-by: Ulf Hansson
(cherry picked from commit 86f495c57f7146bc5d363d27483957928bb9d1d8) -
For some eMMC, after switch to HS400ES mode, it need to config the strobe
dll target dealy even if the clock is 50MHZ or 25MHz, otherwise will meet
CMD index/crc error when send CMD13 to check the switch status. Take
imx8MM-EVK board as example, without this patch, it will meet:[ 2.473915] IRQ status 0x000a8001
[ 2.473930] the mmc send status get -84
[ 2.473934] mmc2: mmc_select_hs400es failed, error -84
[ 2.473938] mmc2: error -84 whilst initialising MMC cardAnd we also meet some customer require to let eMMC work at 80MHz HS400ES
mode, so here remove the 100MHz limitation for Strobe DLL target delay
setting.Signed-off-by: Haibo Chen
-
It's observed that uSDHC needed delay between tuning cycles for
HS200 successful tuning. This patch is to set 1ms delay for that.Signed-off-by: Haibo Chen
-
When using jailhouse to support two Linux on i.MX8MQ EVK,
we use the 1st Linux to configure pinctrl for the 2nd Linux.
Then the 2nd Linux could use the mmc without pinctrl driver.So give a warning message when no pinctrl available, but no fail probe.
Signed-off-by: Peng Fan
(cherry picked from commit 0ededa450d69016a72755b428f89d149666d7968) -
Add HS400 support for iMX7ULP B0.
According to IC suggest, need to clear the STROBE_DLL_CTRL_RESET
before any setting of STROBE_DLL_CTRL register.USDHC has register bits(bit[27~20] of register STROBE_DLL_CTRL)
for slave sel vaule. If this register bits value is 0, it needs
256 ref_clk cycles to update slave sel value. IC suggest to set
bit[27~20] to 0x4, it only need 4 ref_clk cycle to update slave
sel vaule. This will short the lock time of slave.i.MX7ULP B0 will need more time to lock the REF and SLV, so change
to add another 5us delay.Acked-by: Dong Aisheng
Signed-off-by: Haibo Chen -
Android report data timeout issue on the Micron eMMC of i.mx8mscale
evk board. Before using CMD25 to write multi block data, driver will
use CMD6 to flush cache. But some CMD25 will get both data timeout
interrupt and transfer complete interrupt. If add delay after busy
check, and before sending CMD13, this issue gone.We meet similar issue on Sandisk eMMC before, and already have a
commit 581925fe325a ("MLK-11685-1 mmc: add delay after CMD6 befoer
sending CMD13 for sandisk"), but when cherry-pick to 4.9 branch,
meet conflicts, put the delay in the wrong place. So meet the similar
issue again.This patch fix this, move the dealy in the right place, right before
CMD13.Reviewed-by: Dong Aisheng
Signed-off-by: Haibo Chen -
Add feature of setting slot index via devicetree alias, to hard code the
mmc/sd root device.The patch requires additional alias_id fix or it won't work.
Note: minor device number keep independent with this device alias.
Refer to the commit 35928d6c6a76 ("mmc: Allow setting slot index via
devicetree alias").Acked-by: Leonard Crestez
Reviewed-by: Dong Aisheng
Signed-off-by: Haibo Chen -
make sure clock is disabled during suspend
Reviewed-by: Haibo Chen
Signed-off-by: Dong Aisheng -
Fix lockdep splat introduced in v4.13-rc4.
[ 266.297226] ------------[ cut here ]------------
[ 266.300078] WARNING: CPU: 2 PID: 176 at /mnt/src/jaja/git/tf300t/include/linux/blkdev.h:657 mmc_blk_remove_req+0xd0/0xe8 [mmc_block]
[ 266.302937] Modules linked in: mmc_block(-) sdhci_tegra sdhci_pltfm sdhci pwrseq_simple pwrseq_emmc mmc_core
[ 266.305941] CPU: 2 PID: 176 Comm: rmmod Tainted: G W 4.13.0-rc4mq-00208-gb691e67724b8-dirty #694
[ 266.308852] Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
[ 266.311719] [] (unwind_backtrace) from [] (show_stack+0x18/0x1c)
[ 266.314664] [] (show_stack) from [] (dump_stack+0x84/0x98)
[ 266.317644] [] (dump_stack) from [] (__warn+0xf4/0x10c)
[ 266.320542] [] (__warn) from [] (warn_slowpath_null+0x28/0x30)
[ 266.323534] [] (warn_slowpath_null) from [] (mmc_blk_remove_req+0xd0/0xe8 [mmc_block])
[ 266.326568] [] (mmc_blk_remove_req [mmc_block]) from [] (mmc_blk_remove_parts.constprop.6+0x50/0x64 [mmc_block])
[ 266.329678] [] (mmc_blk_remove_parts.constprop.6 [mmc_block]) from [] (mmc_blk_remove+0x24/0x140 [mmc_block])
[ 266.332894] [] (mmc_blk_remove [mmc_block]) from [] (mmc_bus_remove+0x20/0x28 [mmc_core])
[ 266.336198] [] (mmc_bus_remove [mmc_core]) from [] (device_release_driver_internal+0x164/0x200)
[ 266.339367] [] (device_release_driver_internal) from [] (driver_detach+0x40/0x74)
[ 266.342537] [] (driver_detach) from [] (bus_remove_driver+0x68/0xdc)
[ 266.345660] [] (bus_remove_driver) from [] (mmc_blk_exit+0xc/0x2cc [mmc_block])
[ 266.348875] [] (mmc_blk_exit [mmc_block]) from [] (SyS_delete_module+0x1c4/0x254)
[ 266.352068] [] (SyS_delete_module) from [] (ret_fast_syscall+0x0/0x34)
[ 266.355308] ---[ end trace f68728a0d3053b72 ]---Fixes: 7c84b8b43d3d ("mmc: block: bypass the queue even if usage is present for hotplug")
Signed-off-by: Michał Mirosław
Reviewed-by: Shawn Lin
Signed-off-by: Ulf Hansson
(cherry picked from commit 3f8b23a09a87aa65df3e13129cb2d9cffcb394db) -
strobe-dll-delay-target is the delay cell add on the strobe line.
Strobe line the the uSDHC loopback read clock which is use in HS400
mode. Different strobe-dll-delay-target may need to set for different
board/SoC. If this delay cell is not set to an appropriate value,
we may see some read operation meet CRC error after HS400 mode select
which already pass the tuning.This patch add the strobe-dll-delay-target setting in driver, so that
user can easily config this delay cell in dts file.Signed-off-by: Haibo Chen
Reviewed-by: Dong Aisheng -
The default max segment size of IOMMU is 64KB, which exceed the ADMA
limitation. ADMA only support max to 65535, 64KB - 1Byte. IOMMU will
optimize the segments it received, merge the little segment into one
big segment. If we use the default IOMMU config, then ADMA will get
some segments which it's size is 64KB. Then ADMA error will shows up.Currently, when use standard tuning, driver default disable DMA. But
on i.MX usdhc, this is not enough. Need also clear DMA_SEL. If not,
once the DMA_SEL select AMDA2, even dma already disabled, when send
tuning command, usdhc will still prefetch the ADMA script from wrong
DMA address, then we will see IOMMU report some error which show
lack of TLB mapping.This patch fix these two issue, make sure usdhc can work well by
operate data through IOMMU.Signed-off-by: Haibo Chen
-
The commit 304419d8a7e9 ("mmc: core: Allocate per-request data using the
block layer core") refactored mechanism of queue handling caused
mmc_init_request() can be called just after mmc_cleanup_queue() caused null
pointer dereference.Another commit bbdc74dc19e0 ("mmc: block: Prevent new req entering queue
after its cleanup") tried to fix the problem. However it actually miss one
corner case.We could still reproduce the issue mentioned with these steps:
(1) insert a SD card and mount it
(2) hotplug it, so it will leave md->usage still be counted
(3) reboot the system which will sync data and umount the card[Unable to handle kernel NULL pointer dereference at virtual address
00000000
[user pgtable: 4k pages, 48-bit VAs, pgd = ffff80007bab3000
[[0000000000000000] *pgd=000000007a828003, *pud=0000000078dce003,
*pmd=000000007aab6003, *pte=0000000000000000
[Internal error: Oops: 96000007 [#1] PREEMPT SMP
[Modules linked in:
[CPU: 3 PID: 3507 Comm: umount Tainted: G W
4.13.0-rc1-next-20170720-00012-g9d9bf45 #33
[Hardware name: Firefly-RK3399 Board (DT)
[task: ffff80007a1de200 task.stack: ffff80007a01c000
[PC is at mmc_init_request+0x14/0xc4
[LR is at alloc_request_size+0x4c/0x74
[pc : [] lr : [] pstate: 600001c5
[sp : ffff80007a01f8f0....
[[] mmc_init_request+0x14/0xc4
[[] alloc_request_size+0x4c/0x74
[[] mempool_create_node+0xb8/0x17c
[[] blk_init_rl+0x9c/0x120
[[] blkg_alloc+0x110/0x234
[[] blkg_create+0x424/0x468
[[] blkg_lookup_create+0xd8/0x14c
[[] generic_make_request_checks+0x368/0x3b0
[[] generic_make_request+0x1c/0x240So mmc_blk_put wouldn't calling blk_cleanup_queue which actually the
QUEUE_FLAG_DYING and QUEUE_FLAG_BYPASS should stay. Block core expect
blk_queue_bypass_{start, end} internally to bypass/drain the queue before
actually dying the queue, so it didn't expose API to set the queue bypass.
I think we should set QUEUE_FLAG_BYPASS whenever queue is removed, although
the md->usage is still counted, as no dispatch queue could be found then.Fixes: 304419d8a7e9 ("mmc: core: Allocate per-request data using the block layer core")
Signed-off-by: Shawn Lin
Reviewed-by: Linus Walleij
Signed-off-by: Ulf Hansson
(cherry picked from commit 7c84b8b43d3d550fa6f0b57277d03f2e1bafb357) -
The commit 304419d8a7e9 ("mmc: core: Allocate per-request data using the
block layer core"), refactored the mechanism of queue handling, but also
made mmc_init_request() to be called after mmc_cleanup_queue(). This
triggers a null pointer dereference:[ 683.123791] BUG: unable to handle kernel NULL pointer dereference at (null)
[ 683.123801] IP: mmc_init_request+0x2c/0xf0 [mmc_block]
...
[ 683.123905] Call Trace:
[ 683.123913] alloc_request_size+0x4f/0x70
[ 683.123919] mempool_alloc+0x5f/0x150
[ 683.123925] ? __enqueue_entity+0x6c/0x70
[ 683.123928] get_request+0x3ad/0x720
[ 683.123933] ? prepare_to_wait_event+0x110/0x110
[ 683.123937] blk_queue_bio+0xc1/0x3a0
[ 683.123940] generic_make_request+0xf8/0x2a0
[ 683.123942] submit_bio+0x75/0x150
[ 683.123947] submit_bio_wait+0x51/0x70
[ 683.123951] blkdev_issue_flush+0x5c/0x90
[ 683.123956] ext4_sync_fs+0x171/0x1b0
[ 683.123961] sync_filesystem+0x73/0x90
[ 683.123965] fsync_bdev+0x24/0x50
[ 683.123971] invalidate_partition+0x24/0x50
[ 683.123973] del_gendisk+0xb2/0x2a0
[ 683.123977] mmc_blk_remove_req.part.38+0x71/0xa0 [mmc_block]
[ 683.123980] mmc_blk_remove+0xba/0x190 [mmc_block]
[ 683.123990] mmc_bus_remove+0x1a/0x20 [mmc_core]
[ 683.123995] device_release_driver_internal+0x141/0x200
[ 683.123999] device_release_driver+0x12/0x20
[ 683.124001] bus_remove_device+0xfd/0x170
[ 683.124004] device_del+0x1e8/0x330
[ 683.124012] mmc_remove_card+0x60/0xc0 [mmc_core]
[ 683.124019] mmc_remove+0x19/0x30 [mmc_core]
[ 683.124025] mmc_stop_host+0xfb/0x1a0 [mmc_core]
[ 683.124032] mmc_remove_host+0x1a/0x40 [mmc_core]
[ 683.124037] sdhci_remove_host+0x2e/0x1c0 [mmc_sdhci]
[ 683.124042] sdhci_pci_remove_slot+0x3f/0x80 [sdhci_pci]
[ 683.124045] sdhci_pci_remove+0x39/0x70 [sdhci_pci]
[ 683.124049] pci_device_remove+0x39/0xc0
[ 683.124052] device_release_driver_internal+0x141/0x200
[ 683.124056] driver_detach+0x3f/0x80
[ 683.124059] bus_remove_driver+0x55/0xd0
[ 683.124062] driver_unregister+0x2c/0x50
[ 683.124065] pci_unregister_driver+0x29/0x90
[ 683.124069] sdhci_driver_exit+0x10/0x4f3 [sdhci_pci]
[ 683.124073] SyS_delete_module+0x171/0x250
[ 683.124078] entry_SYSCALL_64_fastpath+0x1e/0xa9Fix this by setting the queue DYING flag before cleanup the queue, as it
prevents new reqs from entering the queue.Signed-off-by: Grzegorz Sluja
Signed-off-by: Linus Walleij
Fixes: 304419d8a7e9 ("mmc: core: Allocate per-request data using the...")
[Ulf: Updated the changelog]
Signed-off-by: Ulf Hansson(cherry picked from commit bbdc74dc19e09ac4e71bfb219596b3d5bc786720)
-
When the last ready-buffer-ready is set, then usdhc execute-tuning
bit is clear, this means usdhc finish the tuning process, but at
this time, sd/mmc card may still out put the tuning data, can't
response to any command. So this patch add 1ms delay when usdhc
finish the tuning, make sure sd/mmc card finish sending the tuning
data, then sd/mmc can response the following command normally.Signed-off-by: Haibo Chen
Reviewed-by: Dong Aisheng -
Currently, USDHC do not generate transfer complete interrupt
when send a non-data-command with R1b response. But if want
to support DCMD in CMDQ, need to change this, the DCMD IC
logic require the USDHC to enable this function, otherwise
DCMD will never get a CC(command complete) interrupt.This patch set ESDHC_VEND_SPEC2_EN_BUSY_IRQ and add DCMD support.
Signed-off-by: Haibo Chen
Reviewed-by: Dong Aisheng -
Add CMDQ support for imx8qm/imx8qxp.
Signed-off-by: Haibo Chen
Reviewed-by: Dong Aisheng -
Priority use the callback set_timeout() to set the maximum timeout
if the host has.Signed-off-by: Haibo Chen
Reviewed-by: Dong Aisheng -
This patch adds CMDQ support for command-queue compatible
hosts.Command queue is added in eMMC-5.1 specification. This
enables the controller to process upto 32 requests at
a time.Adrian Hunter contributed renaming to cqhci, recovery, suspend
and resume, cqhci_off, cqhci_wait_for_idle, and external timeout
handling.Signed-off-by: Asutosh Das
Signed-off-by: Sujit Reddy Thumma
Signed-off-by: Konstantin Dorfman
Signed-off-by: Venkat Gopalakrishnan
Signed-off-by: Subhash Jadavani
Signed-off-by: Ritesh Harjani
Signed-off-by: Adrian Hunter
Acked-by: Linus Walleij
Signed-off-by: Ulf Hansson
Tested-by: Linus Walleij
(cherry picked from commit a4080225f51dcea129d26185a35acfbb3770a32d) -
Add CQE support to the block driver, including:
- optionally using DCMD for flush requests
- "manually" issuing discard requests
- issuing read / write requests to the CQE
- supporting block-layer timeouts
- handling recovery
- supporting re-tuningCQE offers 25% - 50% better random multi-threaded I/O. There is a slight
(e.g. 2%) drop in sequential read speed but no observable change to sequential
write.CQE automatically sends the commands to complete requests. However it only
supports reads / writes and so-called "direct commands" (DCMD). Furthermore
DCMD is limited to one command at a time, but discards require 3 commands.
That makes issuing discards through CQE very awkward, but some CQE's don't
support DCMD anyway. So for discards, the existing non-CQE approach is
taken, where the mmc core code issues the 3 commands one at a time i.e.
mmc_erase(). Where DCMD is used, is for issuing flushes.Signed-off-by: Adrian Hunter
Acked-by: Linus Walleij
Signed-off-by: Ulf Hansson
Tested-by: Linus Walleij
(cherry picked from commit 1e8e55b67030c6a2fef893d428bdcd611f73705c) -
Define and use a blk-mq queue. Discards and flushes are processed
synchronously, but reads and writes asynchronously. In order to support
slow DMA unmapping, DMA unmapping is not done until after the next request
is started. That means the request is not completed until then. If there is
no next request then the completion is done by queued work.Signed-off-by: Adrian Hunter
Acked-by: Linus Walleij
Signed-off-by: Ulf Hansson
Tested-by: Linus Walleij
(cherry picked from commit 81196976ed946cbf36bb41ddda402853c7df7cfa) -
Until mmc has blk-mq support fully implemented and tested, add a parameter
use_blk_mq, set to true if config option MMC_MQ_DEFAULT is selected, which
it is by default.Signed-off-by: Adrian Hunter
Acked-by: Linus Walleij
Signed-off-by: Ulf Hansson
Tested-by: Linus Walleij
(cherry picked from commit c3d53d0da69d127f488dc85638e9440220b268e8) -
Make mmc_pre_req() and mmc_post_req() available to the card drivers. Later
patches will make use of this.Signed-off-by: Adrian Hunter
Acked-by: Linus Walleij
Signed-off-by: Ulf Hansson
Tested-by: Linus Walleij
(cherry picked from commit afab1bb8b40c61458e009fdc323c9740f95fcd5b) -
Use blk_cleanup_queue() to shutdown the queue when the driver is removed,
and instead get an extra reference to the queue to prevent the queue being
freed before the final mmc_blk_put().Signed-off-by: Adrian Hunter
Acked-by: Linus Walleij
Signed-off-by: Ulf Hansson
Tested-by: Linus Walleij
(cherry picked from commit 41e3efd07d5a02c80f503e29d755aa1bbb4245de) -
The following functions are needed by the mmc block device driver, once it
converts to blkmq, therefore let's export them.mmc_start_bkops()
mmc_start_request()
mmc_retune_hold_now()
mmc_retune_release()Signed-off-by: Adrian Hunter
Reviewed-by: Linus Walleij
Signed-off-by: Ulf Hansson
(cherry picked from commit cb39f61e9b1e675c8df86df69d53f08334b34077) -
Factor out some common code that will also be used with blk-mq.
Signed-off-by: Adrian Hunter
Reviewed-by: Linus Walleij
Signed-off-by: Ulf Hansson
(cherry picked from commit c8b5fd031a3004dc382e201f69ea9a44ec62c04f) -
Currently the host can be claimed by a task. Change this so that the host
can be claimed by a context that may or may not be a task. This provides
for the host to be claimed by a block driver queue to support blk-mq, while
maintaining compatibility with the existing use of mmc_claim_host().Signed-off-by: Adrian Hunter
Signed-off-by: Ulf Hansson
(cherry picked from commit 6c0cedd1ef9527ef13e66875746570e76a3188a7)Adjust for small imx changes in debugfs
Signed-off-by: Leonard Crestez
-
Enhance mmc_blk_data_prep() to support CQE requests. That means adding
some things that for non-CQE requests would be encoded into the command
arguments - such as the block address, reliable-write flag, and data tag
flag. Also the request tag is needed to provide the command queue task id,
and a comment is added to explain the future possibility of defining a
priority.Signed-off-by: Adrian Hunter
Reviewed-by: Linus Walleij
Signed-off-by: Ulf Hansson
(cherry picked from commit 93482b3d70c2120aadb0f1d1281a59199866e70a) -
Use local variables in mmc_blk_data_prep() in preparation for adding CQE
support which doesn't use the output variables.Signed-off-by: Adrian Hunter
Reviewed-by: Linus Walleij
Signed-off-by: Ulf Hansson
(cherry picked from commit d3377c012f4d7a0a822e289f1effba997da3e295) -
Enable or disable CQE when a card is added or removed respectively.
Signed-off-by: Adrian Hunter
Reviewed-by: Linus Walleij
Signed-off-by: Ulf Hansson
(cherry picked from commit f690f4409ddd79a481efddaf6e4cb65cf1a747cb) -
Enable the Command Queue if the host controller supports a command queue
engine. It is not compatible with Packed Commands, so make a note of that in the
comment.Signed-off-by: Adrian Hunter
Reviewed-by: Linus Walleij
Signed-off-by: Ulf Hansson
(cherry picked from commit 98d4f7809d99bbf456f93816ef9895616cdd1b2d) -
Add core support for handling CQE requests, including starting, completing
and recovering.Signed-off-by: Adrian Hunter
Reviewed-by: Linus Walleij
Signed-off-by: Ulf Hansson
(cherry picked from commit 72a5af554df837e373efb0d6c8fc68c568f9a7ac) -
When pm_runtime_suspend is run, a call to SCFW power off the SS in
which the resource resides is made. The SCFW can power off the SS
if no other resource in active in tha SS. If so, all state associated
with all the resources within the SS that is powered off is lost,
this includes the clock rates, clock state etc. When pm_runtime_resume
is called, the SS associated with that resource is powered up. But
the clocks are left in the default state.This patch restore clock rate in pm_runtime_resume, make sure the
clock is right rather than depending on the default state setting
by SCFW.Signed-off-by: Haibo Chen
-
i.MX8QXP and i.MX8QM support Enhanced Strobe HS400 mode. This patch
add HS400_ES mode support, due to HS400_ES do not need tuning, select
HS400_ES mode should be faster than select HS400/HS200 mode.Signed-off-by: Haibo Chen
-
Add imx8qm esdhc_soc_data for i.MX8QM and i.MX8QXP.
Signed-off-by: Haibo Chen
-
commit 3f0191b80cf1 ("MLK-14381 mmc: sdhci-esdhc-imx: reset tuning
circuit when system resume") add tuning reset when the timing is
MMC_TIMING_LEGACY/MMC_TIMING_MMC_HS/MMC_TIMING_SD_HS. For timing
MMC_TIMING_MMC_HS, we can not do tuning reset, otherwise HS400
timing is not right.Here is the process of config HS400, it do tuning in HS200 mode,
then switch to HS mode and 8 bit DDR mode, finally switch to HS400
mode. If we do tuning reset in HS mode, this will cause HS400 mode
lost the tuning setting, which will cause CRC error.Signed-off-by: Haibo Chen
-
Add ARCH_MXC_ARM64 for i.MX mmc driver to support
ARM64 platforms.Signed-off-by: Anson Huang
