18 Dec, 2014

1 commit

  • Pull MTD updates from Brian Norris:
    "Summary:
    - Add device tree support for DoC3

    - SPI NOR:
    Refactoring, for better layering between spi-nor.c and its
    driver users (e.g., m25p80.c)

    New flash device support

    Support 6-byte ID strings

    - NAND:
    New NAND driver for Allwinner SoC's (sunxi)

    GPMI NAND: add support for raw (no ECC) access, for testing
    purposes

    Add ATO manufacturer ID

    A few odd driver fixes

    - MTD tests:
    Allow testers to compensate for OOB bitflips in oobtest

    Fix a torturetest regression

    - nandsim: Support longer ID byte strings

    And more"

    * tag 'for-linus-20141215' of git://git.infradead.org/linux-mtd: (63 commits)
    mtd: tests: abort torturetest on erase errors
    mtd: physmap_of: fix potential NULL dereference
    mtd: spi-nor: allow NULL as chip name and try to auto detect it
    mtd: nand: gpmi: add raw oob access functions
    mtd: nand: gpmi: add proper raw access support
    mtd: nand: gpmi: add gpmi_copy_bits function
    mtd: spi-nor: factor out write_enable() for erase commands
    mtd: spi-nor: add support for s25fl128s
    mtd: spi-nor: remove the jedec_id/ext_id
    mtd: spi-nor: add id/id_len for flash_info{}
    mtd: nand: correct the comment of function nand_block_isreserved()
    jffs2: Drop bogus if in comment
    mtd: atmel_nand: replace memcpy32_toio/memcpy32_fromio with memcpy
    mtd: cafe_nand: drop duplicate .write_page implementation
    mtd: m25p80: Add support for serial flash Spansion S25FL132K
    MTD: m25p80: fix inconsistency in m25p_ids compared to spi_nor_ids
    mtd: spi-nor: improve wait-till-ready timeout loop
    mtd: delete unnecessary checks before two function calls
    mtd: nand: omap: Fix NAND enumeration on 3430 LDP
    mtd: nand: add ATO manufacturer info
    ...

    Linus Torvalds
     

15 Dec, 2014

1 commit

  • Pull driver core update from Greg KH:
    "Here's the set of driver core patches for 3.19-rc1.

    They are dominated by the removal of the .owner field in platform
    drivers. They touch a lot of files, but they are "simple" changes,
    just removing a line in a structure.

    Other than that, a few minor driver core and debugfs changes. There
    are some ath9k patches coming in through this tree that have been
    acked by the wireless maintainers as they relied on the debugfs
    changes.

    Everything has been in linux-next for a while"

    * tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits)
    Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries"
    fs: debugfs: add forward declaration for struct device type
    firmware class: Deletion of an unnecessary check before the function call "vunmap"
    firmware loader: fix hung task warning dump
    devcoredump: provide a one-way disable function
    device: Add dev__once variants
    ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries
    ath: use seq_file api for ath9k debugfs files
    debugfs: add helper function to create device related seq_file
    drivers/base: cacheinfo: remove noisy error boot message
    Revert "core: platform: add warning if driver has no owner"
    drivers: base: support cpu cache information interface to userspace via sysfs
    drivers: base: add cpu_device_create to support per-cpu devices
    topology: replace custom attribute macros with standard DEVICE_ATTR*
    cpumask: factor out show_cpumap into separate helper function
    driver core: Fix unbalanced device reference in drivers_probe
    driver core: fix race with userland in device_add()
    sysfs/kernfs: make read requests on pre-alloc files use the buffer.
    sysfs/kernfs: allow attributes to request write buffer be pre-allocated.
    fs: sysfs: return EGBIG on write if offset is larger than file size
    ...

    Linus Torvalds
     

13 Dec, 2014

2 commits

  • The torture test should quit once it actually induces an error in the
    flash. This step was accidentally removed during refactoring.

    Without this fix, the torturetest just continues infinitely, or until
    the maximum cycle count is reached. e.g.:

    ...
    [ 7619.218171] mtd_test: error -5 while erasing EB 100
    [ 7619.297981] mtd_test: error -5 while erasing EB 100
    [ 7619.377953] mtd_test: error -5 while erasing EB 100
    [ 7619.457998] mtd_test: error -5 while erasing EB 100
    [ 7619.537990] mtd_test: error -5 while erasing EB 100
    ...

    Fixes: 6cf78358c94f ("mtd: mtd_torturetest: use mtd_test helpers")
    Signed-off-by: Brian Norris
    Cc: Akinobu Mita
    Cc:

    Brian Norris
     
  • On device remove, when testing the cmtd field of an of_flash
    struct to decide whether it is a concatenated device or not,
    we get a false positive on cmtd == NULL, and dereference it
    subsequently. This may occur if of_flash_remove() is called
    from the cleanup path of of_flash_probe().

    Instead, test for NULL first, and only then perform the test
    for a concatenated device.

    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Brian Norris

    Ard Biesheuvel
     

02 Dec, 2014

1 commit


01 Dec, 2014

7 commits

  • Implement raw OOB access functions to retrieve OOB bytes when accessing the
    NAND in raw mode.

    Signed-off-by: Boris Brezillon
    Tested-by: Huang Shijie
    Signed-off-by: Brian Norris

    Boris BREZILLON
     
  • Several MTD users (either in user or kernel space) expect a valid raw
    access support to NAND chip devices.
    This is particularly true for testing tools which are often touching the
    data stored in a NAND chip in raw mode to artificially generate errors.

    The GPMI drivers do not implemenent raw access functions, and thus rely on
    default HW_ECC scheme implementation.
    The default implementation consider the data and OOB area as properly
    separated in their respective NAND section, which is not true for the GPMI
    controller.
    In this driver/controller some OOB data are stored at the beginning of the
    NAND data area (these data are called metadata in the driver), then ECC
    bytes are interleaved with data chunk (which is similar to the
    HW_ECC_SYNDROME scheme), and eventually the remaining bytes are used as
    OOB data.

    Signed-off-by: Boris Brezillon
    Tested-by: Huang Shijie
    Signed-off-by: Brian Norris

    Boris BREZILLON
     
  • Add a new function to copy bits (not bytes) from a memory region to
    another one.
    This function is similar to memcpy except it acts at bit level.
    It is needed to implement GPMI raw access functions and adapt to the
    hardware ECC engine which does not pad ECC bits to the next byte boundary.

    Signed-off-by: Boris Brezillon
    Tested-by: Huang Shijie
    Signed-off-by: Brian Norris

    Boris BREZILLON
     
  • write_enable() was being duplicated to both m25p80.c and fsl-quadspi.c.
    But this should be handled within the spi-nor abstraction layer.

    At the same time, let's add write_disable() after erasing, so we don't
    leave the flash in a write-enabled state afterward.

    Signed-off-by: Brian Norris
    Acked-by: Huang Shijie

    Brian Norris
     
  • We need to store the six bytes ID for s25fl128s, since it shares the same
    five bytes with s25fl129p1.

    This patch adds a macro INFO6 which is used for the six bytes ID flash, and adds
    a new item for the s25fl128s.

    Signed-off-by: Huang Shijie
    Signed-off-by: Brian Norris

    Huang Shijie
     
  • The "id" array contains all the information about the JEDEC and the
    manufacturer ID info. This patch removes the jedec_id/ext_id from
    flash_info.

    Signed-off-by: Huang Shijie
    Signed-off-by: Brian Norris

    Huang Shijie
     
  • This patch adds the id/id_len fields for flash_info{}, and rewrite the
    INFO to fill them. And at last, we read out 6 bytes in the spi_nor_read_id(),
    and we use these new fields to parse out the correct flash_info.

    Signed-off-by: Huang Shijie
    Signed-off-by: Rafał Miłecki
    Signed-off-by: Brian Norris

    Huang Shijie
     

29 Nov, 2014

1 commit


26 Nov, 2014

9 commits

  • There is no need to use memcpy32_toio/memcpy32_fromio to transfer data
    between memory and NFC sram. As the NFC sram is a also a memory space
    not an I/O space, we can just use memcpy().

    We remove the __iomem prefix for NFC sram to avoid sparse warnings.

    Signed-off-by: Josh Wu
    Reviewed-by: Brian Norris
    Signed-off-by: Brian Norris

    Wu, Josh
     
  • This write_page() function is functionally equivalent to the default in
    nand_base.c. Its only difference is in subpage programming support,
    which cafe_nand.c does not advertise, so the difference is negligible.

    Signed-off-by: Brian Norris

    Brian Norris
     
  • Signed-off-by: Knut Wohlrab
    Signed-off-by: Alison Chaiken
    Reviewed-by: Jagannadha Sutradharudu Teki
    Signed-off-by: Brian Norris

    Knut Wohlrab
     
  • As stated in a5b7616c5, "mtd: m25p80,spi-nor: Fix module aliases for
    m25p80", m25p_ids[] in m25p80.c needs to be kept in sync with
    spi_nor_ids[] in spi-nor.c. The change here corrects a misalignment.

    (We were missing m25px80 and we had a duplicate w25q128.)

    Signed-off-by: Alison Chaiken
    Signed-off-by: Brian Norris
    Cc: # 3.18+

    Alison Chaiken
     
  • There are a few small issues with the timeout loop in
    spi_nor_wait_till_ready():

    * The first operation should not be a reschedule; we should check the
    status register at least once to see if we're complete!

    * We should check the status register one last time after declaring the
    deadline has passed, to prevent a premature timeout error (this is
    theoretically possible if we sleep for a long time after the previous
    status register check).

    * Add an error message, so it's obvious if we ever hit a timeout.

    Signed-off-by: Brian Norris
    Acked-by: Huang Shijie
    Reviewed-by: Ezequiel Garcia

    Brian Norris
     
  • The functions kfree() and pci_dev_put() test whether their argument is NULL
    and then return immediately. Thus the test around the call is not needed.

    This issue was detected by using the Coccinelle software.

    Signed-off-by: Markus Elfring
    Signed-off-by: Brian Norris

    Markus Elfring
     
  • 3430LDP has NAND flash with 32 bytes OOB size which is sufficient to hold
    BCH8 codes but the small page check introduced in
    commit b491da7233d5 ("mtd: nand: omap: clean-up ecc layout for BCH ecc schemes")
    considers anything below 64 bytes unsuitable for BCH4/8/16. There is another
    bug in that code where it doesn't skip the check for OMAP_ECC_HAM1_CODE_SW.

    Get rid of that small page check code as it is insufficient and redundant
    because we are checking for OOB available bytes vs ecc layout before calling
    nand_scan_tail().

    Fixes: b491da7233d5 ("mtd: nand: omap: clean-up ecc layout for BCH ecc schemes")

    Reported-by: Tony Lindgren
    Signed-off-by: Roger Quadros
    Signed-off-by: Brian Norris

    Roger Quadros
     
  • Tested with ATO AFND1G08U3, 128MiB NAND.

    Signed-off-by: Brian Norris

    Brian Norris
     
  • It may be useful info, e.g. if someone wants to use ubinize.

    Signed-off-by: Rafał Miłecki
    Signed-off-by: Brian Norris

    Rafał Miłecki
     

20 Nov, 2014

3 commits


07 Nov, 2014

4 commits

  • The logic of vfree()'ing vol->upd_buf is tied to vol->updating.
    In ubi_start_update() vol->updating is set long before vmalloc()'ing
    vol->upd_buf. If we encounter a write failure in ubi_start_update()
    before vmalloc() the UBI device release function will try to vfree()
    vol->upd_buf because vol->updating is set.
    Fix this by allocating vol->upd_buf directly after setting vol->updating.

    Fixes:
    [ 31.559338] UBI warning: vol_cdev_release: update of volume 2 not finished, volume is damaged
    [ 31.559340] ------------[ cut here ]------------
    [ 31.559343] WARNING: CPU: 1 PID: 2747 at mm/vmalloc.c:1446 __vunmap+0xe3/0x110()
    [ 31.559344] Trying to vfree() nonexistent vm area (ffffc90001f2b000)
    [ 31.559345] Modules linked in:
    [ 31.565620] 0000000000000bba ffff88002a0cbdb0 ffffffff818f0497 ffff88003b9ba148
    [ 31.566347] ffff88002a0cbde0 ffffffff8156f515 ffff88003b9ba148 0000000000000bba
    [ 31.567073] 0000000000000000 0000000000000000 ffff88002a0cbe88 ffffffff8156c10a
    [ 31.567793] Call Trace:
    [ 31.568034] [] dump_stack+0x4e/0x7a
    [ 31.568510] [] ubi_io_write_vid_hdr+0x155/0x160
    [ 31.569084] [] ubi_eba_write_leb+0x23a/0x870
    [ 31.569628] [] vol_cdev_write+0x226/0x380
    [ 31.570155] [] vfs_write+0xb5/0x1f0
    [ 31.570627] [] SyS_pwrite64+0x6a/0xa0
    [ 31.571123] [] system_call_fastpath+0x16/0x1b

    Cc:
    Signed-off-by: Richard Weinberger
    Signed-off-by: Artem Bityutskiy

    Richard Weinberger
     
  • If the erase worker is unable to erase a PEB it will
    free the ubi_wl_entry itself.
    The failing ubi_wl_entry must not free()'d again after
    do_sync_erase() returns.

    Cc:
    Signed-off-by: Richard Weinberger
    Signed-off-by: Artem Bityutskiy

    Richard Weinberger
     
  • This is more a cosmetic change than a fix.
    By using ubi_eba_atomic_leb_change()
    we can guarantee that the first VTBL record is always
    correct and we don't really need the second one anymore.
    But we have to keep the second one to not break anything.

    Artem: add a comment

    Signed-off-by: Richard Weinberger
    Signed-off-by: Artem Bityutskiy

    Richard Weinberger
     
  • If there is more then one UBI device mounted, there is no way to
    distinguish between messages from different UBI devices.
    Add device number to all ubi layer message types.

    The R/O block driver messages were replaced by pr_* since
    ubi_device structure is not used by it.

    Amended a bit by Artem.

    Signed-off-by: Tanya Brokhman
    Signed-off-by: Artem Bityutskiy

    Tanya Brokhman
     

06 Nov, 2014

9 commits

  • Freescale's QorIQ T Series processors support 8 IFC chip selects
    within a memory map backward compatible with previous P Series
    processors which supported only 4 chip selects.

    Signed-off-by: Aaron Sierra
    Signed-off-by: Brian Norris

    Aaron Sierra
     
  • If there is no PMECC lookup table stored in ROM, or lookup table offset is
    not specified, PMECC driver should build it in DDR by itself.

    That make the PMECC driver work for some board which doesn't have PMECC
    lookup table in ROM.

    The PMECC use the BCH algorithm, so based on the build_gf_tables()
    function in lib/bch.c, we can build the Galois Field lookup table.

    For more information can refer to section 5.4 of PMECC controller
    application note:
    http://www.atmel.com/images/doc11127.pdf

    Signed-off-by: Josh Wu
    Cc: devicetree@vger.kernel.org
    Signed-off-by: Brian Norris

    Josh Wu
     
  • The driver was also using own method to do 32bit copy, turns out
    we have a kernel API so use that instead

    Signed-off-by: Vinod Koul
    Signed-off-by: Brian Norris

    Koul, Vinod
     
  • The ->PUtable[] array has "->nb_blocks" number of elemetns so this
    comparison should be ">=" instead of ">". Otherwise it could result in
    a minor read beyond the end of an array.

    Signed-off-by: Dan Carpenter
    Signed-off-by: Brian Norris

    Dan Carpenter
     
  • Add sst25wf080 to the spi-nor device id table.

    Signed-off-by: Harini Katakam
    Reviewed-by: Peter Crosthwaite
    Signed-off-by: Michal Simek
    Acked-by: Marek Vasut
    Signed-off-by: Brian Norris

    Harini Katakam
     
  • Tested with this particular FRAM chip

    Signed-off-by: Rostislav Lisovy
    Acked-by: Marek Vasut
    Signed-off-by: Brian Norris

    Rostislav Lisovy
     
  • The AM335x Technical Reference Manual (spruh73j.pdf) says
    "Because the ECC engine includes only one accumulation context,
    it can be allocated to only one chip-select at a time ... "
    (7.1.3.3.12.3). Since the commit 97a288ba2cfa ("ARM: omap2+:
    gpmc-nand: Use dynamic platform_device_alloc()") gpmc-nand
    driver supports multiple NAND flash devices connected to
    the single controller.
    Use global 'struct nand_hw_control' among multiple NAND
    instances to synchronize the access to the single ECC Engine.

    Tested with custom AM335x board using 2x NAND flash chips.

    Signed-off-by: Rostislav Lisovy
    Acked-by: Roger Quadros
    Signed-off-by: Brian Norris

    Rostislav Lisovy
     
  • Because n25q032 is the Micron SPI chip, move it to Micron
    devices list group. In order that know which Micron SPI
    chips have been support at a glance.

    Signed-off-by: Chunhe Lan
    Cc: Brian Norris
    Cc: Marek Vasut
    Cc: Huang Shijie
    Acked-by: Marek Vasut
    Signed-off-by: Brian Norris

    Chunhe Lan
     
  • We are trying to remove the legacy tx_dma and rx_dma fields from the
    spi_transfer structure. Currently dataflash uses tx_dma but only to make
    sure that it's set to 0 so we can remove this use by replacing with a
    zero initialisation of the entire spi_transfer struct.

    Signed-off-by: Mark Brown
    Signed-off-by: Brian Norris

    Mark Brown
     

05 Nov, 2014

2 commits