05 Jul, 2016

1 commit

  • Use the vector polynomial multiply-sum instructions in POWER8 to
    speed up crc32c.

    This is just over 41x faster than the slice-by-8 method that it
    replaces. Measurements on a 4.1 GHz POWER8 show it sustaining
    52 GiB/sec.

    A simple btrfs write performance test:

    dd if=/dev/zero of=/mnt/tmpfile bs=1M count=4096
    sync

    is over 3.7x faster.

    Signed-off-by: Anton Blanchard
    Signed-off-by: Herbert Xu

    Anton Blanchard
     

28 Jun, 2016

1 commit


27 Jun, 2016

1 commit


23 Jun, 2016

3 commits

  • * Implement ECDH under kpp API
    * Provide ECC software support for curve P-192 and
    P-256.
    * Add kpp test for ECDH with data generated by OpenSSL

    Signed-off-by: Salvatore Benedetto
    Signed-off-by: Herbert Xu

    Salvatore Benedetto
     
  • * Implement MPI based Diffie-Hellman under kpp API
    * Test provided uses data generad by OpenSSL

    Signed-off-by: Salvatore Benedetto
    Signed-off-by: Herbert Xu

    Salvatore Benedetto
     
  • Add key-agreement protocol primitives (kpp) API which allows to
    implement primitives required by protocols such as DH and ECDH.
    The API is composed mainly by the following functions
    * set_secret() - It allows the user to set his secret, also
    referred to as his private key, along with the parameters
    known to both parties involved in the key-agreement session.
    * generate_public_key() - It generates the public key to be sent to
    the other counterpart involved in the key-agreement session. The
    function has to be called after set_params() and set_secret()
    * generate_secret() - It generates the shared secret for the session

    Other functions such as init() and exit() are provided for allowing
    cryptographic hardware to be inizialized properly before use

    Signed-off-by: Salvatore Benedetto
    Signed-off-by: Herbert Xu

    Salvatore Benedetto
     

20 Jun, 2016

1 commit

  • This patch adds the implementation of SHA3 algorithm
    in software and it's based on original implementation
    pushed in patch https://lwn.net/Articles/518415/ with
    additional changes to match the padding rules specified
    in SHA-3 specification.

    Signed-off-by: Jeff Garzik
    Signed-off-by: Raveendra Padasalagi
    Signed-off-by: Herbert Xu

    Jeff Garzik
     

15 Jun, 2016

1 commit

  • The CTR DRBG derives its random data from the CTR that is encrypted with
    AES.

    This patch now changes the CTR DRBG implementation such that the
    CTR AES mode is employed. This allows the use of steamlined CTR AES
    implementation such as ctr-aes-aesni.

    Unfortunately there are the following subtile changes we need to apply
    when using the CTR AES mode:

    - the CTR mode increments the counter after the cipher operation, but
    the CTR DRBG requires the increment before the cipher op. Hence, the
    crypto_inc is applied to the counter (drbg->V) once it is
    recalculated.

    - the CTR mode wants to encrypt data, but the CTR DRBG is interested in
    the encrypted counter only. The full CTR mode is the XOR of the
    encrypted counter with the plaintext data. To access the encrypted
    counter, the patch uses a NULL data vector as plaintext to be
    "encrypted".

    Signed-off-by: Stephan Mueller
    Signed-off-by: Herbert Xu

    Stephan Mueller
     

05 May, 2016

1 commit


18 Mar, 2016

1 commit

  • Pull crypto update from Herbert Xu:
    "Here is the crypto update for 4.6:

    API:
    - Convert remaining crypto_hash users to shash or ahash, also convert
    blkcipher/ablkcipher users to skcipher.
    - Remove crypto_hash interface.
    - Remove crypto_pcomp interface.
    - Add crypto engine for async cipher drivers.
    - Add akcipher documentation.
    - Add skcipher documentation.

    Algorithms:
    - Rename crypto/crc32 to avoid name clash with lib/crc32.
    - Fix bug in keywrap where we zero the wrong pointer.

    Drivers:
    - Support T5/M5, T7/M7 SPARC CPUs in n2 hwrng driver.
    - Add PIC32 hwrng driver.
    - Support BCM6368 in bcm63xx hwrng driver.
    - Pack structs for 32-bit compat users in qat.
    - Use crypto engine in omap-aes.
    - Add support for sama5d2x SoCs in atmel-sha.
    - Make atmel-sha available again.
    - Make sahara hashing available again.
    - Make ccp hashing available again.
    - Make sha1-mb available again.
    - Add support for multiple devices in ccp.
    - Improve DMA performance in caam.
    - Add hashing support to rockchip"

    * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (116 commits)
    crypto: qat - remove redundant arbiter configuration
    crypto: ux500 - fix checks of error code returned by devm_ioremap_resource()
    crypto: atmel - fix checks of error code returned by devm_ioremap_resource()
    crypto: qat - Change the definition of icp_qat_uof_regtype
    hwrng: exynos - use __maybe_unused to hide pm functions
    crypto: ccp - Add abstraction for device-specific calls
    crypto: ccp - CCP versioning support
    crypto: ccp - Support for multiple CCPs
    crypto: ccp - Remove check for x86 family and model
    crypto: ccp - memset request context to zero during import
    lib/mpi: use "static inline" instead of "extern inline"
    lib/mpi: avoid assembler warning
    hwrng: bcm63xx - fix non device tree compatibility
    crypto: testmgr - allow rfc3686 aes-ctr variants in fips mode.
    crypto: qat - The AE id should be less than the maximal AE number
    lib/mpi: Endianness fix
    crypto: rockchip - add hash support for crypto engine in rk3288
    crypto: xts - fix compile errors
    crypto: doc - add skcipher API documentation
    crypto: doc - update AEAD AD handling
    ...

    Linus Torvalds
     

01 Feb, 2016

1 commit

  • Now block cipher engines need to implement and maintain their own queue/thread
    for processing requests, moreover currently helpers provided for only the queue
    itself (in crypto_enqueue_request() and crypto_dequeue_request()) but they
    don't help with the mechanics of driving the hardware (things like running the
    request immediately, DMA map it or providing a thread to process the queue in)
    even though a lot of that code really shouldn't vary that much from device to
    device.

    Thus this patch provides a mechanism for pushing requests to the hardware
    as it becomes free that drivers could use. And this framework is patterned
    on the SPI code and has worked out well there.
    (https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/
    drivers/spi/spi.c?id=ffbbdd21329f3e15eeca6df2d4bc11c04d9d91c0)

    Signed-off-by: Baolin Wang
    Signed-off-by: Herbert Xu

    Baolin Wang
     

27 Jan, 2016

2 commits

  • When building the jitterentropy driver by itself, we get a link error
    when CRYPTO_RNG is not enabled as well:

    crypto/built-in.o: In function `jent_mod_init':
    jitterentropy-kcapi.c:(.init.text+0x98): undefined reference to `crypto_register_rng'
    crypto/built-in.o: In function `jent_mod_exit':
    jitterentropy-kcapi.c:(.exit.text+0x60): undefined reference to `crypto_unregister_rng'

    This adds a 'select CRYPTO_RNG' to CRYPTO_JITTERENTROPY to ensure the API
    is always there when it's used, not just when DRBG is also enabled.
    CRYPTO_DRBG would set it implicitly through CRYPTO_JITTERENTROPY now,
    but this leaves it in place to make it explicit what the driver does.

    Signed-off-by: Arnd Bergmann
    Signed-off-by: Herbert Xu

    Arnd Bergmann
     
  • It is unused now, so remove it.

    Signed-off-by: Joonsoo Kim
    Signed-off-by: Herbert Xu

    Joonsoo Kim
     

26 Jan, 2016

1 commit

  • The ghash and poly1305 hash implementations can be enabled when
    CONFIG_CRYPTO_HASH is turned off, causing a link error:

    crypto/built-in.o: In function `ghash_mod_init':
    (.init.text+0xd0): undefined reference to `crypto_register_shash'
    crypto/built-in.o: In function `ghash_mod_exit':
    (.exit.text+0xb4): undefined reference to `crypto_unregister_shash'
    crypto/built-in.o: In function `poly1305_mod_init':
    (.init.text+0xb4): undefined reference to `crypto_register_shash'
    crypto/built-in.o: In function `poly1305_mod_exit':
    (.exit.text+0x98): undefined reference to `crypto_unregister_shash'

    This adds an explicit 'select', like all other hashes have it.

    Signed-off-by: Arnd Bergmann
    Signed-off-by: Herbert Xu

    Arnd Bergmann
     

15 Oct, 2015

1 commit


21 Sep, 2015

1 commit


09 Sep, 2015

1 commit

  • Pull security subsystem updates from James Morris:
    "Highlights:

    - PKCS#7 support added to support signed kexec, also utilized for
    module signing. See comments in 3f1e1bea.

    ** NOTE: this requires linking against the OpenSSL library, which
    must be installed, e.g. the openssl-devel on Fedora **

    - Smack
    - add IPv6 host labeling; ignore labels on kernel threads
    - support smack labeling mounts which use binary mount data

    - SELinux:
    - add ioctl whitelisting (see
    http://kernsec.org/files/lss2015/vanderstoep.pdf)
    - fix mprotect PROT_EXEC regression caused by mm change

    - Seccomp:
    - add ptrace options for suspend/resume"

    * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security: (57 commits)
    PKCS#7: Add OIDs for sha224, sha284 and sha512 hash algos and use them
    Documentation/Changes: Now need OpenSSL devel packages for module signing
    scripts: add extract-cert and sign-file to .gitignore
    modsign: Handle signing key in source tree
    modsign: Use if_changed rule for extracting cert from module signing key
    Move certificate handling to its own directory
    sign-file: Fix warning about BIO_reset() return value
    PKCS#7: Add MODULE_LICENSE() to test module
    Smack - Fix build error with bringup unconfigured
    sign-file: Document dependency on OpenSSL devel libraries
    PKCS#7: Appropriately restrict authenticated attributes and content type
    KEYS: Add a name for PKEY_ID_PKCS7
    PKCS#7: Improve and export the X.509 ASN.1 time object decoder
    modsign: Use extract-cert to process CONFIG_SYSTEM_TRUSTED_KEYS
    extract-cert: Cope with multiple X.509 certificates in a single file
    sign-file: Generate CMS message as signature instead of PKCS#7
    PKCS#7: Support CMS messages also [RFC5652]
    X.509: Change recorded SKID & AKID to not include Subject or Issuer
    PKCS#7: Check content type and versions
    MAINTAINERS: The keyrings mailing list has moved
    ...

    Linus Torvalds
     

17 Aug, 2015

2 commits


14 Aug, 2015

1 commit


05 Aug, 2015

1 commit


17 Jul, 2015

4 commits

  • Extends the x86_64 Poly1305 authenticator by a function processing four
    consecutive Poly1305 blocks in parallel using AVX2 instructions.

    For large messages, throughput increases by ~15-45% compared to two
    block SSE2:

    testing speed of poly1305 (poly1305-simd)
    test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 3809514 opers/sec, 365713411 bytes/sec
    test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 5973423 opers/sec, 573448627 bytes/sec
    test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9446779 opers/sec, 906890803 bytes/sec
    test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1364814 opers/sec, 393066691 bytes/sec
    test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2045780 opers/sec, 589184697 bytes/sec
    test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3711946 opers/sec, 1069040592 bytes/sec
    test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 573686 opers/sec, 605812732 bytes/sec
    test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1647802 opers/sec, 1740079440 bytes/sec
    test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 292970 opers/sec, 609378224 bytes/sec
    test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 943229 opers/sec, 1961916528 bytes/sec
    test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 494623 opers/sec, 2041804569 bytes/sec
    test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 254045 opers/sec, 2089271014 bytes/sec

    testing speed of poly1305 (poly1305-simd)
    test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 3826224 opers/sec, 367317552 bytes/sec
    test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 5948638 opers/sec, 571069267 bytes/sec
    test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9439110 opers/sec, 906154627 bytes/sec
    test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1367756 opers/sec, 393913872 bytes/sec
    test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2056881 opers/sec, 592381958 bytes/sec
    test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3711153 opers/sec, 1068812179 bytes/sec
    test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 574940 opers/sec, 607136745 bytes/sec
    test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1948830 opers/sec, 2057964585 bytes/sec
    test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 293308 opers/sec, 610082096 bytes/sec
    test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 1235224 opers/sec, 2569267792 bytes/sec
    test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 684405 opers/sec, 2825226316 bytes/sec
    test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 367101 opers/sec, 3019039446 bytes/sec

    Benchmark results from a Core i5-4670T.

    Signed-off-by: Martin Willi
    Signed-off-by: Herbert Xu

    Martin Willi
     
  • Implements an x86_64 assembler driver for the Poly1305 authenticator. This
    single block variant holds the 130-bit integer in 5 32-bit words, but uses
    SSE to do two multiplications/additions in parallel.

    When calling updates with small blocks, the overhead for kernel_fpu_begin/
    kernel_fpu_end() negates the perfmance gain. We therefore use the
    poly1305-generic fallback for small updates.

    For large messages, throughput increases by ~5-10% compared to
    poly1305-generic:

    testing speed of poly1305 (poly1305-generic)
    test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 4080026 opers/sec, 391682496 bytes/sec
    test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 6221094 opers/sec, 597225024 bytes/sec
    test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9609750 opers/sec, 922536057 bytes/sec
    test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1459379 opers/sec, 420301267 bytes/sec
    test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2115179 opers/sec, 609171609 bytes/sec
    test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3729874 opers/sec, 1074203856 bytes/sec
    test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 593000 opers/sec, 626208000 bytes/sec
    test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1081536 opers/sec, 1142102332 bytes/sec
    test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 302077 opers/sec, 628320576 bytes/sec
    test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 554384 opers/sec, 1153120176 bytes/sec
    test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 278715 opers/sec, 1150536345 bytes/sec
    test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 140202 opers/sec, 1153022070 bytes/sec

    testing speed of poly1305 (poly1305-simd)
    test 0 ( 96 byte blocks, 16 bytes per update, 6 updates): 3790063 opers/sec, 363846076 bytes/sec
    test 1 ( 96 byte blocks, 32 bytes per update, 3 updates): 5913378 opers/sec, 567684355 bytes/sec
    test 2 ( 96 byte blocks, 96 bytes per update, 1 updates): 9352574 opers/sec, 897847104 bytes/sec
    test 3 ( 288 byte blocks, 16 bytes per update, 18 updates): 1362145 opers/sec, 392297990 bytes/sec
    test 4 ( 288 byte blocks, 32 bytes per update, 9 updates): 2007075 opers/sec, 578037628 bytes/sec
    test 5 ( 288 byte blocks, 288 bytes per update, 1 updates): 3709811 opers/sec, 1068425798 bytes/sec
    test 6 ( 1056 byte blocks, 32 bytes per update, 33 updates): 566272 opers/sec, 597984182 bytes/sec
    test 7 ( 1056 byte blocks, 1056 bytes per update, 1 updates): 1111657 opers/sec, 1173910108 bytes/sec
    test 8 ( 2080 byte blocks, 32 bytes per update, 65 updates): 288857 opers/sec, 600823808 bytes/sec
    test 9 ( 2080 byte blocks, 2080 bytes per update, 1 updates): 590746 opers/sec, 1228751888 bytes/sec
    test 10 ( 4128 byte blocks, 4128 bytes per update, 1 updates): 301825 opers/sec, 1245936902 bytes/sec
    test 11 ( 8224 byte blocks, 8224 bytes per update, 1 updates): 153075 opers/sec, 1258896201 bytes/sec

    Benchmark results from a Core i5-4670T.

    Signed-off-by: Martin Willi
    Signed-off-by: Herbert Xu

    Martin Willi
     
  • Extends the x86_64 ChaCha20 implementation by a function processing eight
    ChaCha20 blocks in parallel using AVX2.

    For large messages, throughput increases by ~55-70% compared to four block
    SSSE3:

    testing speed of chacha20 (chacha20-simd) encryption
    test 0 (256 bit key, 16 byte blocks): 42249230 operations in 10 seconds (675987680 bytes)
    test 1 (256 bit key, 64 byte blocks): 46441641 operations in 10 seconds (2972265024 bytes)
    test 2 (256 bit key, 256 byte blocks): 33028112 operations in 10 seconds (8455196672 bytes)
    test 3 (256 bit key, 1024 byte blocks): 11568759 operations in 10 seconds (11846409216 bytes)
    test 4 (256 bit key, 8192 byte blocks): 1448761 operations in 10 seconds (11868250112 bytes)

    testing speed of chacha20 (chacha20-simd) encryption
    test 0 (256 bit key, 16 byte blocks): 41999675 operations in 10 seconds (671994800 bytes)
    test 1 (256 bit key, 64 byte blocks): 45805908 operations in 10 seconds (2931578112 bytes)
    test 2 (256 bit key, 256 byte blocks): 32814947 operations in 10 seconds (8400626432 bytes)
    test 3 (256 bit key, 1024 byte blocks): 19777167 operations in 10 seconds (20251819008 bytes)
    test 4 (256 bit key, 8192 byte blocks): 2279321 operations in 10 seconds (18672197632 bytes)

    Benchmark results from a Core i5-4670T.

    Signed-off-by: Martin Willi
    Signed-off-by: Herbert Xu

    Martin Willi
     
  • Implements an x86_64 assembler driver for the ChaCha20 stream cipher. This
    single block variant works on a single state matrix using SSE instructions.
    It requires SSSE3 due the use of pshufb for efficient 8/16-bit rotate
    operations.

    For large messages, throughput increases by ~65% compared to
    chacha20-generic:

    testing speed of chacha20 (chacha20-generic) encryption
    test 0 (256 bit key, 16 byte blocks): 45089207 operations in 10 seconds (721427312 bytes)
    test 1 (256 bit key, 64 byte blocks): 43839521 operations in 10 seconds (2805729344 bytes)
    test 2 (256 bit key, 256 byte blocks): 12702056 operations in 10 seconds (3251726336 bytes)
    test 3 (256 bit key, 1024 byte blocks): 3371173 operations in 10 seconds (3452081152 bytes)
    test 4 (256 bit key, 8192 byte blocks): 422468 operations in 10 seconds (3460857856 bytes)

    testing speed of chacha20 (chacha20-simd) encryption
    test 0 (256 bit key, 16 byte blocks): 43141886 operations in 10 seconds (690270176 bytes)
    test 1 (256 bit key, 64 byte blocks): 46845874 operations in 10 seconds (2998135936 bytes)
    test 2 (256 bit key, 256 byte blocks): 18458512 operations in 10 seconds (4725379072 bytes)
    test 3 (256 bit key, 1024 byte blocks): 5360533 operations in 10 seconds (5489185792 bytes)
    test 4 (256 bit key, 8192 byte blocks): 692846 operations in 10 seconds (5675794432 bytes)

    Benchmark results from a Core i5-4670T.

    Signed-off-by: Martin Willi
    Signed-off-by: Herbert Xu

    Martin Willi
     

21 Jun, 2015

1 commit


17 Jun, 2015

3 commits


11 Jun, 2015

1 commit


04 Jun, 2015

5 commits

  • This patch creates a new invisible Kconfig option CRYPTO_RNG_DEFAULT
    that simply selects the DRBG. This new option is then selected
    by the IV generators.

    Signed-off-by: Herbert Xu

    Herbert Xu
     
  • As this is required by many IPsec algorithms, let's set the default
    to m.

    Signed-off-by: Herbert Xu

    Herbert Xu
     
  • This AEAD uses a chacha20 ablkcipher and a poly1305 ahash to construct the
    ChaCha20-Poly1305 AEAD as defined in RFC7539. It supports both synchronous and
    asynchronous operations, even if we currently have no async chacha20 or poly1305
    drivers.

    Signed-off-by: Martin Willi
    Acked-by: Steffen Klassert
    Signed-off-by: Herbert Xu

    Martin Willi
     
  • Poly1305 is a fast message authenticator designed by Daniel J. Bernstein.
    It is further defined in RFC7539 as a building block for the ChaCha20-Poly1305
    AEAD for use in IETF protocols.

    This is a portable C implementation of the algorithm without architecture
    specific optimizations, based on public domain code by Daniel J. Bernstein and
    Andrew Moon.

    Signed-off-by: Martin Willi
    Acked-by: Steffen Klassert
    Signed-off-by: Herbert Xu

    Martin Willi
     
  • ChaCha20 is a high speed 256-bit key size stream cipher algorithm designed by
    Daniel J. Bernstein. It is further specified in RFC7539 for use in IETF
    protocols as a building block for the ChaCha20-Poly1305 AEAD.

    This is a portable C implementation without any architecture specific
    optimizations. It uses a 16-byte IV, which includes the 12-byte ChaCha20 nonce
    prepended by the initial block counter. Some algorithms require an explicit
    counter value, for example the mentioned AEAD construction.

    Signed-off-by: Martin Willi
    Acked-by: Steffen Klassert
    Signed-off-by: Herbert Xu

    Martin Willi
     

03 Jun, 2015

1 commit


28 May, 2015

1 commit


27 May, 2015

1 commit

  • The CPU Jitter RNG provides a source of good entropy by
    collecting CPU executing time jitter. The entropy in the CPU
    execution time jitter is magnified by the CPU Jitter Random
    Number Generator. The CPU Jitter Random Number Generator uses
    the CPU execution timing jitter to generate a bit stream
    which complies with different statistical measurements that
    determine the bit stream is random.

    The CPU Jitter Random Number Generator delivers entropy which
    follows information theoretical requirements. Based on these
    studies and the implementation, the caller can assume that
    one bit of data extracted from the CPU Jitter Random Number
    Generator holds one bit of entropy.

    The CPU Jitter Random Number Generator provides a decentralized
    source of entropy, i.e. every caller can operate on a private
    state of the entropy pool.

    The RNG does not have any dependencies on any other service
    in the kernel. The RNG only needs a high-resolution time
    stamp.

    Further design details, the cryptographic assessment and
    large array of test results are documented at
    http://www.chronox.de/jent.html.

    CC: Andreas Steffen
    CC: Theodore Ts'o
    CC: Sandy Harris
    Signed-off-by: Stephan Mueller
    Signed-off-by: Herbert Xu

    Stephan Mueller
     

26 May, 2015

1 commit

  • The newly added AEAD user-space isn't quite ready for prime time
    just yet. In particular it is conflicting with the AEAD single
    SG list interface change so this patch disables it now.

    Once the SG list stuff is completely done we can then renable
    this interface.

    Signed-off-by: Herbert Xu

    Herbert Xu
     

22 May, 2015

1 commit

  • This patch adds a new AEAD IV generator echainiv. It is intended
    to replace the existing skcipher IV generator eseqiv.

    If the underlying AEAD algorithm is using the old AEAD interface,
    then echainiv will simply use its IV generator.

    Otherwise, echainiv will encrypt a counter just like eseqiv but
    it'll first xor it against a previously stored IV similar to
    chainiv.

    Signed-off-by: Herbert Xu

    Herbert Xu