28 Oct, 2010
35 commits
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Implement the Panasonic MN10300 AM34 CPU subarch and implement SMP support for
MN10300. Also implement support for the MN2WS0060 processor and the ASB2364
evaluation board which are AM34 based.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Delete idle_timestamp from irq_cpustat_t as it's an unread relic.
Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Make the settings of interrupt priorities used by various services configurable
at run time.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Optimise do_csum() to gang up the loads so they're less likely to get
interruptions between.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Implement atomic ops using the atomic ops unit available in the AM34 CPU. This
allows the equivalent of the LL/SC instructions to be found on other CPUs.Signed-off-by: Mark Salter
Signed-off-by: David Howells -
Make the FPU operate in non-lazy mode under SMP so that when the process that
is currently using the FPU migrates to a different CPU, we don't have to ping
its previous CPU to flush the FPU context.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Implement global TLB flushing for MN10300. This will be used by the AM34 which
is SMP capable.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control as the bits
are a more suitable layout.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Make controllable the use of the PIDR register to mark TLB entries as belonging
to particular processes.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Rename __flush_tlb*() to local_flush_tlb*() as it's more appropriate, and ready
to differentiate local from global TLB flushes when SMP is introduced.Whilst we're at it, get rid of __flush_tlb_global() and make
local_flush_tlb_page() take an mm_struct pointer rather than VMA pointer.Signed-off-by: David Howells
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An AM34 erratum requires MMUCTR read and write on entry to certain exceptions,
prior to EPSW.NMID being cleared to allow NMIs to happen.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Make the boot wrapper able to use writeback caching, including flushing the
cache before jumping to the main kernel.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Implement SMP global cache flushing for MN10300. This will be used by the AM34
which is SMP capable.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
The AM34 core is able to do cache snooping, and so can skip some of the cache
flushing.Signed-off-by: David Howells
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The AM34 CPU core provides an automated way of purging the cache rather than
manually iterating over all the tags in the cache. Make it possible to use
these.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Differentiate local cache flushing from global cache flushing so that they can
be done differently on SMP systems.Rename the cache functions from:
mn10300_[id]cache_*()
to:
mn10300_[id]_localcache_*()
and on a UP system, assign the global labels to the local labels.
Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
The functions that perform cache flushing should take addresses of unsigned
long type, not unsigned int.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
The current cache flush and invalidate routines operate by controlling the
cache tag registers. Rename the files and add config items to select them.This makes it easier to support the use of other cache flush methods instead,
such as the use of AM34's area purge registers, if available.Signed-off-by: David Howells
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Reorder asm/cacheflush.h to put arch primitives first, before the main
functions so that the main functions can be inline asm rather than #defines
when non-trivial.Signed-off-by: David Howells
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Provide a MN10300_CACHE_ENABLED config option as inverted logic of
MN10300_CACHE_DISABLED to make things simpler.Signed-off-by: David Howells
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Split the cache bits out of arch/mn10300/Kconfig as they're quite complex.
Signed-off-by: David Howells
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Remove the monitor trap function and the set_jtag_stub function as they're not
really necessary.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Add CPU register declarations for the AM34 subarch.
Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Don't hard code the cacheline size in the cache control register definitions.
Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Move the DMA engine control register definitions to the MN103E010 processor
directory so that the MN2WS0050 processor can have its own.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Differentiate AM33_2 and AM33_3 CPU cores in configuration. The MN103E010
processor contains an AM33_2 core.Whilst we're at it, prepare for AM34-based stuff by declaring AM34_2 too.
Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
The local_irq_disable() function and co. merely raise the interrupt mask on the
MN10300 arch to exclude normal interrupts. This still lets other, higher
priority maskable interrupts through, such as are used to service gdbstub's
serial port and the MN10300 on-chip serial port virtual FIFOs.Provide functions to allow the maskable interrupts to be fully disabled, which
will exclude those interrupts.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Add reads[bwl]() and writes[bwl]() for MN10300.
Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Don't cast away the volatile in test_bit()'s parameter when we change its type
from const volatile void * so that we can dereference it.Signed-off-by: Akira Takeuchi
Signed-off-by: Kiyoshi Owada
Signed-off-by: David Howells -
Typedef the pointer to the function to be called by smp_call_function() and
friends:typedef void (*smp_call_func_t)(void *info);
as it is used in a fair number of places.
Signed-off-by: David Howells
cc: linux-arch@vger.kernel.org -
Prevent cnt32_to_63() from being preempted in sched_clock() because it may
read its internal counter, get preempted, get delayed for more than the half
period of the 'TSC' and then write the internal counter, thus corrupting it.Whilst some callers of sched_clock() have interrupts disabled or hold
spinlocks, not all do, and so preemption must be held here.Note that sched_clock() is called from lockdep, but that shouldn't be a problem
because although preempt_disable() calls into lockdep, lockdep has a recursion
counter to deal with this.Signed-off-by: David Howells
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Instead of open-coding pci_find_parent_resource and request_resource,
just call pci_claim_resource.Signed-off-by: Matthew Wilcox
Signed-off-by: David Howells -
Change the index to unsigned long in all bitops for [mn10300]
Signed-off-by: Justin Chen
Reviewed-by: Bjorn Helgaas
Signed-off-by: David Howells -
Signed-off-by: Stoyan Gaydarov
Signed-off-by: David Howells -
Partially revert patch:
commit 3234282f33b29d349bcada40204fc7c8fda7fe72
Author: Jan Beulich
Date: Tue Oct 19 14:52:26 2010 +0100
x86, asm: Fix CFI macro invocations to deal with shortcomings in gasThis breaks MN10300 arch as this changes many instances of instructions
similar to the following:MOV number,D0
which represents an immediate value load into:
MOV (number),D0
which the assembler then interprets as a load from absolute address.
arch/mn10300/kernel/entry.S:64: Error: Invalid opcode/operands
arch/mn10300/kernel/entry.S:65: Error: junk at end of line, first unrecognized character is `0'
arch/mn10300/kernel/entry.S:74: Error: Invalid opcode/operands
arch/mn10300/kernel/entry.S:74: Error: junk at end of line, first unrecognized character is `1'
arch/mn10300/kernel/entry.S:75: Error: Invalid opcode/operands
arch/mn10300/kernel/entry.S:76: Error: junk at end of line, first unrecognized character is `0'cc: Jan Beulich
cc: Alexander van Heukelum
cc: H. Peter Anvin
cc: Ingo Molnar
Signed-off-by: David Howells
27 Oct, 2010
5 commits
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usbfs_get_inode() is something completely different...
Bogosity introduced by commit 85fe4025c616 ("fs: do not assign default
i_ino in new_inode").Signed-off-by: Al Viro
Cc: Christoph Hellwig
Signed-off-by: Linus Torvalds -
* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (476 commits)
vmwgfx: Implement a proper GMR eviction mechanism
drm/radeon/kms: fix r6xx/7xx 1D tiling CS checker v2
drm/radeon/kms: properly compute group_size on 6xx/7xx
drm/radeon/kms: fix 2D tile height alignment in the r600 CS checker
drm/radeon/kms/evergreen: set the clear state to the blit state
drm/radeon/kms: don't poll dac load detect.
gpu: Add Intel GMA500(Poulsbo) Stub Driver
drm/radeon/kms: MC vram map needs to be >= pci aperture size
drm/radeon/kms: implement display watermark support for evergreen
drm/radeon/kms/evergreen: add some additional safe regs v2
drm/radeon/r600: fix tiling issues in CS checker.
drm/i915: Move gpu_write_list to per-ring
drm/i915: Invalidate the to-ring, flush the old-ring when updating domains
drm/i915/ringbuffer: Write the value passed in to the tail register
agp/intel: Restore valid PTE bit for Sandybridge after bdd3072
drm/i915: Fix flushing regression from 9af90d19f
drm/i915/sdvo: Remove unused encoding member
i915: enable AVI infoframe for intel_hdmi.c [v4]
drm/i915: Fix current fb blocking for page flip
drm/i915: IS_IRONLAKE is synonymous with gen == 5
...Fix up conflicts in
- drivers/gpu/drm/i915/{i915_gem.c, i915/intel_overlay.c}: due to the
new simplified stack-based kmap_atomic() interface
- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c: added .llseek entry due to BKL
removal cleanups. -
…scm/linux/kernel/git/jeremy/xen
* 'upstream/xenfs' of git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen:
xen/privcmd: make privcmd visible in domU
xen/privcmd: move remap_domain_mfn_range() to core xen code and export.
privcmd: MMAPBATCH: Fix error handling/reporting
xenbus: export xen_store_interface for xenfs
xen/privcmd: make sure vma is ours before doing anything to it
xen/privcmd: print SIGBUS faults
xen/xenfs: set_page_dirty is supposed to return true if it dirties
xen/privcmd: create address space to allow writable mmaps
xen: add privcmd driver
xen: add variable hypercall caller
xen: add xen_set_domain_pte()
xen: add /proc/xen/xsd_{kva,port} to xenfs* 'upstream/core' of git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen: (29 commits)
xen: include xen/xen.h for definition of xen_initial_domain()
xen: use host E820 map for dom0
xen: correctly rebuild mfn list list after migration.
xen: improvements to VIRQ_DEBUG output
xen: set up IRQ before binding virq to evtchn
xen: ensure that all event channels start off bound to VCPU 0
xen/hvc: only notify if we actually sent something
xen: don't add extra_pages for RAM after mem_end
xen: add support for PAT
xen: make sure xen_max_p2m_pfn is up to date
xen: limit extra memory to a certain ratio of base
xen: add extra pages for E820 RAM regions, even if beyond mem_end
xen: make sure xen_extra_mem_start is beyond all non-RAM e820
xen: implement "extra" memory to reserve space for pages not present at boot
xen: Use host-provided E820 map
xen: don't map missing memory
xen: defer building p2m mfn structures until kernel is mapped
xen: add return value to set_phys_to_machine()
xen: convert p2m to a 3 level tree
xen: make install_p2mtop_page() static
...Fix up trivial conflict in arch/x86/xen/mmu.c, and fix the use of
'reserve_early()' - in the new memblock world order it is now
'memblock_x86_reserve_range()' instead. Pointed out by Jeremy. -
Use Ben's new range manager hooks to implement a manager for
GMRs that manages ids rather than ranges.
This means we can use the standard TTM code for binding, unbinding and
eviction.Signed-off-by: Thomas Hellstrom
Signed-off-by: Dave Airlie -
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6: (52 commits)
split invalidate_inodes()
fs: skip I_FREEING inodes in writeback_sb_inodes
fs: fold invalidate_list into invalidate_inodes
fs: do not drop inode_lock in dispose_list
fs: inode split IO and LRU lists
fs: switch bdev inode bdi's correctly
fs: fix buffer invalidation in invalidate_list
fsnotify: use dget_parent
smbfs: use dget_parent
exportfs: use dget_parent
fs: use RCU read side protection in d_validate
fs: clean up dentry lru modification
fs: split __shrink_dcache_sb
fs: improve DCACHE_REFERENCED usage
fs: use percpu counter for nr_dentry and nr_dentry_unused
fs: simplify __d_free
fs: take dcache_lock inside __d_path
fs: do not assign default i_ino in new_inode
fs: introduce a per-cpu last_ino allocator
new helper: ihold()
...
