08 May, 2008

2 commits


02 May, 2008

2 commits

  • * git://git.infradead.org/mtd-2.6:
    [MTD][NOR] Add physical address to point() method
    [JFFS2] Track parent inode for directories (for NFS export)
    [JFFS2] Invert last argument of jffs2_gc_fetch_inode(), make it boolean.
    [JFFS2] Quiet lockdep false positive.
    [JFFS2] Clean up jffs2_alloc_inode() and jffs2_i_init_once()
    [MTD] Delete long-unused jedec.h header file.
    [MTD] [NAND] at91_nand: use at91_nand_{en,dis}able consistently.

    Linus Torvalds
     
  • Adding the ability to get a physical address from point() in addition
    to virtual address. This physical address is required for XIP of
    userspace code from flash.

    Signed-off-by: Jared Hulbert
    Reviewed-by: Jörn Engel
    Acked-by: Nicolas Pitre
    Acked-by: Greg Ungerer
    Signed-off-by: David Woodhouse

    Jared Hulbert
     

29 Apr, 2008

1 commit


27 Apr, 2008

1 commit


25 Apr, 2008

5 commits


24 Apr, 2008

1 commit


23 Apr, 2008

28 commits

  • UBI scan takes quite a time on some systems, so it is nice
    to print a message that we started attaching an MTD device.

    Signed-off-by: Artem Bityutskiy
    Signed-off-by: David Woodhouse

    Artem Bityutskiy
     
  • David Woodhouse
     
  • drivers/mtd/ar7part.c: In function ‘create_mtd_partitions’:
    drivers/mtd/ar7part.c:69: warning: passing argument 4 of ‘master->read’ from incompatible pointer type
    drivers/mtd/ar7part.c:91: warning: passing argument 4 of ‘master->read’ from incompatible pointer type
    drivers/mtd/ar7part.c:99: warning: passing argument 4 of ‘master->read’ from incompatible pointer type
    drivers/mtd/ar7part.c:110: warning: passing argument 4 of ‘master->read’ from incompatible pointer type
    drivers/mtd/ar7part.c:111: error: ‘SQUASHFS_MAGIC’ undeclared (first use in this function)
    drivers/mtd/ar7part.c:111: error: (Each undeclared identifier is reported only once
    drivers/mtd/ar7part.c:111: error: for each function it appears in.)

    Signed-off-by: David Woodhouse

    David Woodhouse
     
  • collie seems to contain LH28F640BF flash chips. According to
    http://sharp-world.com/products/device/flash/pdf/*FUM00701*@E.pdf
    (page 83) if they have 0x51 of Extended Query Table (number of hardware
    partitions) set to zero, they have a single fixed partition.
    This patch makes those chips work.

    Signed-off-by: Thomas Kunze
    Signed-off-by: David Woodhouse

    Thomas Kunze
     
  • With modern systems using bus-hold instead of bus pull-up, it can
    often lead to erroneous reporting of NAND devices where there are
    none. Do a double probe to ensure that the result we got the first
    time is repeatable, and if it is not then return that there is no
    chip there.

    Signed-off-by: Ben Dooks
    Signed-off-by: David Woodhouse

    Ben Dooks
     
  • Add support to disable ECC checking for a given chip
    when passed by the board via the platform data.

    Signed-off-by: Ben Dooks
    Signed-off-by: David Woodhouse

    Ben Dooks
     
  • Add support for the ECC layout to be passed via the
    platform data specified by the board.

    Signed-off-by: Ben Dooks
    Signed-off-by: David Woodhouse

    Ben Dooks
     
  • If a block's ecc field is all 0xff, then ignore the ECC
    correction. This is for systems where some of the blocks,
    such as the initial cramfs are written without ECC and
    need to be loaded on start.

    Signed-off-by: Ben Dooks
    Signed-off-by: David Woodhouse

    Ben Dooks
     
  • This adds support for using large page NAND devices
    with the S3C24XX NAND controller. This also adds the
    file Documentation/arm/Samsung-S3C24XX/NAND.txt to
    describe the differences.

    Signed-off-by: Ben Dooks
    Signed-off-by: David Woodhouse

    Ben Dooks
     
  • Commit 03680b1e00d146df718c8a4eac34438566b70c85 incorrectly
    was assuming S3C2410_NFCONF was being used to select the
    NAND chip. Fix this error by ising the sel_reg.

    Signed-off-by: Ben Dooks
    Signed-off-by: David Woodhouse

    Ben Dooks
     
  • A power loss while writing can result in a page becoming unreadable.
    When the device is mounted again, reading that page gives controller
    errors. Upper level software like JFFS2 treat -EIO as fatal, refusing to
    mount at all. That means it is necessary to treat the error as an ECC
    error to allow recovery. Note that typically in this case, the
    eraseblock can still be erased and rewritten i.e. it has not become a
    bad block.

    Signed-off-by: Adrian Hunter
    Signed-off-by: David Woodhouse

    Adrian Hunter
     
  • Minor tweaks to omap_nor ... as with most platform drivers, its probe
    and remove logic can (and should!) safely vanish in most configs.

    Signed-off-by: David Brownell
    Signed-off-by: David Woodhouse

    David Brownell
     
  • This is a known erratum confirmed by Spansion. I have an errata document,
    but I can't find a link to it anywhere on their site to include here.

    Some of the S29GL064N chips report 64 sectors when they should report 128,
    and some of S29GL032N chips report 127 sectors when they should report 63.

    Note that when the chip dies are fixed by Spansion, they will still have
    the same id. The fix is done in such a way that it won't affect corrected
    chips.

    The fixups use the extended id made available by a previous patch. Without
    that, virtually all newer AMD/Spansion chips will have the same ID (0x227e)
    and it's not possible to apply the fixup to the correct chips.

    Signed-off-by: Trent Piepho
    Signed-off-by: David Woodhouse

    Trent Piepho
     
  • AMD/Spansion use a device id of 0x7e to indicate an extended device is
    present at offset 0xe and 0xf in the query data.

    I've verified with Spansion that all their chips (mfr == 0x01) with an id
    of 0x7e use it to indicate an extended id is present. What's more, there
    are no chips with a NON-extended id that is the same as a different chip's
    extended id. In other words, when the extended ID is present, one can
    replace the normal id with the extended id without losing any information.
    Which is what I've done.

    Signed-off-by: Trent Piepho
    Signed-off-by: David Woodhouse

    Trent Piepho
     
  • Using current driver elbc sometimes hangs during nand write. Reading back
    last byte helps though (thanks to Scott Wood for the idea).

    Signed-off-by: Anton Vorontsov
    Acked-by: Scott Wood
    Signed-off-by: David Woodhouse

    Anton Vorontsov
     
  • This patch sets mtd->name to the platform bus ID in the plat_nand
    driver, so that you can specify partitions readily with mtdparts=.

    Currently it relies on nand_base filling in the name from the device,
    which results in names like "NAND 256MiB 3,3V 8-bit", that you can't
    use with cmdlineparts.

    Signed-off-by: Hamish Moffatt
    Signed-off-by: David Woodhouse

    Hamish Moffatt
     
  • Fix a race condition in fsl_elbc_run_command
    Fix incorrect usage of clearbits32 that bashed option register
    Remove work around for bashed register

    Signed-off-by: Mike Hench
    Acked-by: Scott Wood
    Signed-off-by: David Woodhouse

    Mike Hench
     
  • Currently fsl_elbc_nand doesn't initialize mtd->name, and this causes
    nand_get_flash_type() to assign name that is equal to chip type, like
    this:

    root@b1:~# cat /proc/mtd
    dev: size erasesize name
    mtd0: 00800000 00010000 "fe000000.flash"
    mtd1: 02000000 00004000 "NAND 32MiB 3,3V 8-bit"

    mtd0 is physmap_of flash (normal name), and mtd1 is fsl_elbc_nand.

    Despite inconsistency, with mtd name like this specifying paritions
    from the kernel command line becomes a torture (though, I didn't tried
    and not sure if mtdparts= can handle spaces at all). Plus, this causes
    real bugs when multiple fsl_elbc_nand chips registered.

    With this patch applied fsl_elbc_nand chip will have proper name:

    root@b1:~# cat /proc/mtd
    dev: size erasesize name
    mtd0: 00800000 00010000 "fe000000.flash"
    mtd1: 02000000 00004000 "e0600000.flash"

    p.s. We can't use priv->dev->bus_id as in physmap_of, because
    fsl_elbc_nand pretends to be a localbus controller, so its bus_id is
    "address.localbus", which is incorrect and thus will also not work
    for multiple chips.

    Signed-off-by: Anton Vorontsov
    Signed-off-by: David Woodhouse

    Anton Vorontsov
     
  • Signed-off-by: Matteo Croce
    Signed-off-by: Felix Fietkau
    Signed-off-by: Eugene Konev
    Signed-off-by: David Woodhouse

    Matteo Croce
     
  • This is very simple driver, NAND is connected through localbus,
    and User-Programmable Machine is doing various adjustments to
    speak NAND. No special efforts needed to do read and write cycles,
    though to control ALE and CLE phases, we ask UPM to generate exact
    pre-programmed signals on the localbus lines.

    Signed-off-by: Anton Vorontsov
    Signed-off-by: David Woodhouse

    Anton Vorontsov
     
  • Signed-off-by: David Woodhouse

    David Woodhouse
     
  • Add support for the SST 36VF3203 flash chip. It is used on Emerson
    KSI8560 board.

    Signed-off-by: Andrei Dolnikov
    Signed-off-by: David Woodhouse

    Andrei Dolnikov
     
  • This enhances plat-ram to take a map_probes argument in
    the platform_data structure which allow plat-ram to support
    any direct-mapped device that MTD supports (jedec, cfi, amd ..)

    A few items are also fixed:
    - Don't panic if probes is 0
    - Actually use the partition list that is passed in

    Signed-off-by: Florian Fainelli
    Signed-off-by: Jason Gunthorpe
    Signed-off-by: David Woodhouse

    Florian Fainelli
     
  • Untested, but shouldn't break anything... Makes MTD_XIP arch
    independent. I guess this is why xip_iprefetch() was made for.

    Signed-off-by: Paulius Zaleckas
    Acked-by: Nicolas Pitre
    Signed-off-by: David Woodhouse

    Paulius Zaleckas
     
  • This is preliminary since:

    1. It supports only _one_ chip select at the moment. As there is no
    existing platforms available using two chip selects of the NAND
    controller, it shall really not include code for supporting the
    2nd chip select for now, as such code cannot be verified.

    2. It resorts to the default and simpliest memory based badblock
    table

    3. Only limited types of nand flash are currently supported. Most
    PXA3xx processors come with on-chip NAND flash dies, so there
    isn't much flexibility for other types of NAND.

    4. The NAND controller should be configured to detect the device's
    ID, thus making it difficult to use nand_scan_ident() to assist
    the detection process (though it's not impossible)

    TODO: fix all the above limitations of cuz :-)

    Signed-off-by: eric miao
    Cc: Sergey Podstavin
    Signed-off-by: David Woodhouse

    eric miao
     
  • Acked-By: Kyungmin Park
    Signed-off-by: David Woodhouse

    Roel Kluin
     
  • Signed-off-by: David Woodhouse

    Thomas Petazzoni
     
  • Return 0 partitions instead of -EINVAL on no mtdpart= argument in kernel
    cmdline or missing partition info for device.

    Signed-off-by: Peter Korsgaard
    Acked-by: Stefan Roese
    Signed-off-by: David Woodhouse

    Peter Korsgaard