15 May, 2008

1 commit


13 May, 2008

2 commits

  • The current driver may cause glitches on SPI CLK line since one must disable
    the SPI controller before changing any HW settings. Fix this by implementing
    a local spi_transfer function that won't change speed and/or word size while
    CS is active.

    While doing that heavy lifting a few other issues were addressed too:
    - Make word size 16 and 32 work too.
    - Honor bits_per_word and speed_hz in spi transaction.
    - Optimize the common path.

    This also stops using the "bitbang" framework (except for a few constants).

    [Roel Kluin : "irq" needs to be signed]
    Signed-off-by: Joakim Tjernlund
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Joakim Tjernlund
     
  • There is a typo in pxa2xx_spi.c, comment says "Enable the SSP clock", code
    says: clk_disable ... so after resume, the SSP is dead.

    Signed-off-by: David Brownell
    Cc: Ned Forrester
    Cc: Stephen Street
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Eric BENARD
     

01 May, 2008

2 commits

  • On Fri, Apr 18, 2008 at 09:08:55PM +0200, Julia Lawall wrote:
    > I found 63 occurrences of this problem with the following semantic match
    > (http://www.emn.fr/x-info/coccinelle/):
    >
    > @@ unsigned int i; @@
    >
    > * i < 0
    >

    Since this one's always in the range 0-255, it could probably be made
    signed, but it's just as easy to make it work unsigned.

    Reported-by: Julia Lawall
    Signed-off-by: Matthew Wilcox
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Matthew Wilcox
     
  • Use PIO for full-duplex transfers, instead of DMA.

    Signed-off-by: Vitja Makarov
    Signed-off-by: Bryan Wu
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Vitja Makarov
     

30 Apr, 2008

1 commit

  • Make the baud rate divisor calculation code a bit more readable and add a
    few comments.

    Also fix wrong debug information being displayed when !new_1 and
    max_speed_hz == 0.

    [david-b@pacbell.net: fix it]
    Signed-off-by: Haavard Skinnemoen
    Cc: "Janesh Ramakrishnan"
    Acked-by David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Haavard Skinnemoen
     

28 Apr, 2008

5 commits

  • Updates to the i.MX SPI controller driver:

    1) Some comments changed and/or added.

    2) End of transfers is now managed on TXFIFO empty interrupt after the
    last write to TXFIFO. This speeds interrupt execution by removing
    the wait for TXFIFO to become empty. On TXFIFO empty interrupt the
    handler needs only to poll for the end of the ongoing transaction
    (SPI_CONTROL_XCH) to close the transfer.
    (2.1) Write only transfers are closed flushing RXFIFO.
    (2.2) Read transfers are closed reading trailing bytes from RXFIFO.
    (2.3) Read transfers where RXFIFO overrun occurred are closed by
    flushing RXFIFO and aborting the message.

    3) Fifos are now flushed via SPI disable after the end of ongoing
    transaction.

    Signed-off-by: Andrea Paterniani
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Andrea Paterniani
     
  • A spi transfer with zero length is not invalid. For example, such
    transfer (len == 0 && delay_usecs != 0) can be used to achieve delay
    before first CLK edge after chipselect assertion.

    Signed-off-by: Atsushi Nemoto
    Cc: Haavard Skinnemoen
    Cc: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Atsushi Nemoto
     
  • __FUNCTION__ is gcc-specific, use __func__

    Signed-off-by: Harvey Harrison
    Acked-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Harvey Harrison
     
  • Various cleanups to pxa2xx_spi suggested by "sparse": make sure that
    register addresess are "void __iomem *", and make a few functions properly
    static.

    Signed-off-by: David Brownell
    Cc: Ned Forrester
    Cc: Stephen Street
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    David Brownell
     
  • Signed-off-by: Alessandro Guido
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Alessandro Guido
     

16 Apr, 2008

3 commits

  • The SPI core now expects num_chipselect to be set correctly as due to added
    checks on the chip being selected before an transfer is allowed. This patch
    adds a num_cs field to the platform data which needs to be set correctly
    before adding the SPI platform device.

    Signed-off-by: Ben Dooks
    Signed-off-by: David Brownell
    Cc: Russell King
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ben Dooks
     
  • Pass the bus number we expect the S3C24XX SPI driver to attach to via the
    platform data.

    Signed-off-by: Ben Dooks
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ben Dooks
     
  • The s3c24xx_spi_txrx() function should initialise the completion each time
    before using it, otherwise we end up with the possibility of returning success
    before the interrupt handler has processed all the data.

    Signed-off-by: Ben Dooks
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ben Dooks
     

11 Apr, 2008

1 commit

  • Since 43cc71eed1250755986da4c0f9898f9a635cb3bf, the platform modalias is
    prefixed with "platform:". Add MODULE_ALIAS() to the hotpluggable SPI
    platform drivers, to allow module auto loading.

    [dbrownell@users.sourceforge.net: more drivers: registration fixes]
    Signed-off-by: Kay Sievers
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Kay Sievers
     

09 Apr, 2008

3 commits

  • Remove unused label, and associated compiler warning.

    Signed-off-by: Michael Hennerich
    Signed-off-by: Bryan Wu
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Michael Hennerich
     
  • Fix bug in SPI probe: first initialize peripheral pins, and just after
    register spi master device. This fixes problems with SPI drivers built-in
    kernel.

    Singed-off-by: Vitja Makarov
    Signed-off-by: Bryan Wu
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Vitja Makarov
     
  • Fix breakage cause by overzealous line wrapping; there should be only one
    format string.

    Signed-off-by: Mike Frysinger
    Signed-off-by: Bryan Wu
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Mike Frysinger
     

14 Mar, 2008

2 commits

  • SPI controller drivers return number of bytes actually transfered from
    bitbang->txrx_bufs() method. This updates handling of short transfers (where
    the transfer size is less than requested):

    - Even zero byte short transfers should report errors;
    - Include short transfers in the total of transferred bytes;
    - Use EREMOTEIO (like USB) not EMSGSIZE to report short transfers

    Short transfers don't normally mean invalid message sizes, but if the
    underlying controller driver needs to use EMSGSIZE it can still do so.

    [db: fix two more minor issues]
    Signed-off-by: Jan Nikitenko
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Jan Nikitenko
     
  • Remove struct pt_regs *regs from prototype of au1550_spi_irq handler to avoid
    warning in request_irq(). Also fix comment type leadin.

    Signed-off-by: Jan Nikitenko
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Jan Nikitenko
     

05 Mar, 2008

1 commit

  • Commit id 94f389485e27641348c1951ab8d65157122a8939 (Separate MPC52xx PSC FIOF
    regsiters from the rest of PSC) split the PSC fifo registers away from the
    core PSC regs. Doing so broke the mpc52xx_psc_spi driver.

    This patch teaches the mpc52xx_psc_spi driver about the new PSC fifo
    register definitions.

    Signed-off-by: Grant Likely
    Cc: David Brownell
    Cc: Paul Mackerras
    Cc: Benjamin Herrenschmidt
    Cc: Kumar Gala
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Grant Likely
     

24 Feb, 2008

2 commits

  • Fixes a sequencing bug in spi driver pxa2xx_spi.c in which the chip select
    for a transfer may be asserted before the clock polarity is set on the
    interface. As a result of this bug, the clock signal may have the wrong
    polarity at transfer start, so it may need to make an extra half transition
    before the intended clock/data signals begin. (This probably means all
    transfers are one bit out of sequence.)

    This only occurs on the first transfer following a change in clock polarity
    in systems using more than one more than one such polarity. The fix
    assures that the clock mode is properly set before asserting chip select.

    This bug was introduced in a patch merged on 2006/12/10, kernel 2.6.20.
    The patch defines an additional bit in: include/asm-arm/arch-pxa/regs-ssp.h
    for 2.6.25 and newer kernels but this addition must be made in:
    include/asm-arm/arch-pxa/pxa-regs.h for kernels between 2.6.20 and 2.6.24,
    inclusive

    Signed-off-by: Ned Forrester
    Signed-off-by: David Brownell
    Cc: Russell King
    Cc:
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ned Forrester
     
  • The atmel_spi driver does not initialize clock polarity correctly (except for
    at91rm9200 CS0 channel) in some case.

    The atmel_spi driver uses gpio-controlled chipselect. OTOH spi clock signal
    is controlled by CSRn.CPOL bit, but this register controls clock signal
    correctly only in 'real transfer' duration. At the time of cs_activate()
    call, CSRn.CPOL will be initialized correctly, but the controller do not know
    which channel is to be used next, so clock signal will stay at the inactive
    state of last transfer. If clock polarity of new transfer and last transfer
    was differ, new transfer will start with wrong clock signal state.

    For example, if you started SPI MODE 2 or 3 transfer after SPI MODE 0 or 1
    transfer, the clock signal state at the assertion of chipselect will be low.
    Of course this will violates SPI transfer.

    This patch is short term solution for this problem. It makes all CSRn.CPOL
    match for the transfer before activating chipselect. For longer term, the
    best fix might be to let NPCS0 stay selected permanently in MR and overwrite
    CSR0 with to the new slave's settings before asserting CS.

    Signed-off-by: Atsushi Nemoto
    Acked-by: Haavard Skinnemoen
    Cc: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Atsushi Nemoto
     

07 Feb, 2008

16 commits

  • Remove some more references to dev->power.power_state. That field is overdue
    for removal, but we can't do that while it's still referenced in the kernel.
    The only reason to update it was to make the /sys/devices/.../power/state
    files (now removed) work better.

    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    David Brownell
     
  • Use simpler comment headers, and strip out information that is maintained in
    GIT history

    Signed-off-by: Mike Frysinger
    Signed-off-by: Bryan Wu
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Mike Frysinger
     
  • SPI writes should also not return until the last bit is sent.

    Signed-off-by: Sonic Zhang
    Signed-off-by: Bryan Wu
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Sonic Zhang
     
  • Full duplex SPI operation should not read a dummy byte at the first transfer.
    Bug and fix by Jean-Christian de Rivaz :

    http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3678

    Signed-off-by: Jean-Christian de Rivaz
    Signed-off-by: Bryan Wu
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Bryan Wu
     
  • PBX 2 SPI devices need the nonstandard "cs change per word" mechanism.

    This patch is one of three updating this driver to make the last data bits get
    sent before advancing the transfer ... in this case, before the chipselect
    gets deactivated.

    Signed-off-by: Bryan Wu
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Bryan Wu
     
  • Use the SPI driver's name when requesting gpio lines. When there are gpio
    conflicts, this helps to narrow down the problems; "bfin-spi" is not
    informative.

    Signed-off-by: Bryan Wu
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Bryan Wu
     
  • Remove useless return status check in restore_state function. Issue was
    pointed out by Michael.

    Cc: Michael Hennerich
    Signed-off-by: Bryan Wu
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Bryan Wu
     
  • This adds driver OMAP SPI specific changes to support OMAP 3430

    Signed-off-by: Girish S G
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Girish
     
  • Add support for SPI over SCI pins. SCI is a very simple serial controller
    block that can be found on older SuperH processors. In theory it is
    possible to use the SCI hardware block in syncronous mode, but this version
    of the driver simply hooks up the bit banging code on the SCI pins.

    Signed-off-by: Magnus Damm
    Signed-off-by: David Brownell
    Cc: Paul Mundt
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Magnus Damm
     
  • The two S3C SPI master drivers got merged without much review, so I just
    noticed that they're doing something that the SPI core code is responsible
    for, rather than any adapter driver: they try to register SPI devices.

    This removes that support from those drivers so they act normally.
    Interestingly, none of the current boards are affected. So it's a net code
    shrink with no loss of functionality.

    Signed-off-by: David Brownell
    Cc: Ben Dooks
    Cc: Russell King
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    David Brownell
     
  • In atmel_spi_next_xfer, xfer can be NULL because the next transfer may
    already have been submitted to the PDC (using DMA chaining). This can
    cause an oops, since the debug message assumed it was never null. The
    fix changes how those debug messages are issued, ensuring that one is
    issued each time a transfer is started instead of once per call.

    Also, properly indent the "can this transfer be chained" test so it's
    not hidden as if it were non-conditional code.

    Signed-off-by: Haavard Skinnemoen
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Haavard Skinnemoen
     
  • Add support for chained transfers in the atmel_spi driver, letting the DMA
    controller switch to the next buffer pair without CPU intervention. This
    reduced I/O latencies by about 2% in one bulk I/O test. It should also help
    work around several interrelated errata affecting chipselect 0 on at91rm9200
    chips.

    Almost all of the changes are in the reworked atmel_spi_next_xfer() function.
    That's now called with the driver in one of three states:

    1. It isn't transferring anything (in which case the first transfer
    of the current message is going to be sent)
    2. It has finished transfering a non-chainable transfer (in which
    case it will go to the next transfer in the message)
    3. It has finished transfering a chained transfer (in which case the
    next transfer is already queued)

    After that it will queue the next transfer if it can be chained.

    Signed-off-by: Szilveszter Ordog
    Acked-by: Haavard Skinnemoen
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Silvester Erdeg
     
  • Don't insert (undesirable) delays between consecutive words (DLYBCT) or when
    activating chipselects (DLYBS).

    Removing the between-word delays improves the performance of bulk transfers
    (such as mtd_dataflash, m25p80, mmc_spi) significantly. In one test, the
    improvement was a factor of more than eight!

    (The large DLYBCT value came from the legacy at91 SPI driver, and it's not
    clear why it used such a huge value.)

    Signed-off-by: Haavard Skinnemoen
    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Haavard Skinnemoen
     
  • Don't update dev->power.power_state any more in the SPI core. The only
    reason to update this scheduled-to-be-removed field was to make the
    already-removed /sys/devices/.../power/state files work better.

    Signed-off-by: David Brownell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    David Brownell
     
  • Mostly in and around irq handlers.

    Signed-off-by: Jeff Garzik
    Cc: Russell King
    Cc: "Luck Tony"
    Cc: Roman Zippel
    Cc: Geert Uytterhoeven
    Cc: Paul Mackerras
    Cc: Benjamin Herrenschmidt
    Acked-by: Dmitry Torokhov
    Cc: Karsten Keil
    Acked-by: "John W. Linville"
    Cc: James Bottomley
    Cc: David Brownell
    Cc: "Antonino A. Daplas"
    Acked-by: Josh Boyer
    Acked-by: Holger Schurig
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Jeff Garzik
     
  • Nothing should ever include this file.

    Signed-off-by: Ralf Baechle
    Acked-by: "Mike Frysinger"
    Acked-by: "Bryan Wu"
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ralf Baechle
     

03 Feb, 2008

1 commit