10 Jun, 2021
1 commit
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Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().Reviewed-by: Geert Uytterhoeven
Acked-by: Krzysztof Kozlowski
Signed-off-by: Marc Zyngier
16 May, 2021
1 commit
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When devm_ioremap_resource() fails, a clear enough error message will be
printed by its subfunction __devm_ioremap_resource(). The error
information contains the device name, failure cause, and possibly resource
information.Therefore, remove the error printing here to simplify code and reduce the
binary size.Reported-by: Hulk Robot
Signed-off-by: Zhen Lei
Signed-off-by: Marc Zyngier
Link: https://lore.kernel.org/r/20210511125428.6108-2-thunder.leizhen@huawei.com
21 Mar, 2019
1 commit
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Fix sparse warning:
drivers/irqchip/irq-mvebu-sei.c:481:23: warning:
symbol 'mvebu_sei_ap806_caps' was not declared. Should it be static?Signed-off-by: YueHaibing
Signed-off-by: Thomas Gleixner
Cc:
Cc:
Cc:
Cc:
Cc:
Cc:
Link: https://lkml.kernel.org/r/20190321151448.15600-1-yuehaibing@huawei.com
01 Nov, 2018
1 commit
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The devm_ioremap_resource() function never returns NULL, it returns
error pointers.Fixes: 61ce8d8d8a81 ("irqchip/irq-mvebu-sei: Add new driver for Marvell SEI")
Signed-off-by: Dan Carpenter
Signed-off-by: Thomas Gleixner
Reviewed-by: Miquel Raynal
Cc: Jason Cooper
Cc: Andrew Lunn
Cc: Gregory Clement
Cc: Sebastian Hesselbarth
Cc: Marc Zyngier
Cc: linux-arm-kernel@lists.infradead.org
Cc: kernel-janitors@vger.kernel.org
Link: https://lkml.kernel.org/r/20181013102246.GD16086@mwanda
02 Oct, 2018
1 commit
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This is a cascaded interrupt controller in the AP806 GIC that collapses
SEIs (System Error Interrupt) coming from the AP and the CPs (through
the ICU).The SEI handles up to 64 interrupts. The first 21 interrupts are wired
from the AP. The next 43 interrupts are from the CPs and are triggered
through MSI messages. To handle this complexity, the driver has to
declare to the upper layer: one IRQ domain for the wired interrupts,
one IRQ domain for the MSIs; and acts as a MSI controller ('parent')
by declaring an MSI domain.Suggested-by: Haim Boot
Suggested-by: Marc Zyngier
Signed-off-by: Miquel Raynal
Signed-off-by: Marc Zyngier
