13 May, 2020
1 commit
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Fix below build warning:
warning: format ‘%li’ expects argument of type ‘long int’, but argument 3 has type ‘unsigned int’ [-Wformat=]
"Exceed max msg size (%li) on TX, got: %i\n",Reviewed-by: Ye Li
Signed-off-by: Peng Fan
(cherry picked from commit 6566c7b54aef56d7a4bf83f75615c7c4d39f98ad)
11 May, 2020
1 commit
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IPC MU has no power domain assigned and there could be IPC
during noirq suspend phase, so IRQF_NO_SUSPEND flag is needed
for IPC MU. However, for other MUs, they have power domain
assigned and their power will be turned off during noirq suspend
phase, but their interrupts are NOT disabled even after their
power turned off, it will cause system crash when mailbox driver
trys to handle pending interrupts but the MU power is accidently
turned off.So, IRQF_NO_SUSPEND flag should ONLY be added to IPC MU which
has power domain managed by SCU, then all other MUs' pending
interrupts after noirq suspend phase will be handled after
system resume.Signed-off-by: Anson Huang
Reviewed-by: Peng Fan
(cherry picked from commit 02c7cf674c77d0ff60c123c5c98880d27d6b2c53)
09 May, 2020
1 commit
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On i.MX8MP, the MU clock is combined with power domain and runtime
PM is enabled, during noirq suspend/resume phase, runtime PM is
disabled by device suspend, calling clock prepare will trigger
runtime resume failure and lead to system suspend failed.There is no good way to handle such MU clocks combined with runtime
PM in noirq suspend phase, actually, the MU context save/restore is
ONLY necessary for SCU IPC MU, other MUs especially on i.MX8MP platforms
which have clocks assigned, they need to runtime request/free mailbox
channel in the consumer driver, so no need to save/restore MU context
for them, hence it can avoid this issue.Signed-off-by: Anson Huang
Reviewed-by: Jacky Bai
07 May, 2020
1 commit
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Some of i.MX8M SoCs have MU clock, they need to be managed in runtime
to make sure the MU domain can be off in runtime, add runtime PM
callback to handle MU clock.Signed-off-by: Anson Huang
Reviewed-by: Shengjiu Wang
24 Apr, 2020
3 commits
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The remote processor can take some time to read/write to
the MU and the previous timeout was not based on a temporal
value. It is better to use a temporal variable so the code
will always have the same behavior.There is no specification about the timeout to set, just to have
something in the range of few seconds, so chosen 3.This patch changes the timeout to be based on time.
Signed-off-by: Franck LENORMAND
Reviewed-by: Horia Geantă -
In case the reception of the message fails, the client is not
informed.This patch sends the error to client using mbox_chan_received_data
with error code encoded in the address of the message.Signed-off-by: Franck LENORMAND
Reviewed-by: Horia Geantă -
During noirq suspend/resume, if MU context is NOT lost, such
as freeze mode suspend, when resume, there could be 2 CPUs
calling IPC, 1 CPU is in charge of handling wakeup event, the
other CPU is busy with device resume flow, the MU TIE could
be set during IPC called by the CPU handling wakeup event,
then the noirq resume callback in mailbox will be called by
the CPU executing device resume, it could overwrite the MU
settings and clear TIE by mistake, then cause the TX never
finish and IPC mutex lock never released, and system will
freeze, all CPUs are in idle and never wake up.To avoid this issue, we should ONLY restore the MU settings
when its context is lost.Signed-off-by: Anson Huang
Reported-by: Clark Wang
Reviewed-by: Jacky Bai
17 Apr, 2020
1 commit
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Some power hungry sub-systems like VPU has its own MUs which also
use mailbox driver, current mailbox driver uses platform driver
model and MU's power will be ON after driver probed and left ON
there, it may cause the whole sub-system can NOT enter lower power
mode, take VPU driver for example, it has runtime PM support, but
due to its MU always ON, the VPU sub-system will be always ON and
consume many power during kernel idle.To save power in kernel idle, mailbox driver needs to support
runtime PM in order to power off MU when it is unused. However,
the runtime suspend/resume can ONLY be implemented in mailbox's
.shutdown/.startup callback, so its consumer needs to call
mbox_request_channel()/mbox_free_channel() in consumer driver's
runtime PM callback, then the MU's power will be ON/OFF along with
consumer's runtime PM status.For those consumers never call mbox_free_channel(), MU's power will
be still ON always, if there is obvious power increase observed, we
will request the consumer to free mailbox channel to save power.Signed-off-by: Anson Huang
Reviewed-by: Jacky Bai
12 Mar, 2020
2 commits
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i.MX8/8X SECO firmware IPC is an implementation of passing messages.
But current imx-mailbox driver only support one word message,
i.MX8/8X linux side firmware has to request four TX, four RX and a
TXDB to support IPC to SECO firmware. This is low efficent and
more interrupts triggered compared with one TX and one RX.To make SECO MU work,
- parse the size of msg.
- Only enable TR0/RR0 interrupt for transmit/receive message.
- For TX/RX, only support one TX channel and one RX channel
- For RX, support receive msg of any size, linited by hardcoded value of 30.Signed-off-by: Peng Fan
Signed-off-by: Franck LENORMAND -
Add imx_mu_generic_tx for data send and imx_mu_generic_rx for interrupt
data receive.Pack original mu chans related code into imx_mu_init_generic
Add tx/rx/init hooks into imx_mu_dcfg
With these, it will be a bit easy to introduce i.MX8/8X SCU type
MU dedicated to communicate with SCU.Reviewed-by: Oleksij Rempel
Signed-off-by: Peng Fan
16 Dec, 2019
1 commit
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This is the 5.4.3 stable release
Conflicts:
drivers/cpufreq/imx-cpufreq-dt.c
drivers/spi/spi-fsl-qspi.cThe conflict is very minor, fixed it when do the merge. The imx-cpufreq-dt.c
is just one line code-style change, using upstream one, no any function change.The spi-fsl-qspi.c has minor conflicts when merge upstream fixes: c69b17da53b2
spi: spi-fsl-qspi: Clear TDH bits in FLSHCR registerAfter merge, basic boot sanity test and basic qspi test been done on i.mx
Signed-off-by: Jason Liu
13 Dec, 2019
1 commit
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commit c745da8d4320c49e54662c0a8f7cb6b8204f44c4 upstream.
Commit 7723f4c5ecdb ("driver core: platform: Add an error message to
platform_get_irq*()") added an error message to avoid drivers having
to print an error message when IRQ lookup fails. However, there are
some cases where IRQs are optional and so new optional versions of
the platform_get_irq*() APIs have been added for these cases.The IRQs for Tegra HSP module are optional because not all instances
of the module have the doorbell and all of the shared interrupts.
Hence, since the above commit was applied the following error messages
are now seen on Tegra194 ...ERR KERN tegra-hsp c150000.hsp: IRQ doorbell not found
ERR KERN tegra-hsp c150000.hsp: IRQ shared0 not foundThe Tegra HSP driver deliberately does not fail if these are not found
and so fix the above errors by updating the Tegra HSP driver to use
the platform_get_irq_byname_optional() API.Signed-off-by: Jon Hunter
Acked-by: Thierry Reding
Link: https://lore.kernel.org/r/20191011083459.11551-1-jonathanh@nvidia.com
Signed-off-by: Greg Kroah-Hartman
25 Nov, 2019
5 commits
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There is a version 1.0 MU on i.MX7ULP platform.
One new version ID register is added, and it's offset is 0.
TRn registers are defined at the offset 0x20 ~ 0x2C.
RRn registers are defined at the offset 0x40 ~ 0x4C.
SR/CR registers are defined at 0x60/0x64.
Extend this driver to support it.Signed-off-by: Richard Zhu
Suggested-by: Oleksij Rempel
Reviewed-by: Dong Aisheng
Reviewed-by: Oleksij Rempel -
Make sure to only clear enabled interrupts keeping count
of the connection type.Suggested-by: Oleksij Rempel
Signed-off-by: Daniel Baluta
Signed-off-by: Richard Zhu
Reviewed-by: Dong Aisheng -
Tx doorbell is handled by txdb_tasklet and doesn't
have an associated IRQ.Anyhow, imx_mu_shutdown ignores this and tries to
free an IRQ that wasn't requested for Tx DB resulting
in the following warning:[ 1.967644] Trying to free already-free IRQ 26
[ 1.972108] WARNING: CPU: 2 PID: 157 at kernel/irq/manage.c:1708 __free_irq+0xc0/0x358
[ 1.980024] Modules linked in:
[ 1.983088] CPU: 2 PID: 157 Comm: kworker/2:1 Tainted: G
[ 1.993524] Hardware name: Freescale i.MX8QXP MEK (DT)
[ 1.998668] Workqueue: events deferred_probe_work_func
[ 2.003812] pstate: 60000085 (nZCv daIf -PAN -UAO)
[ 2.008607] pc : __free_irq+0xc0/0x358
[ 2.012364] lr : __free_irq+0xc0/0x358
[ 2.016111] sp : ffff00001179b7e0
[ 2.019422] x29: ffff00001179b7e0 x28: 0000000000000018
[ 2.024736] x27: ffff000011233000 x26: 0000000000000004
[ 2.030053] x25: 000000000000001a x24: ffff80083bec74d4
[ 2.035369] x23: 0000000000000000 x22: ffff80083bec7588
[ 2.040686] x21: ffff80083b1fe8d8 x20: ffff80083bec7400
[ 2.046003] x19: 0000000000000000 x18: ffffffffffffffff
[ 2.051320] x17: 0000000000000000 x16: 0000000000000000
[ 2.056637] x15: ffff0000111296c8 x14: ffff00009179b517
[ 2.061953] x13: ffff00001179b525 x12: ffff000011142000
[ 2.067270] x11: ffff000011129f20 x10: ffff0000105da970
[ 2.072587] x9 : 00000000ffffffd0 x8 : 0000000000000194
[ 2.077903] x7 : 612065657266206f x6 : ffff0000111e7b09
[ 2.083220] x5 : 0000000000000003 x4 : 0000000000000000
[ 2.088537] x3 : 0000000000000000 x2 : 00000000ffffffff
[ 2.093854] x1 : 28b70f0a2b60a500 x0 : 0000000000000000
[ 2.099173] Call trace:
[ 2.101618] __free_irq+0xc0/0x358
[ 2.105021] free_irq+0x38/0x98
[ 2.108170] imx_mu_shutdown+0x90/0xb0
[ 2.111921] mbox_free_channel.part.2+0x24/0xb8
[ 2.116453] mbox_free_channel+0x18/0x28This bug is present from the beginning of times.
Cc: Oleksij Rempel
Signed-off-by: Daniel Baluta
Signed-off-by: Richard Zhu
Reviewed-by: Dong Aisheng -
Many module driver depends on rpmsg driver, need bring
mailbox driver probed to arch_init() level.Signed-off-by: Robin Gong
-
Signed-off-by: Dong Aisheng
17 Sep, 2019
9 commits
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The mailbox length is 0x1000 hence the max_register value is 0xFFC.
Fixes: c6a8b171ca8e ("mailbox: qcom: Convert APCS IPC driver to use
regmap")
Signed-off-by: Jorge Ramirez-Ortiz
Signed-off-by: Jassi Brar -
Add support of IPQ8074 with IPC register offset as 8.
Signed-off-by: Gokul Sriram Palanisamy
Signed-off-by: Sricharan R
Signed-off-by: Jassi Brar -
Add the corresponding APSS shared offset for SM8150 and SC7180 SoCs.
Reviewed-by: Bjorn Andersson
Signed-off-by: Sibi Sankar
Signed-off-by: Jassi Brar -
Use the correct macro when registering the platform device.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
Reviewed-by: Stephen Boyd
Signed-off-by: Jassi Brar -
There is clock controller functionality in the APCS hardware block of
qcs404 devices similar to msm8916.Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
Reviewed-by: Stephen Boyd
Signed-off-by: Jassi Brar -
GCE hardware stored event information in own internal sysram,
if the initial value in those sysram is not zero value
it will cause a situation that gce can wait the event immediately
after client ask gce to wait event but not really trigger the
corresponding hardware.In order to make sure that the wait event function is
exactly correct, we need to clear the sysram value in
cmdq initial flow.Fixes: 623a6143a845 ("mailbox: mediatek: Add Mediatek CMDQ driver")
Signed-off-by: Bibby Hsieh
Reviewed-by: CK Hu
Reviewed-by: Matthias Brugger
Signed-off-by: Jassi Brar -
add mt8183 compatible name for supporting gce function
Signed-off-by: Bibby Hsieh
Reviewed-by: CK Hu
Signed-off-by: Jassi Brar -
The interrupt mask and thread number has positive correlation,
so we move the CMDQ_IRQ_MASK into cmdq driver data and calculate
it by thread number.Signed-off-by: Bibby Hsieh
Reviewed-by: CK Hu
Reviewed-by: Matthias Brugger
Signed-off-by: Jassi Brar -
Use devm_mbox_controller_register to get rid of
redundant remove function.Signed-off-by: Chuhong Yuan
Signed-off-by: Jassi Brar
15 Jul, 2019
1 commit
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Pull mailbox updates from Jassi Brar:
- stm32: race fix by adding a spinlock
- mhu: trim included headers
- omap: add support for K3 SoCs
- imx: Irq disable fix
- bcm: tidy up extracting driver data
- tegra: make resume 'noirq'
- api: fix error handling
* tag 'mailbox-v5.3' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
mailbox: handle failed named mailbox channel request
mailbox: tegra: avoid resume NULL mailboxes
mailbox: tegra: hsp: add noirq resume
mailbox: bcm-flexrm-mailbox: using dev_get_drvdata directly
mailbox: imx: Clear GIEn bit at shutdown
mailbox: omap: Add support for TI K3 SoCs
dt-bindings: mailbox: omap: Update bindings for TI K3 SoCs
mailbox: arm_mhu: reorder header inclusion and drop unneeded ones
mailbox: stm32_ipcc: add spinlock to fix channels concurrent access
13 Jul, 2019
1 commit
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Pull driver core and debugfs updates from Greg KH:
"Here is the "big" driver core and debugfs changes for 5.3-rc1It's a lot of different patches, all across the tree due to some api
changes and lots of debugfs cleanups.Other than the debugfs cleanups, in this set of changes we have:
- bus iteration function cleanups
- scripts/get_abi.pl tool to display and parse Documentation/ABI
entries in a simple way- cleanups to Documenatation/ABI/ entries to make them parse easier
due to typos and other minor things- default_attrs use for some ktype users
- driver model documentation file conversions to .rst
- compressed firmware file loading
- deferred probe fixes
All of these have been in linux-next for a while, with a bunch of
merge issues that Stephen has been patient with me for"* tag 'driver-core-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (102 commits)
debugfs: make error message a bit more verbose
orangefs: fix build warning from debugfs cleanup patch
ubifs: fix build warning after debugfs cleanup patch
driver: core: Allow subsystems to continue deferring probe
drivers: base: cacheinfo: Ensure cpu hotplug work is done before Intel RDT
arch_topology: Remove error messages on out-of-memory conditions
lib: notifier-error-inject: no need to check return value of debugfs_create functions
swiotlb: no need to check return value of debugfs_create functions
ceph: no need to check return value of debugfs_create functions
sunrpc: no need to check return value of debugfs_create functions
ubifs: no need to check return value of debugfs_create functions
orangefs: no need to check return value of debugfs_create functions
nfsd: no need to check return value of debugfs_create functions
lib: 842: no need to check return value of debugfs_create functions
debugfs: provide pr_fmt() macro
debugfs: log errors when something goes wrong
drivers: s390/cio: Fix compilation warning about const qualifiers
drivers: Add generic helper to match by of_node
driver_find_device: Unify the match function with class_find_device()
bus_find_device: Unify the match callback with class_find_device
...
11 Jul, 2019
8 commits
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Previously, if mbox_request_channel_byname was used with a name
which did not exist in the "mbox-names" property of a mailbox
client, the mailbox corresponding to the last entry in the
"mbox-names" list would be incorrectly selected.
With this patch, -EINVAL is returned if the named mailbox is
not found.Signed-off-by: Morten Borup Petersen
Signed-off-by: Jassi Brar -
If Tegra HSP device tree does not have 'shared irqs',
mailboxes pointer is NULL. Add non-NULL HSP mailboxes
check in resume callback before tegra_hsp_mailbox_startup()
call and prevent NULL pointer exception.Signed-off-by: Bitan Biswas
Signed-off-by: Jassi Brar -
Add noirq resume instead of resume callback for Tegra HSP. Tegra HSP
resume needs tegra_hsp_doorbell_startup() call to fix timeout error for
tegra_bpmp_transfer() during genpd resume noirq on Jetson TX2.Signed-off-by: Bitan Biswas
Signed-off-by: Jassi Brar -
Several drivers cast a struct device pointer to a struct
platform_device pointer only to then call platform_get_drvdata().
To improve readability, these constructs can be simplified
by using dev_get_drvdata() directly.Signed-off-by: Fuqian Huang
Signed-off-by: Jassi Brar -
GIEn is enabled at startup for RX doorbell mailboxes so
we need to clear the bit at shutdown in order to avoid
leaving the interrupt line enabled.Signed-off-by: Daniel Baluta
Reviewed-by: Oleksij Rempel
Signed-off-by: Jassi Brar -
The TI K3 AM65x and J721E family of SoCs have a new Mailbox IP that
is based on the existing Mailbox IP present in OMAP architecture based
SoCs. Each instance of the legacy OMAP Mailbox IP is now a single cluster
within the newer Mailbox IP instance on K3 architecture based SoCs. A
single K3 Mailbox IP instance has multiple clusters with each cluster
providing the same functionality as the existing OMAP Mailbox IP.Reuse the existing OMAP Mailbox driver to extend the support for this
newer IP present within the Main NavSS block on K3 SoCs. The K3 family
of SoCs use 64-bit ARMv8 processors for running Linux, so the driver is
also enhanced to deal with the differences between the 32-bit message
payloads and the 64-bit pointers used by the client drivers.Signed-off-by: Suman Anna
Signed-off-by: Jassi Brar -
This patch just re-orders some of the headers includes and also drop
the ones that are unnecessary.Signed-off-by: Sudeep Holla
Signed-off-by: Jassi Brar -
Add spinlock protection on IPCC register update to avoid race condition.
Without this fix, stm32_ipcc_set_bits and stm32_ipcc_clr_bits can be
called in parallel for different channels. This results in register
corruptions.Signed-off-by: Arnaud Pouliquen
Reviewed-by: Fabien Dessenne
Signed-off-by: Jassi Brar
19 Jun, 2019
2 commits
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Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundationthis program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner
Reviewed-by: Enrico Weigelt
Reviewed-by: Kate Stewart
Reviewed-by: Allison Randal
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman -
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation the gpl this program is
distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
version 2 gplv2 for more details you should have received a copy of
the gnu general public license version 2 gplv2 along with this
source codeextracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 16 file(s).
Signed-off-by: Thomas Gleixner
Reviewed-by: Enrico Weigelt
Reviewed-by: Allison Randal
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081201.771169395@linutronix.de
Signed-off-by: Greg Kroah-Hartman
05 Jun, 2019
2 commits
-
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms and conditions of the gnu general public license
version 2 as published by the free software foundation this program
is distributed in the hope it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more detailsextracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 263 file(s).
Signed-off-by: Thomas Gleixner
Reviewed-by: Allison Randal
Reviewed-by: Alexios Zavras
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
Signed-off-by: Greg Kroah-Hartman -
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation version 2 of the license this program
is distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more detailsextracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 100 file(s).
Signed-off-by: Thomas Gleixner
Reviewed-by: Alexios Zavras
Reviewed-by: Allison Randal
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.918357685@linutronix.de
Signed-off-by: Greg Kroah-Hartman