01 Oct, 2015
1 commit
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The talitos driver use two dma_map_sg path
according to SG are chained or not.
Since dma_map_sg can handle both case, clean the code with all
references to sg chained.Thus removing talitos_map_sg, talitos_unmap_sg_chain
and sg_count functions.Signed-off-by: LABBE Corentin
Signed-off-by: Herbert Xu
03 Sep, 2015
1 commit
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Pull SG updates from Jens Axboe:
"This contains a set of scatter-gather related changes/fixes for 4.3:- Add support for limited chaining of sg tables even for
architectures that do not set ARCH_HAS_SG_CHAIN. From Christoph.- Add sg chain support to target_rd. From Christoph.
- Fixup open coded sg->page_link in crypto/omap-sham. From
Christoph.- Fixup open coded crypto ->page_link manipulation. From Dan.
- Also from Dan, automated fixup of manual sg_unmark_end()
manipulations.- Also from Dan, automated fixup of open coded sg_phys()
implementations.- From Robert Jarzmik, addition of an sg table splitting helper that
drivers can use"* 'for-4.3/sg' of git://git.kernel.dk/linux-block:
lib: scatterlist: add sg splitting function
scatterlist: use sg_phys()
crypto/omap-sham: remove an open coded access to ->page_link
scatterlist: remove open coded sg_unmark_end instances
crypto: replace scatterwalk_sg_chain with sg_chain
target/rd: always chain S/G list
scatterlist: allow limited chaining without ARCH_HAS_SG_CHAIN
17 Aug, 2015
2 commits
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Signed-off-by: Dan Williams
[hch: split from a larger patch by Dan]
Signed-off-by: Christoph Hellwig
Acked-by: Herbert Xu
Signed-off-by: Jens Axboe -
This patch removes the CRYPTO_ALG_AEAD_NEW flag now that everyone
has been converted.Signed-off-by: Herbert Xu
10 Aug, 2015
1 commit
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The probe error path for this driver, for all intents and purposes,
is the talitos_remove() function due to the common "goto err_out".Without this patch applied, talitos_remove() will panic under these
two conditions:1. If the RNG device hasn't been registered via
talitos_register_rng() prior to entry into talitos_remove(),
then the attempt to unregister the RNG "device" will cause a panic.2. If the priv->chan array has not been allocated prior to entry
into talitos_remove(), then the per-channel FIFO cleanup will panic
because of the dereference of that NULL "array".Both of the above scenarios occur if talitos_probe_irq() fails.
This patch resolves issue #1 by introducing a boolean to mask the
hwrng_unregister() call in talitos_unregister_rng() if RNG device
registration was unsuccessful.It resolves issue #2 by checking that priv->chan is not NULL in the
per-channel FIFO cleanup for loop.Signed-off-by: Aaron Sierra
Signed-off-by: Herbert Xu
04 Aug, 2015
1 commit
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This patch converts talitos to the new AEAD interface. IV generation
has been removed since it's equivalent to a software implementation.Signed-off-by: Herbert Xu
13 May, 2015
6 commits
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-change req_ctx->nbuf from u64 to unsigned int to silence checker
warnings; this is safe since nbuf value is
Signed-off-by: Herbert Xu -
Check return value of scatterlist_sg_next(), i.e. don't rely solely
on number of bytes to be processed or number of scatterlist entries.Signed-off-by: Horia Geanta
Signed-off-by: Herbert Xu -
This reverts commit 7291a932c6e27d9768e374e9d648086636daf61c.
The conversion to be16_add_cpu() is incorrect in case cryptlen is
negative due to premature (i.e. before addition / subtraction)
implicit conversion of cryptlen (int -> u16) leading to sign loss.Cc: # 3.10+
Cc: Wei Yongjun
Signed-off-by: Horia Geanta
Signed-off-by: Herbert Xu -
Cc: # 3.2+
Fixes: 1d11911a8c57 ("crypto: talitos - fix warning: 'alg' may be used uninitialized in this function")
Signed-off-by: Horia Geanta
Signed-off-by: Herbert Xu -
The + operation has higher precedence than ?: so we need parentheses
here. Otherwise we may end up allocating a max of only one "cryptlen"
instead of two.Fixes: 6f65f6ac5fb3 ('crypto: talitos - implement scatter/gather copy for SEC1')
Signed-off-by: Dan Carpenter
Acked-by: Christophe Leroy
Signed-off-by: Herbert Xu -
All AEAD implementations must include internal/aead.h in order
to access required helpers.Signed-off-by: Herbert Xu
21 Apr, 2015
14 commits
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We add a specific compatible for SEC1, to handle the differences
between SEC1 and SEC2+Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
SEC1 bugs on 0 data hash, so we submit an already padded block representing 0 data
Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
SEC1 doesn't support scatter/gather, SEC1 doesn't handle link tables.
Therefore, for SEC1 we have to do it by SW. For that, we reserve
space at the end of the extended descriptor, in lieu of the space
reserved for the link tables on SEC2, and we perform sg_copy() when
preparing the descriptorsWe also adapt the max buffer size which is only 32k on SEC1 while it
is 64k on SEC2+Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
This patch adapts the interrupts handling and reset function for
SEC1. On SEC1, registers are almost similar to SEC2+, but bits
are sometimes located at different places. So we need to define
TALITOS1 and TALITOS2 versions of some fields, and manage according
to whether it is SEC1 or SEC2.On SEC1, only one interrupt vector is dedicated to the SEC, so only
interrupt_4ch is needed.On SEC1, interrupts are enabled by clearing related bits in IMR,
while on SEC2, interrupts are enabled by seting the bits in IMR.SEC1 also performs parity verification in the DES Unit. We have
to disable this feature because the test vectors provided in
the kernel have parity errors.In reset functions, only SEC2 supports continuation after error.
For SEC1, we have to reset in all cases.For errors handling, SEC2+ names have been kept, but displayed
text have been amended to reflect exact meaning on SEC1.Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
SEC 1.0, 1.2 and 2.x+ have different EU base addresses, so we need to
define pointers for each EU in the driver private data structure.
The proper address is set by the probe function depending on the
SEC type, in order to provide access to the proper address.Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
SEC1 descriptor is a bit different to SEC2+ descriptor.
talitos_submit() will have to copy hdr field into hdr1 field and
send the descriptor starting at hdr1 up to next_desc.
For SEC2, it remains unchanged and next_desc is just ignored.Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
talitos descriptor is slightly different for SEC1 and SEC2+, so
lets the helper function that fills the descriptor take into account
the type of SEC.Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
We add a new feature in the features field, to mark compatible
"fsl,sec1.0"
We also define a helper function called has_ftr_sec1() to help
functions quickly determine if they are running on SEC1 or SEC2+.
When only SEC1 or SEC2 is compiled in, has_ftr_sec1() return
trivial corresponding value. If both are compiled in, feature
field is checked.Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
This patch adds a helper function for reads and writes of the len
param of the talitos descriptor. This will help implement
SEC1 later.Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
map_single_talitos_ptr() is always called with extent == 0, so lets remove this unused parameter
Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
j_extent field is specific to SEC2 so we add a helper function to clear it
so that SEC1 can redefine that function as nopSigned-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
Linux CodyingStyle recommends to use short variables for local
variables. ptr is just good enough for those 3 lines functions.
It helps keep single lines shorter than 80 characters.Signed-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
This patch refactors the handling of the input and output data that is quite
similar in several functionsSigned-off-by: Christophe Leroy
Signed-off-by: Herbert Xu -
Do use zero_entry value to init the descriptors ptrs to zero instead of
writing 0 in each fieldSigned-off-by: Christophe Leroy
Signed-off-by: Herbert Xu
06 Mar, 2015
2 commits
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This is properly defined in the md5 header file.
Signed-off-by: Martin Hicks
Acked-by: Kim Phillips
Signed-off-by: Herbert Xu -
There were multiple loops in a row, for each separate step of the
initialization of the channels. Simplify to a single loop.Signed-off-by: Martin Hicks
Acked-by: Kim Phillips
Signed-off-by: Herbert Xu
26 Jan, 2015
1 commit
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Modify crypto drivers to use the generic SG helper since
both of them are equivalent and the one from crypto is redundant.See also:
468577abe37ff7b453a9ac613e0ea155349203ae reverted in
b2ab4a57b018aafbba35bff088218f5cc3d2142eSigned-off-by: Cristian Stoica
Signed-off-by: Herbert Xu
20 Oct, 2014
1 commit
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A platform_driver does not need to set an owner, it will be populated by the
driver core.Signed-off-by: Wolfram Sang
09 Feb, 2014
1 commit
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In function talitos_probe(), it will jump to err_out when getting an
error in talitos_probe_irq(). Then the uninitialized list head
priv->alg_list will be used in function talitos_remove(). In this case
we would get a call trace like the following. So move up the
initialization of priv->alg_list.Unable to handle kernel paging request for data at address 0x00000000
Faulting instruction address: 0xc0459ff4
Oops: Kernel access of bad area, sig: 11 [#1]
SMP NR_CPUS=8 P1020 RDB
Modules linked in:
CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 3.13.0-08789-g54c0a4b46150 #33
task: cf050000 ti: cf04c000 task.ti: cf04c000
NIP: c0459ff4 LR: c0459fd4 CTR: c02f2438
REGS: cf04dcb0 TRAP: 0300 Tainted: G W (3.13.0-08789-g54c0a4b46150)
MSR: 00029000 CR: 82000028 XER: 20000000
DEAR: 00000000 ESR: 00000000
GPR00: c045ac28 cf04dd60 cf050000 cf2579c0 00021000 00000000 c02f35b0 0000014e
GPR08: c07e702c cf104300 c07e702c 0000014e 22000024 00000000 c0002a3c 00000000
GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 c082e4e0 000000df
GPR24: 00000000 00100100 00200200 cf257a2c cf0efe10 cf2579c0 cf0efe10 00000000
NIP [c0459ff4] talitos_remove+0x3c/0x1c8
LR [c0459fd4] talitos_remove+0x1c/0x1c8
Call Trace:
[cf04dd60] [c07485d8] __func__.13331+0x1241c8/0x1391c0 (unreliable)
[cf04dd90] [c045ac28] talitos_probe+0x244/0x998
[cf04dde0] [c0306a74] platform_drv_probe+0x28/0x68
[cf04ddf0] [c0304d38] really_probe+0x78/0x250
[cf04de10] [c030505c] __driver_attach+0xc8/0xcc
[cf04de30] [c0302e98] bus_for_each_dev+0x6c/0xb8
[cf04de60] [c03043cc] bus_add_driver+0x168/0x220
[cf04de80] [c0305798] driver_register+0x88/0x130
[cf04de90] [c0002458] do_one_initcall+0x14c/0x198
[cf04df00] [c079f904] kernel_init_freeable+0x138/0x1d4
[cf04df30] [c0002a50] kernel_init+0x14/0x124
[cf04df40] [c000ec40] ret_from_kernel_thread+0x5c/0x64Signed-off-by: Kevin Hao
Signed-off-by: Herbert Xu
30 Dec, 2013
1 commit
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Driver core sets it to NULL upon probe failure or release.
Signed-off-by: Sachin Kamat
Signed-off-by: Herbert Xu
05 Dec, 2013
1 commit
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Commit 3e721aeb3df3816e283ab18e327cd4652972e213
("crypto: talitos - handle descriptor not found in error path")
tried to address the fact that CDPR (Current Descriptor Pointer Register)
is unreliable.As it turns out, there are still issues in the function detecting the
offending descriptor:
-only 32 bits of the descriptor address are read, however the address is
36-bit - since reset_channel() initializes channels with EAE (extended
address) bit set
-reading CDPR can return zero in cur_desc; when searching the channel
fifo for this address, cur_desc == dma_desc (= 0) case might happen,
leading to an oops when trying to return desc->hdr (desc is zero)
-read channel's .tail only once; the tail is a moving target; use a
local variable for the end of search conditionSigned-off-by: Lei Xu
Signed-off-by: Horia Geanta
Tested-by: Kalyani Chowdhury
Signed-off-by: Herbert Xu
28 Nov, 2013
2 commits
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For aead case when source and destination buffers are different,
there is an incorrect assumption that the source length includes the ICV
length. Fix this, since it leads to an oops when using sg_count() to
find the number of nents in the scatterlist:Unable to handle kernel paging request for data at address 0x00000004
Faulting instruction address: 0xf2265a28
Oops: Kernel access of bad area, sig: 11 [#1]
SMP NR_CPUS=8 P2020 RDB
Modules linked in: talitos(+)
CPU: 1 PID: 2187 Comm: cryptomgr_test Not tainted 3.11.0 #12
task: c4e72e20 ti: ef634000 task.ti: ef634000
NIP: f2265a28 LR: f2266ad8 CTR: c000c900
REGS: ef635bb0 TRAP: 0300 Not tainted (3.11.0)
MSR: 00029000 CR: 42042084 XER: 00000000
DEAR: 00000004, ESR: 00000000GPR00: f2266e10 ef635c60 c4e72e20 00000001 00000014 ef635c69 00000001 c11f3082
GPR08: 00000010 00000000 00000002 2f635d58 22044084 00000000 00000000 c0755c80
GPR16: c4bf1000 ef784000 00000000 00000000 00000020 00000014 00000010 ef2f6100
GPR24: ef2f6200 00000024 ef143210 ef2f6000 00000000 ef635d58 00000000 2f635d58
NIP [f2265a28] sg_count+0x1c/0xb4 [talitos]
LR [f2266ad8] talitos_edesc_alloc+0x12c/0x410 [talitos]
Call Trace:
[ef635c60] [c0552068] schedule_timeout+0x148/0x1ac (unreliable)
[ef635cc0] [f2266e10] aead_edesc_alloc+0x54/0x64 [talitos]
[ef635ce0] [f22680f0] aead_encrypt+0x24/0x70 [talitos]
[ef635cf0] [c024b948] __test_aead+0x494/0xf68
[ef635e20] [c024d54c] test_aead+0x64/0xcc
[ef635e40] [c024d604] alg_test_aead+0x50/0xc4
[ef635e60] [c024c838] alg_test+0x10c/0x2e4
[ef635ee0] [c0249d1c] cryptomgr_test+0x4c/0x54
[ef635ef0] [c005d598] kthread+0xa8/0xac
[ef635f40] [c000e3bc] ret_from_kernel_thread+0x5c/0x64
Instruction dump:
81230024 552807fe 0f080000 5523003a 4bffff24 39000000 2c040000 99050000
408100a0 7c691b78 38c00001 38600000 38630001 8109000c 70ea0002
---[ end trace 4498123cd8478591 ]---Signed-off-by: Horia Geanta
Signed-off-by: Herbert Xu -
talitos does not handle well zero-length assoc data. From dmesg:
talitos ffe30000.crypto: master data transfer error
talitos ffe30000.crypto: gather return/length errorCheck whether assoc data is provided by inspecting assoclen,
not assoc pointer.
This is needed in order to pass testmgr tests.Signed-off-by: Horia Geanta
Signed-off-by: Herbert Xu
24 Nov, 2013
1 commit
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Pull crypto update from Herbert Xu:
- Made x86 ablk_helper generic for ARM
- Phase out chainiv in favour of eseqiv (affects IPsec)
- Fixed aes-cbc IV corruption on s390
- Added constant-time crypto_memneq which replaces memcmp
- Fixed aes-ctr in omap-aes
- Added OMAP3 ROM RNG support
- Add PRNG support for MSM SoC's
- Add and use Job Ring API in caam
- Misc fixes[ NOTE! This pull request was sent within the merge window, but Herbert
has some questionable email sending setup that makes him public enemy
#1 as far as gmail is concerned. So most of his emails seem to be
trapped by gmail as spam, resulting in me not seeing them. - Linus ]* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (49 commits)
crypto: s390 - Fix aes-cbc IV corruption
crypto: omap-aes - Fix CTR mode counter length
crypto: omap-sham - Add missing modalias
padata: make the sequence counter an atomic_t
crypto: caam - Modify the interface layers to use JR API's
crypto: caam - Add API's to allocate/free Job Rings
crypto: caam - Add Platform driver for Job Ring
hwrng: msm - Add PRNG support for MSM SoC's
ARM: DT: msm: Add Qualcomm's PRNG driver binding document
crypto: skcipher - Use eseqiv even on UP machines
crypto: talitos - Simplify key parsing
crypto: picoxcell - Simplify and harden key parsing
crypto: ixp4xx - Simplify and harden key parsing
crypto: authencesn - Simplify key parsing
crypto: authenc - Export key parsing helper function
crypto: mv_cesa: remove deprecated IRQF_DISABLED
hwrng: OMAP3 ROM Random Number Generator support
crypto: sha256_ssse3 - also test for BMI2
crypto: mv_cesa - Remove redundant of_match_ptr
crypto: sahara - Remove redundant of_match_ptr
...
16 Oct, 2013
1 commit
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Use the common helper function crypto_authenc_extractkeys() for key
parsing.Cc: Kim Phillips
Cc: Herbert Xu
Cc: "David S. Miller"
Signed-off-by: Mathias Krause
Signed-off-by: Herbert Xu
10 Oct, 2013
1 commit
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Powerpc is a mess of implicit includes by prom.h. Add the necessary
explicit includes to drivers in preparation of prom.h cleanup.Signed-off-by: Rob Herring
Acked-by: Grant Likely
10 Jul, 2013
1 commit
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Use sg_pcopy_to_buffer() which is better than the function previously used.
Because it doesn't do kmap/kunmap for skipped pages.Signed-off-by: Akinobu Mita
Cc: "David S. Miller"
Cc: "James E.J. Bottomley"
Cc: Douglas Gilbert
Cc: Herbert Xu
Cc: Horia Geanta
Cc: Imre Deak
Cc: Tejun Heo
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
21 Mar, 2013
1 commit
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This reverts commit e763eb699be723fb41af818118068c6b3afdaf8d.
Current IPsec ESN implementation for authencesn(cbc(aes), hmac(sha))
(separate encryption and integrity algorithms) does not conform
to RFC4303.ICV is generated by hashing the sequence
SPI, SeqNum-High, SeqNum-Low, IV, Payload
instead of
SPI, SeqNum-Low, IV, Payload, SeqNum-High.Cc: # 3.8, 3.7
Reported-by: Chaoxing Lin
Signed-off-by: Horia Geanta
Reviewed-by: Kim Phillips
Signed-off-by: Herbert Xu