31 Mar, 2011

1 commit

• 25985edce   Fix common misspellings ... Browse Code »

  Fixes generated by 'codespell' and manually reviewed.

  Signed-off-by: Lucas De Marchi

  Lucas De Marchi

  2011-03-31 22:26:23 +0800  

03 Dec, 2010

1 commit

• 2a8626a9e   spi/pxa2xx: Add chipselect support for Sodaville ... Browse Code »

  The SPI core on Sodaville supports chip selects. Its configuration
  moved into the SSSR register at bit 0 and 1. Thus Sodaville can be hooked
  up with up to 4 devices.
  This patch ensures that the bits which are otherwiese reserved are only
  touched on Sodaville and not on any other PXAs. Also it makes sure that
  the status register does not lose the CS information while clearing the
  ROR bit.

  Signed-off-by: Sebastian Andrzej Siewior
  Signed-off-by: Dirk Brandewie

  Sebastian Andrzej Siewior

  2010-12-03 00:55:12 +0800  

01 Dec, 2010

2 commits

• d0777f2c3   spi/pxa2xx: Consider CE4100's FIFO depth ... Browse Code »

  For PXA the default threshold is FIFO_DEPTH / 2. Adjust this value for
  CE4100.

  Signed-off-by: Sebastian Andrzej Siewior
  Signed-off-by: Dirk Brandewie

  Sebastian Andrzej Siewior

  2010-12-01 20:48:30 +0800  
• 8348c259d   arm/pxa2xx: reorgazine SSP and SPI header files ... Browse Code »

  The PXA-SPI driver relies on some files / defines which are arm specific
  and are within the ARM tree. The CE4100 SoC which is x86 has also the
  SPI core.
  This patch moves the ssp and spi files from arm/mach-pxa and plat-pxa to
  include/linux where the CE4100 can access them.

  This move got verified by building the following defconfigs:
  cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig
  imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig
  raumfeld_defconfig magician_defconfig

  Signed-off-by: Sebastian Andrzej Siewior
  Signed-off-by: Dirk Brandewie

  Sebastian Andrzej Siewior

  2010-12-01 19:18:33 +0800