Eric Lee / smarc-fsl-linux-kernel

30 Nov, 2006

1 commit

09 Nov, 2006

1 commit

21 Oct, 2006

1 commit

04 Oct, 2006

2 commits

15 Jul, 2006

1 commit

01 Jul, 2006

1 commit

26 Jun, 2006

2 commits

  • 6bc392741   [PATCH] Corrections to memory barrier doc ... Browse Code »

    Apply some small corrections to the memory barrier document, as contributed by:

    Christoph Lameter
    Kirill Smelkov
    Randy Dunlap

    Signed-off-by: David Howells
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    David Howells
     
  • 2b94895b9   [PATCH] Another couple of alterations to the memory barrier doc ... Browse Code »

    Make another couple of alterations to the memory barrier document following
    suggestions by Alan Stern and in co-operation with Paul McKenney:

    (*) Rework the point of introduction of memory barriers and the description
    of what they are to reiterate why they're needed.

    (*) Modify a statement about the use of data dependency barriers to note that
    other barriers can be used instead (as they imply DD-barriers).

    Signed-off-by: David Howells
    Acked-By: Paul E. McKenney
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    David Howells
     

11 Jun, 2006

1 commit

  • 670bd95e0   [PATCH] Further alterations for memory barrier document ... Browse Code »

    From: David Howells

    Apply some alterations to the memory barrier document that I worked out
    with Paul McKenney of IBM, plus some of the alterations suggested by Alan
    Stern.

    The following changes were made:

    (*) One of the examples given for what can happen with overlapping memory
    barriers was wrong.

    (*) The description of general memory barriers said that a general barrier is
    a combination of a read barrier and a write barrier. This isn't entirely
    true: it implies both, but is more than a combination of both.

    (*) The first example in the "SMP Barrier Pairing" section was wrong: the
    loads around the read barrier need to touch the memory locations in the
    opposite order to the stores around the write barrier.

    (*) Added a note to make explicit that the loads should be in reverse order to
    the stores.

    (*) Adjusted the diagrams in the "Examples Of Memory Barrier Sequences"
    section to make them clearer. Added a couple of diagrams to make it more
    clear as to how it could go wrong without the barrier.

    (*) Added a section on memory speculation.

    (*) Dropped any references to memory allocation routines doing memory
    barriers. They may do sometimes, but it can't be relied on. This may be
    worthy of further documentation later.

    (*) Made the fact that a LOCK followed by an UNLOCK should not be considered a
    full memory barrier more explicit and gave an example.

    Signed-off-by: David Howells
    Acked-by: Paul E. McKenney
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    David Howells
     

16 May, 2006

1 commit

11 Apr, 2006

2 commits

  • c14038c39   [PATCH] Improve data-dependency memory barrier example in documentation ... Browse Code »

    In the memory barrier document, improve the example of the data dependency
    barrier situation by:

    (1) showing the initial values of the variables involved; and

    (2) repeating the instruction sequence description, this time with the data
    dependency barrier actually shown to make it clear what the revised
    sequence actually is.

    Signed-off-by: David Howells
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    David Howells
     
  • dbc8700e2   [PATCH] Fix memory barrier docs wrt atomic ops ... Browse Code »

    Fix the memory barrier documentation to attempt to describe atomic ops
    correctly.

    atomic_t ops that return a value _do_ imply smp_mb() either side, and so
    don't actually require smp_mb__*_atomic_*() special barriers.

    Also explains why special barriers exist in addition to normal barriers.

    Further fix the memory barrier documents to portray bitwise operation
    memory barrier effects correctly following Nick Piggin's comments.

    It makes the point that any atomic op that both modifies some state in
    memory and returns information on that state implies memory barriers on
    both sides.

    Signed-off-by: David Howells
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    David Howells
     

01 Apr, 2006

1 commit

  • 108b42b4b   [PATCH] Document Linux's memory barriers [try #7] ... Browse Code »

    The attached patch documents the Linux kernel's memory barriers.

    I've updated it from the comments I've been given.

    The per-arch notes sections are gone because it's clear that there are so many
    exceptions, that it's not worth having them.

    I've added a list of references to other documents.

    I've tried to get rid of the concept of memory accesses appearing on the bus;
    what matters is apparent behaviour with respect to other observers in the
    system.

    Interrupts barrier effects are now considered to be non-existent. They may be
    there, but you may not rely on them.

    I've added a couple of definition sections at the top of the document: one to
    specify the minimum execution model that may be assumed, the other to specify
    what this document refers to by the term "memory".

    I've made greater mention of the use of mmiowb().

    I've adjusted the way in which caches are described, and described the fun
    that can be had with cache coherence maintenance being unordered and data
    dependency not being necessarily implicit.

    I've described (smp_)read_barrier_depends().

    I've rearranged the order of the sections, so that memory barriers are
    discussed in abstract first, and then described the memory barrier facilities
    available on Linux, before going on to more real-world discussions and examples.

    I've added information about the lack of memory barriering effects with atomic
    ops and bitops.

    I've added information about control dependencies.

    I've added more diagrams to illustrate caching interactions between CPUs.

    Signed-off-by: David Howells
    Signed-off-by: Linus Torvalds

    David Howells