Eric Lee / smarc-fsl-linux-kernel

17 Jan, 2014

3 commits

  • 3fa2252b7   clk: Add set_rate_and_parent() op ... Browse Code »

    Some of Qualcomm's clocks can change their parent and rate at the
    same time with a single register write. Add support for this
    hardware to the common clock framework by adding a new
    set_rate_and_parent() op. When the clock framework determines
    that both the parent and the rate are going to change during
    clk_set_rate() it will call the .set_rate_and_parent() op if
    available and fall back to calling .set_parent() followed by
    .set_rate() otherwise.

    Reviewed-by: James Hogan
    Signed-off-by: Stephen Boyd
    Signed-off-by: Mike Turquette

    Stephen Boyd
     
  • d0d44dd4a   reset: Silence warning in reset-controller.h ... Browse Code »

    If a user of doesn't include
    before including reset-controller.h they'll get a
    warning as follows:

    include/linux/reset-controller.h:44:17:
    warning: 'struct of_phandle_args' declared inside parameter list

    This is because of_phandle_args is not forward declared. Add the
    declaration to silence this warning.

    Acked-by: Philipp Zabel
    Signed-off-by: Stephen Boyd
    Signed-off-by: Mike Turquette

    Stephen Boyd
     
  • 7bf21bc81   clk: sirf: re-arch to make the codes support both prima2 and atlas6 ... Browse Code »

    sirfprima2 and sirfatlas6 are two different SoCs in CSR SiRF series. for
    prima2 and atlas6, there are many shared clocks but there are still
    some different register layout and hardware clocks, then result in
    different clock table.

    here we re-arch the driver to
    1. clk-common.c provides common clocks for prima2 and atlas6,
    2. clk-prima2.h describles registers of prima2 and clk-prima2.c provides
    prima2 specific clocks and clock table.
    3. clk-atlas6.h describles registers of atlas6 and clk-atlas6.c provides
    atlas6 specific clocks and clock table.
    4. clk.h and clk.c expose external interfaces and provide uniform entry
    for both prima2 and atlas6.

    so both prima2 and atlas6 will get support by drivers/clk/sirf.

    Signed-off-by: Barry Song
    Signed-off-by: Rongjun Ying
    Signed-off-by: Mike Turquette

    Barry Song
     

15 Jan, 2014

4 commits

  • 5d2043fbe   clk: composite: pass mux_hw into determine_rate ... Browse Code »

    The composite clock's .determine_rate implementation can call the
    underyling .determine_rate callback corresponding to rate_hw or the
    underlying .determine_rate callback corresponding to mux_hw. In both
    cases we pass in rate_hw, which is wrong. Fixed by passing mux_hw into
    the correct callback.

    Reported-by: Lemon Dai
    Signed-off-by: Mike Turquette

    Mike Turquette
     
  • 119754e57   Merge branch 'clk-next-shmobile' into clk-next Browse Code »
    Mike Turquette
     
  • 209f4fedc   clk: shmobile: Fix MSTP clock array initialization ... Browse Code »

    The clks member of the clk_onecell_data structure should
    point to a valid clk array (no NULL entries allowed),
    and the clk_num should be equal to the number
    of elements in the clks array.

    The MSTP driver fails to satisfy the above conditions.
    The clks array may contain NULL entries if not all
    clock-indices are initialized in the device tree.
    Thus, if the clock indices are interleaved we end up
    with NULL pointers in-between.

    The other problem is the driver uses maximum clock index
    as the number of clocks, which is incorrect (less than
    the actual number of clocks by 1).

    Fix the first issue by pre-setting the whole clks array
    with ERR_PTR(-ENOENT) pointers instead of zeros; and
    use maximum clkidx + 1 as the number of clocks to fix
    the other one.

    This should make of_clk_src_onecell_get() return the following:
    * valid clk pointers for all clocks registered;
    * ERR_PTR(-EINVAL) if (idx >= clk_data->clk_num);
    * ERR_PTR(-ENOENT) if the clock at the selected index was not
    initialized in the device tree (and was not registered).

    Changes in V2:
    * removed brackets from the one-line for loop

    Signed-off-by: Valentine Barshak
    Acked-by: Laurent Pinchart
    Tested-by: Ben Dooks
    Signed-off-by: Mike Turquette

    Valentine Barshak
     
  • 6413b090d   clk: shmobile: Fix MSTP clock index ... Browse Code »

    Use clkidx when registering MSTP clocks instead of loop counter
    since the value is then used to access the specific clock index bit
    in the mstp register.

    The issue was introduced by the following commit:
    f94859c215b6d977 "clk: shmobile: Add MSTP clock support"

    Changes in V2:
    * none

    Signed-off-by: Valentine Barshak
    Acked-by: Laurent Pinchart
    Tested-by: Ben Dooks
    Signed-off-by: Mike Turquette

    Valentine Barshak
     

09 Jan, 2014

25 commits

01 Jan, 2014

1 commit

31 Dec, 2013

7 commits