18 Feb, 2007
31 commits
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The b44 Enet control disable bit may take longer to clear on some
systems, so the loop count is increased with this patch. Functionality
is not compromised, but a debug message can be seen when the bit is not
cleared within the count value.
Thanks to Vasileios Lourdas who reported the problem.Signed-off by: Gary Zambrano
Signed-off-by: Jeff Garzik
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Replaced B44_DMA_MASK with DMA_30BIT_MASK.
Signed-off by: Gary Zambrano
Signed-off-by: Jeff Garzik
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By reading the MAC status register we can detect whether the MAC has
seen the PHY see link. This allows us to show the link properties before
the device is up in ethtool.Signed-off-by: Auke Kok
Signed-off-by: Jeff Garzik -
Now that 2.6.19 provides a proper implementation that saves MSI, PCI-E
config space, we can have the e1000 driver use those instead of it's
custom implementation.Signed-off-by: Auke Kok
Signed-off-by: Jeff Garzik -
Signed-off-by: Jesse Brandeburg
Signed-off-by: Auke Kok
Signed-off-by: Andrew Morton
Signed-off-by: Jeff Garzik -
Use ARRAY_SIZE macro already defined in kernel.h for ATM
drivers.Signed-off-by: Ahmed S. Darwish
Cc: Jeff Garzik
Cc: chas williams
Cc: "David S. Miller"
Signed-off-by: Andrew Morton
Signed-off-by: Jeff Garzik -
The modifications and bug fixes noted below were done by Realtime Control
Works and Contemporary Control Systems, Inc, Jan 2005. They were
incorporated into the 2.6 kernel by Jeff Morrow of Sierra Analytics, Feb
2007.The changes have been tested on a Contemporary Controls PCI20U-4000.
Summary of changes:
Arc-rawmode.c:
rx():
- Fixed error in received packet lengths; 256 byte packets were
being received as 257 bytes packets.prepare_tx():
- Fixed error in transmit length calcs; 257 byte packets were being
transmitted as 260 byte packets.com20020.c:
com20020_check():
- We now load the SETUP2 register if the 'clockm' parameter is
non-zero, instead of checking for ARC_CAN_10MBIT. The user is
now responsible for whether or not SETUP2 is loaded. If the
clock multiplier is non-zero, this means that the user wants a
baud rate greater than 2.5Mbps. This is not possible unless the
SETUP2 register is present (COM20020D, or COM20022). So, we're
relying on the user to be smart about what kind of chip he's
dealing with...com20020-pci.c
- Added several entries to com20020pci_id_table[].Signed-off-by: Jeff Morrow
Cc: "David S. Miller"
Cc: Jeff Garzik
Signed-off-by: Andrew Morton
Signed-off-by: Jeff Garzik -
Remove the experimental tag for the pcnet32 NAPI implementation.
Signed-off-by: Don Fry
Signed-off-by: Jeff Garzik -
After being the defacto maintainer for a couple of years, I can now become the official maintainer.
Signed-off-by: Don Fry
Signed-off-by: Jeff Garzik -
Remove spin_lock_irqsave() around mii_ethtool_gset, mii_ethtool_sset
and generic_mii_ioctl. These are unnecessary and harmful because
the mii calls may call back into the mdio functions, which may sleep.Pointed out by David Brownell.
Signed-off-by: Haavard Skinnemoen
Signed-off-by: Jeff Garzik -
And while at it loose plenty of useless casts.
Signed-off-by: Ralf Baechle
Signed-off-by: Jeff Garzik -
New version.
Signed-off-by: Stephen Hemminger
Signed-off-by: Jeff Garzik -
Don't drop oversize frame it might be a VLAN (untagged).
Use different counter for fifo overrun vs fifo error.
Print error on fifo overrrun.Signed-off-by: Stephen Hemminger
Signed-off-by: Jeff Garzik -
The transmit timeout code could hang, and it would not clear out
problems if the hardware was stuck. Change the code to effectively do
a device down/up similar to the suspend/resume code.Signed-off-by: Stephen Hemminger
Signed-off-by: Jeff Garzik -
The Yukon-FE chip doesn't do gigabit and has a differen PHY internally.
On this chip, phy status register doesn't properly reflect the result
of flow control negotiation. To workaround the problem and avoid having
to have so much chip dependent code; compute the result of flow control
by looking at the local and remote advertised bits.Signed-off-by: Stephen Hemmminger
Signed-off-by: Jeff Garzik -
Resetting the pause bits on shutdown is not necessary.
The code was inherited from the vendor driver, and it is currently #ifdef'd
out there as well.Signed-off-by: Stephen Hemminger
Signed-off-by: Jeff Garzik -
Don't mark pause frames as errors. This problem caused transmitter not
to pause and would effectively take out a gigabit switch because the
it can't handle overrun.Signed-off-by: Stephen Hemminger
Signed-off-by: Jeff Garzik -
Fix copyrights in the cxgb3 driver.
Remove the Open Grid Computing copyright. It shouldn't be there.
Signed-off-by: Steve Wise
Signed-off-by: Jeff Garzik -
It was hardly necessary to repeat most of the code from gfar_error() in
gfar_interrupt(), especially having some inconsistencies between the two.
So, make the gfar_interrupt() just call gfar_error(), and not acknowledge
the interrupts itself as gfar_{receive/transmit/error}() do it anyway.
While at it, also clarify/cleanup debug messages in gfar_error()...Signed-off-by: Sergei Shtylyov
Signed-off-by: Jeff Garzik -
Signed-off-by: Amit S. Kale
Signed-off-by: Jeff Garzik -
Convert pci_module_init() to pci_register_driver().
Signed-off-by: Richard Knutsson
Signed-off-by: Jeff Garzik -
Bump the version number.
Signed-off-by: Jay Cliburn
Signed-off-by: Jeff Garzik -
Add device id for the Attansic L1 chip to pci_ids.h, then use it.
Signed-off-by: Chris Snook
Signed-off-by: Jay Cliburn
Signed-off-by: Jeff Garzik -
Remove unused define from atl1_main.c.
Signed-off-by: Chris Snook
Signed-off-by: Jay Cliburn
Signed-off-by: Jeff Garzik -
On some Asus motherboards containing the L1 NIC, the MAC address is
written by the BIOS directly to the MAC register during POST, and is
not stored in eeprom. If we don't succeed in fetching the MAC address
from eeprom or spi, try reading it directly from the MAC register.
Suggested by Xiong Huang.And do some cleanup while we've got the hood up...
Signed-off-by: Jay Cliburn
Signed-off-by: Chris Snook
Signed-off-by: Jeff Garzik -
An ioread32 statement reads the wrong address. Fix it.
Signed-off-by: Al Viro
Signed-off-by: Jay Cliburn
Signed-off-by: Chris Snook
Signed-off-by: Jeff Garzik -
The atl1 driver doesn't need NET_PCI. Remove it from Kconfig.
Noticed by Chad Sprouse.Signed-off-by: Jay Cliburn
Signed-off-by: Chris Snook
Signed-off-by: Jeff Garzik -
Signed-off-by: Komuro
Signed-off-by: Jeff Garzik -
Changes include:
* New support for 88e1145
* New support for 88e111s
* Fixing 88e1101 driver to not match non-88e1101 PHYs
* Increases in feature support across Marvell PHY product line
* Fixes a bunch of whitespace issues found by LindentSigned-off-by: Andrew Fleming
Signed-off-by: Jeff Garzik
17 Feb, 2007
9 commits
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* 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32:
[AVR32] Use per-controller spi_board_info structures
[AVR32] Warn, don't BUG if clk_disable is called too many times
[AVR32] Make sure all genclocks have a parent
[AVR32] Remove unnecessary sys_nfsservctl conditional
[AVR32] Wire up the SysV IPC calls properly
[AVR32] Define ioremap_nocache, ioport_map and ioport_unmap
[AVR32] Fix prototypes for __raw_writesb and friends -
* master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart:
[AGPGART] allow drm populated agp memory types cleanups
[AGPGART] intel-agp: Use ARRAY_SIZE macro when appropriate
[AGPGART] Add agp-type-to-mask-type method missing from some drivers.
[AGPGART] Don't try to remap i810 registers on resume.
[AGPGART] Allow drm-populated agp memory types
[AGPGART] compat ioctl -
* master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq:
[CPUFREQ] Longhaul - Redo Longhaul ver. 2
[CPUFREQ] EPS - Correct 2nd brand test
[CPUFREQ] Longhaul - Separate frequency and voltage transition
[CPUFREQ] Longhaul - Models of Nehemiah
[CPUFREQ] Whitespace fixup
[CPUFREQ] Longhaul - Simplier minmult
[CPUFREQ] CPU_FREQ_TABLE shouldn't be a def_tristate
[CPUFREQ] ondemand governor use new cpufreq rwsem locking in work callback
[CPUFREQ] ondemand governor restructure the work callback
[CPUFREQ] Rewrite lock in cpufreq to eliminate cpufreq/hotplug related issues
[CPUFREQ] Remove hotplug cpu crap
[CPUFREQ] Enhanced PowerSaver driver
[CPUFREQ] Longhaul - Add VT8235 support
[CPUFREQ] Longhaul - Fix guess_fsb function
[CPUFREQ] Longhaul - Remove duplicate tables
[CPUFREQ] Longhaul - Introduce Nehemiah C
[CPUFREQ] fix cpuinfo_cur_freq for CPU_HW_PSTATE
[CPUFREQ] Longhaul - Remove "ignore_latency" option -
The current driver is not setting the dev field in the private data
structure, which can lead to an OOPS if the driver tries to report an
error.Signed-off-by: Ben Dooks
Cc: James Simmons
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Add format specifier %d for uid in ecryptfs_printk
Signed-off-by: Thomas Hisch
Cc: Michael Halcrow
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
eCryptfs is gobbling a lot of stack in ecryptfs_generate_key_packet_set()
because it allocates a temporary memory-hungry ecryptfs_key_record struct.
This patch introduces a new kmem_cache for that struct and converts
ecryptfs_generate_key_packet_set() to use it.Signed-off-by: Michael Halcrow
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
When NFSD receives a write request, the data is typically in a number of
1448 byte segments and writev is used to collect them together.Unfortunately, generic_file_buffered_write passes these to the filesystem
one at a time, so an e.g. 32K over-write becomes a series of partial-page
writes to each page, causing the filesystem to have to pre-read those pages
- wasted effort.generic_file_buffered_write handles one segment of the vector at a time as
it has to pre-fault in each segment to avoid deadlocks. When writing from
kernel-space (and nfsd does) this is not an issue, so
generic_file_buffered_write does not need to break and iovec from nfsd into
little pieces.This patch avoids the splitting when get_fs is KERNEL_DS as it is
from NFSd.This issue was introduced by commit 6527c2bdf1f833cc18e8f42bd97973d583e4aa83
Acked-by: Nick Piggin
Cc: Norman Weathers
Cc: Vladimir V. Saveliev
Signed-off-by: Neil Brown
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
When setting an ACL that lacks inheritable ACEs on a directory, we should set
a default ACL of zero length, not a default ACL with all bits denied.Signed-off-by: "J. Bruce Fields"
Signed-off-by: Neil Brown
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
We're inserting deny's between some ACEs in order to enforce posix draft acl
semantics which prevent permissions from accumulating across entries in an
acl.That's fine, but we're doing that by inserting a deny after *every* allow,
which is overkill. We shouldn't be adding them in places where they actually
make no difference.Also replaced some helper functions for creating acl entries; I prefer just
assigning directly to the struct fields--it takes a few more lines, but the
field names provide some documentation that I think makes the result easier
understand.Signed-off-by: J. Bruce Fields
Signed-off-by: Neil Brown
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
