27 Aug, 2019
1 commit
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NPCM7XX_Tx_OPER GENMASK bits are wrong, fix them.
Hopefully the NPCM7XX_REG_TICR0 register reset value of those bits was 0,
so it did not cause an issue.The function npcm7xx_timer_oneshot() reads the register
NPCM7XX_REG_TCSR0, modifies it and then reads it again overwriting the
previous changes. Remove the extra read which is pointless.The function npcm7xx_timer_periodic() is correct but the code writes
to the NPCM7XX_REG_TICR0 register while it is dealing with the
NPCM7XX_REG_TCSR0 register, that is confusing. Separate the write to
the registers in the code for the sake of clarity.Fixes: 1c00289ecd12 ("clocksource/drivers/npcm: Add NPCM7xx timer driver")
Signed-off-by: Avi Fishman
Signed-off-by: Daniel Lezcano
10 Jul, 2019
1 commit
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Arguments are supposed to be ordered high then low.
Signed-off-by: Joe Perches
Signed-off-by: Thomas Gleixner
Link: https://lkml.kernel.org/r/d6a9d49c9837d38816b71d783f5aed7235e8ca94.1562734889.git.joe@perches.com
31 Mar, 2018
1 commit
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Add Nuvoton BMC NPCM7xx timer driver.
The clocksource Enable 24-bit TIMER0 and TIMER1 counters,
while TIMER0 serve as clockevent and TIMER1 serve as clocksource.Signed-off-by: Tomer Maimon
Reviewed-by: Brendan Higgins
Signed-off-by: Daniel Lezcano
