09 Jan, 2020
1 commit
-
commit 9d05c18e8d7de566ff68f221fcae65e78708dd1d upstream.
When enabling ftrace graph tracer, it gets the tracing clock in
ftrace_push_return_trace(). Eventually, it invokes riscv_sched_clock()
to get the clock value. If riscv_sched_clock() isn't marked with
'notrace', it will call ftrace_push_return_trace() and cause infinite
loop.The result of failure as follow:
command: echo function_graph >current_tracer
[ 46.176787] Unable to handle kernel paging request at virtual address ffffffe04fb38c48
[ 46.177309] Oops [#1]
[ 46.177478] Modules linked in:
[ 46.177770] CPU: 0 PID: 256 Comm: $d Not tainted 5.5.0-rc1 #47
[ 46.177981] epc: ffffffe00035e59a ra : ffffffe00035e57e sp : ffffffe03a7569b0
[ 46.178216] gp : ffffffe000d29b90 tp : ffffffe03a756180 t0 : ffffffe03a756968
[ 46.178430] t1 : ffffffe00087f408 t2 : ffffffe03a7569a0 s0 : ffffffe03a7569f0
[ 46.178643] s1 : ffffffe00087f408 a0 : 0000000ac054cda4 a1 : 000000000087f411
[ 46.178856] a2 : 0000000ac054cda4 a3 : 0000000000373ca0 a4 : ffffffe04fb38c48
[ 46.179099] a5 : 00000000153e22a8 a6 : 00000000005522ff a7 : 0000000000000005
[ 46.179338] s2 : ffffffe03a756a90 s3 : ffffffe00032811c s4 : ffffffe03a756a58
[ 46.179570] s5 : ffffffe000d29fe0 s6 : 0000000000000001 s7 : 0000000000000003
[ 46.179809] s8 : 0000000000000003 s9 : 0000000000000002 s10: 0000000000000004
[ 46.180053] s11: 0000000000000000 t3 : 0000003fc815749c t4 : 00000000000efc90
[ 46.180293] t5 : ffffffe000d29658 t6 : 0000000000040000
[ 46.180482] status: 0000000000000100 badaddr: ffffffe04fb38c48 cause: 000000000000000fSigned-off-by: Zong Li
Reviewed-by: Steven Rostedt (VMware)
[paul.walmsley@sifive.com: cleaned up patch description]
Fixes: 92e0d143fdef ("clocksource/drivers/riscv_timer: Provide the sched_clock")
Cc: stable@vger.kernel.org
Signed-off-by: Paul Walmsley
Signed-off-by: Greg Kroah-Hartman
05 Sep, 2019
1 commit
-
If we just use the CSRs that these map to directly the code is simpler
and doesn't require extra inline assembly code. Also fix up the top-level
comment in timer-riscv.c to not talk about the cycle count or mention
details of the clocksource interface, of which this file is just a
consumer.Signed-off-by: Christoph Hellwig
Reviewed-by: Atish Patra
Signed-off-by: Paul Walmsley
07 Aug, 2019
1 commit
-
There is only one clocksource in RISC-V. The boot cpu initializes
that clocksource. No need to keep a percpu data structure.Signed-off-by: Atish Patra
Signed-off-by: Paul Walmsley
Acked-by: Daniel Lezcano
23 Mar, 2019
1 commit
-
For all riscv architectures (RV32, RV64 and RV128), the clocksource
is a 64 bit incrementing counter.Fix the clock source mask accordingly.
Tested on both 64bit and 32 bit virt machine in QEMU.
Fixes: 62b019436814 ("clocksource: new RISC-V SBI timer driver")
Signed-off-by: Atish Patra
Signed-off-by: Thomas Gleixner
Reviewed-by: Anup Patel
Cc: Albert Ou
Cc: Daniel Lezcano
Cc: linux-riscv@lists.infradead.org
Cc: Palmer Dabbelt
Cc: Anup Patel
Cc: Damien Le Moal
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20190322215411.19362-1-atish.patra@wdc.com
23 Feb, 2019
1 commit
-
Currently, clocksource registration happens for an invalid cpu for
non-smp kernels. This lead to kernel panic as cpu hotplug registration
will fail for those cpus. Moreover, riscv_hartid_to_cpuid can return
errors now.Do not proceed if hartid or cpuid is invalid. Take this opportunity to
print appropriate error strings for different failure cases.Signed-off-by: Atish Patra
Reviewed-by: Anup Patel
Reviewed-by: Palmer Dabbelt
Signed-off-by: Daniel Lezcano
19 Dec, 2018
1 commit
-
In order to unify the names in this directory, let's rename the driver to be
prefixed with timer-*Reviewed-by: Palmer Dabbelt
Signed-off-by: Daniel Lezcano