04 Jul, 2008

1 commit


06 Feb, 2008

1 commit

  • Teach AVR32 to use the "GPIO Library" when exposing its GPIOs, so that signals
    on external chips (like GPIO expanders) can easily be used.

    This mostly reorganizes some existing logic, with two minor changes in
    behavior:

    - The PSR registers are used instead of the previous "gpio_mask" values,
    matching AT91 behavior and removing some duplication between that role
    and that of "pinmux_mask".

    - NR_IRQs grew to acommodate a bank of external GPIOs. Eventually this
    number should probably become a board-specific config option.

    There's a debugfs dump of status for the built-in GPIOs, showing which pins
    have deglitching, pullups, or open drain drive enabled, as well as the ID
    string used when requesting each IRQ.

    Signed-off-by: David Brownell
    Acked-by: Haavard Skinnemoen
    Cc: Jean Delvare
    Cc: Eric Miao
    Cc: Sam Ravnborg
    Cc: Philipp Zabel
    Cc: Russell King
    Cc: Ben Gardner
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    David Brownell
     

26 Oct, 2006

1 commit

  • The read[bwl] and write[bwl] functions are meant for accessing PCI
    devices. How this is achieved on AVR32 is unknown, as there are no
    systems with a PCI bridge available yet.

    On-chip peripheral access, however, should not depend on how we end
    up implementing PCI access, so using __raw_read[bwl]/__raw_write[bwl]
    is the right thing to do for on-chip peripherals. This patch converts
    the drivers for the static memory controller, interrupt controller,
    PIO controller and system manager to use __raw MMIO access.

    Signed-off-by: Haavard Skinnemoen
    Signed-off-by: Linus Torvalds

    Haavard Skinnemoen
     

26 Sep, 2006

1 commit

  • This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
    CPU and the AT32STK1000 development board.

    AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
    cost-sensitive embedded applications, with particular emphasis on low power
    consumption and high code density. The AVR32 architecture is not binary
    compatible with earlier 8-bit AVR architectures.

    The AVR32 architecture, including the instruction set, is described by the
    AVR32 Architecture Manual, available from

    http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf

    The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
    features a 7-stage pipeline, 16KB instruction and data caches and a full
    Memory Management Unit. It also comes with a large set of integrated
    peripherals, many of which are shared with the AT91 ARM-based controllers from
    Atmel.

    Full data sheet is available from

    http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

    while the CPU core implementation including caches and MMU is documented by
    the AVR32 AP Technical Reference, available from

    http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

    Information about the AT32STK1000 development board can be found at

    http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918

    including a BSP CD image with an earlier version of this patch, development
    tools (binaries and source/patches) and a root filesystem image suitable for
    booting from SD card.

    Alternatively, there's a preliminary "getting started" guide available at
    http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
    to the sources and patches you will need in order to set up a cross-compiling
    environment for avr32-linux.

    This patch, as well as the other patches included with the BSP and the
    toolchain patches, is actively supported by Atmel Corporation.

    [dmccr@us.ibm.com: Fix more pxx_page macro locations]
    [bunk@stusta.de: fix `make defconfig']
    Signed-off-by: Haavard Skinnemoen
    Signed-off-by: Adrian Bunk
    Signed-off-by: Dave McCracken
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Haavard Skinnemoen