17 Apr, 2017

1 commit

  • …linux into timers/core

    Pull clockevents updates from Daniel Lezcano

    - Provide a framework to handle errata gracefuly for arm_arch_timer (Mark
    Zyngier)

    - Clarify the DT properties for the rockchip timer and add the clocksource as
    an alternative to the bogus architected timer (Alexander Kochetkov)

    - Rename the Gemini timer to Faraday timer fttmr010 and provide a specific
    initialization for Gemini (Linus Walleij)

    - Add missing newlines in the error message in the timers (Rafał Miłecki)

    - Read the clock once and implement the delay timer on Orion (Russell King)

    Thomas Gleixner
     

15 Apr, 2017

1 commit

  • In preparation for making the clockevents core NTP correction aware,
    all clockevent device drivers must set ->min_delta_ticks and
    ->max_delta_ticks rather than ->min_delta_ns and ->max_delta_ns: a
    clockevent device's rate is going to change dynamically and thus, the
    ratio of ns to ticks ceases to stay invariant.

    Make the dw_apb clockevent driver initialize these fields properly.

    This patch alone doesn't introduce any change in functionality as the
    clockevents core still looks exclusively at the (untouched) ->min_delta_ns
    and ->max_delta_ns. As soon as this has changed, a followup patch will
    purge the initialization of ->min_delta_ns and ->max_delta_ns from this
    driver.

    Cc: Ingo Molnar
    Cc: Thomas Gleixner
    Cc: Daniel Lezcano
    Cc: Richard Cochran
    Cc: Prarit Bhargava
    Cc: Stephen Boyd
    Acked-by: Daniel Lezcano
    Signed-off-by: Nicolai Stange
    Signed-off-by: John Stultz

    Nicolai Stange
     

07 Apr, 2017

1 commit


25 Dec, 2016

1 commit


28 Apr, 2016

1 commit

  • The dw_apb_timer only "supports PERIODIC mode and their drivers emulate
    ONESHOT over that" as described in commit 8fff52fd5093 ("clockevents:
    Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state").

    Inspired by Viresh, I think the dw_apb_timer also needs to implement
    the set_state_oneshot_stopped() which is called by the clkevt core,
    when the next event is required at an expiry time of 'KTIME_MAX'. This
    normally happens with NO_HZ_{IDLE|FULL} in both LOWRES/HIGHRES modes.

    This patch makes the clockevent device to stop on such an event, to
    avoid spurious interrupts, as explained by the above commit.

    Signed-off-by: Jisheng Zhang
    Signed-off-by: Daniel Lezcano
    Reviewed-by: Viresh Kumar

    Jisheng Zhang
     

16 Dec, 2015

3 commits

  • It seems gcc can automatically inline apbt_writel() for us, but
    apbt_real isn't inlined. This patch makes them inline to get a trivial
    performance improvement: 4096 rounds of __apbt_read_clocksource() call
    spend time on Marvell BG4CT platform:

    before the patch 1275240ns on average
    after the patch 1263240ns on average

    so we get 1% performance improvement.

    Signed-off-by: Jisheng Zhang
    Signed-off-by: Daniel Lezcano

    Jisheng Zhang
     
  • It's safe to use the relaxed version. From another side, the relaxed io
    accessor macros are available on all architectures now, so we can use
    the relaxed versions to get a trivial system performance improvement,
    we measured time the following functions spent on Marvell BG4CT:

    4096 rounds of __apbt_read_clocksource() call:

    before the patch: 1263240ns on average
    after the patch: 1250080ns on average
    improved by 1%

    4096 rounds of apbt_eoi() call:

    before the patch: 1290960ns on average
    after the patch: 1248240ns on average

    4096 rounds of apbt_next_event() call:

    before the patch: 3333660ns on average
    after the patch: 1322040ns on average

    improved by 60%!

    Signed-off-by: Jisheng Zhang
    Signed-off-by: Daniel Lezcano

    Jisheng Zhang
     
  • On Marvell BG4CT platform, we observed the __apbt_read_clocksource()
    return wrong value: Let's assume the APBTMR_N_CURRENT_VALUE value is
    0xf0000000, we got 0xffffffff0fffffff, but it should be 0xfffffff.

    This issue should be common on all 64bit platforms. We fix the issue
    by letting aptb_readl() return u32. apbt_writel() is also updated
    to write u32 val rather than unsigned long.

    Signed-off-by: Jisheng Zhang
    Signed-off-by: Daniel Lezcano

    Jisheng Zhang
     

10 Aug, 2015

2 commits

  • Commit d2348fb6fdc6 ("tick: Dynamically set broadcast irq affinity")
    adds one excellent feature CLOCK_EVT_FEAT_DYNIRQ to let the core set the
    interrupt affinity of the broadcast interrupt to the cpu which has the
    earliest expiry time. This patch adds CLOCK_EVT_FEAT_DYNIRQ flag to
    avoid unnecessary wakeups and IPIs when the dw_apb_timer is used as
    broadcast timer.

    A simple test:
    ~ # rm /tmp/test.sh
    ~ # cat > /tmp/test.sh
    cat /proc/interrupts
    for i in `seq 10` ; do sleep $i; done
    cat /proc/interrupts
    ~ # chmod +x /tmp/test.sh
    ~ # taskset 0x2 /tmp/test.sh

    without the patch:

    CPU0 CPU1
    27: 115 36 GIC 27 arch_timer
    45: 62 0 GIC 45 mmc0
    160: 88 0 interrupt-controller 8 timer
    227: 0 0 interrupt-controller 4 f7e81400.i2c
    228: 0 0 interrupt-controller 5 f7e81800.i2c
    229: 0 0 interrupt-controller 7 dw_spi65535
    230: 0 0 interrupt-controller 21 f7e84000.i2c
    231: 0 0 interrupt-controller 20 f7e84800.i2c
    265: 445 0 interrupt-controller 8 serial
    IPI0: 0 0 CPU wakeup interrupts
    IPI1: 0 11 Timer broadcast interrupts
    IPI2: 56 104 Rescheduling interrupts
    IPI3: 0 0 Function call interrupts
    IPI4: 0 4 Single function call interrupts
    IPI5: 0 0 CPU stop interrupts
    IPI6: 25 27 IRQ work interrupts
    IPI7: 0 0 completion interrupts
    IPI8: 0 0 CPU backtrace
    Err: 0
    CPU0 CPU1
    27: 115 38 GIC 27 arch_timer
    45: 62 0 GIC 45 mmc0
    160: 160 0 interrupt-controller 8 timer
    227: 0 0 interrupt-controller 4 f7e81400.i2c
    228: 0 0 interrupt-controller 5 f7e81800.i2c
    229: 0 0 interrupt-controller 7 dw_spi65535
    230: 0 0 interrupt-controller 21 f7e84000.i2c
    231: 0 0 interrupt-controller 20 f7e84800.i2c
    265: 514 0 interrupt-controller 8 serial
    IPI0: 0 0 CPU wakeup interrupts
    IPI1: 0 83 Timer broadcast interrupts
    IPI2: 56 104 Rescheduling interrupts
    IPI3: 0 0 Function call interrupts
    IPI4: 0 4 Single function call interrupts
    IPI5: 0 0 CPU stop interrupts
    IPI6: 25 46 IRQ work interrupts
    IPI7: 0 0 completion interrupts
    IPI8: 0 0 CPU backtrace
    Err: 0

    cpu0 get 160-88=72 timer interrupts, CPU1 got 83-11=72 broadcast timer
    IPIs
    So, overall system got 72+72=144 wake ups and 72 broadcast timer IPIs

    With the patch:
    CPU0 CPU1
    27: 107 37 GIC 27 arch_timer
    45: 62 0 GIC 45 mmc0
    160: 66 7 interrupt-controller 8 timer
    227: 0 0 interrupt-controller 4 f7e81400.i2c
    228: 0 0 interrupt-controller 5 f7e81800.i2c
    229: 0 0 interrupt-controller 7 dw_spi65535
    230: 0 0 interrupt-controller 21 f7e84000.i2c
    231: 0 0 interrupt-controller 20 f7e84800.i2c
    265: 311 0 interrupt-controller 8 serial
    IPI0: 0 0 CPU wakeup interrupts
    IPI1: 2 4 Timer broadcast interrupts
    IPI2: 58 100 Rescheduling interrupts
    IPI3: 0 0 Function call interrupts
    IPI4: 0 4 Single function call interrupts
    IPI5: 0 0 CPU stop interrupts
    IPI6: 21 24 IRQ work interrupts
    IPI7: 0 0 completion interrupts
    IPI8: 0 0 CPU backtrace
    Err: 0
    CPU0 CPU1
    27: 107 39 GIC 27 arch_timer
    45: 62 0 GIC 45 mmc0
    160: 69 75 interrupt-controller 8 timer
    227: 0 0 interrupt-controller 4 f7e81400.i2c
    228: 0 0 interrupt-controller 5 f7e81800.i2c
    229: 0 0 interrupt-controller 7 dw_spi65535
    230: 0 0 interrupt-controller 21 f7e84000.i2c
    231: 0 0 interrupt-controller 20 f7e84800.i2c
    265: 380 0 interrupt-controller 8 serial
    IPI0: 0 0 CPU wakeup interrupts
    IPI1: 3 6 Timer broadcast interrupts
    IPI2: 60 100 Rescheduling interrupts
    IPI3: 0 0 Function call interrupts
    IPI4: 0 4 Single function call interrupts
    IPI5: 0 0 CPU stop interrupts
    IPI6: 21 45 IRQ work interrupts
    IPI7: 0 0 completion interrupts
    IPI8: 0 0 CPU backtrace
    Err: 0

    cpu0 got 69-66=3, cpu1 got 75-7=68 timer interrupts. cpu0 got 3-2=1
    broadcast timer IPIs, cpu1 got 6-4=2 broadcast timer IPIs.
    So, overall system got 3+68+1+2=74 wakeups and 1+2=3 broadcast timer
    IPIs

    This patch removes 50% wakeups and almost 100% broadcast timer IPIs!

    Signed-off-by: Jisheng Zhang
    Signed-off-by: Daniel Lezcano

    Jisheng Zhang
     
  • Migrate dw_apb driver to the new 'set-state' interface provided by
    clockevents core, the earlier 'set-mode' interface is marked obsolete
    now.

    This also enables us to implement callbacks for new states of clockevent
    devices, for example: ONESHOT_STOPPED.

    Cc: Jacob Pan
    Cc: Jamie Iles
    Signed-off-by: Viresh Kumar
    Signed-off-by: Daniel Lezcano

    Viresh Kumar
     

05 Mar, 2015

1 commit


11 Dec, 2013

1 commit


19 Jun, 2013

1 commit

  • This reverts commit 55a68c23e0a675b2b8ac2656fd6edbf98b78e4c6.

    In order to avoid a collision with dw_apb_timer changes in
    the arm-soc tree, revert this change.

    I'm leaving it to the arm-soc folks to sort out if they want
    to keep the other side of the collision or if they're just going
    to back it all out and try again during the next release cycle.

    Reported-by: Dinh Nguyen
    Signed-off-by: John Stultz

    John Stultz
     

29 May, 2013

1 commit

  • It seems we made a mistake when creating dw_apb_timer_of.c:
    picoxcell sched_clock had parts that were not related to
    dw_apb_timer, yet we moved them to dw_apb_timer_of, and tried to
    use them on socfpga.

    This results in system where user/system time is not measured
    properly, as demonstrated by

    time dd if=/dev/urandom of=/dev/zero bs=100000 count=100

    So this patch switches sched_clock to hardware that exists on both
    platforms, and adds missing of_node_put() in dw_apb_timer_init().

    Signed-off-by: Pavel Machek
    Acked-by: Jamie Iles
    Signed-off-by: John Stultz

    Pavel Machek
     

16 May, 2013

1 commit


05 Oct, 2011

1 commit


28 Jun, 2011

1 commit

  • The APB timers are an IP block from Synopsys (DesignWare APB timers)
    and are also found in other systems including ARM SoC's. This patch
    adds functions for creating clock_event_devices and clocksources from
    APB timers but does not do the resource allocation. This is handled
    in a higher layer to allow the timers to be created from multiple
    methods such as platform_devices.

    Cc: Thomas Gleixner
    Cc: Ingo Molnar
    Cc: "H. Peter Anvin"
    Cc: Jacob Pan
    Signed-off-by: Jamie Iles
    Signed-off-by: John Stultz

    Jamie Iles