06 Dec, 2020
1 commit
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"xargs echo" is not a safe way to remove line breaks because the input
may exceed the command line limit and xargs may break it up into
multiple invocations of echo. This should never happen because
scripts/gen_autoksyms.sh expects all undefined symbols are placed in
the second line of .mod files.One possible way is to replace "xargs echo" with
"sed ':x;N;$!bx;s/\n/ /g'" or something, but I rewrote the code by
using awk because it is more readable.This issue was reported by Sami Tolvanen; in his Clang LTO patch set,
$(multi-used-m) is no longer an ELF object, but a thin archive that
contains LLVM bitcode files. llvm-nm prints out symbols for each
archive member separately, which results a lot of dupications, in some
places, beyond the system-defined limit.This problem must be fixed irrespective of LTO, and we must ensure
zero possibility of having this issue.Link: https://lkml.org/lkml/2020/12/1/1658
Reported-by: Sami Tolvanen
Signed-off-by: Masahiro Yamada
Reviewed-by: Sami Tolvanen
20 Oct, 2020
1 commit
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This change removes all instances of DISABLE_LTO from
Makefiles, as they are currently unused, and the preferred
method of disabling LTO is to filter out the flags instead.Note added by Masahiro Yamada:
DISABLE_LTO was added as preparation for GCC LTO, but GCC LTO was
not pulled into the mainline. (https://lkml.org/lkml/2014/4/8/272)Suggested-by: Kees Cook
Signed-off-by: Sami Tolvanen
Reviewed-by: Kees Cook
Signed-off-by: Masahiro Yamada
10 Aug, 2020
3 commits
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The conditional:
ifneq ($(hostprogs),)
... is evaluated to true if $(hostprogs) does not contain any word but
whitespace characters.ifneq ($(strip $(hostprogs)),)
... is a safe way to avoid interpreting whitespace as a non-empty value,
but I'd rather want to use the side-effect of $(sort ...) to do the
equivalent.$(sort ...) is used in scripts/Makefile.host in order to drop duplication
in $(hostprogs). It is also useful to strip excessive spaces.Move $(sort ...) before evaluating the ifneq.
Signed-off-by: Masahiro Yamada
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The host shared library rules are currently implemented in
scripts/Makefile.host, but actually GCC-plugin is the only user of
them. (The VDSO .so files are built for the target by different
build rules) Hence, they do not need to be treewide available.Move all the relevant build rules to scripts/gcc-plugins/Makefile.
I also optimized the build steps so *.so is directly built from .c
because every upstream plugin is compiled from a single source file.I am still keeping the multi-file plugin support, which Kees Cook
mentioned might be needed by out-of-tree plugins.
(https://lkml.org/lkml/2019/1/11/1107)If the plugin, foo.so, is compiled from two files foo.c and foo2.c,
then you can do like follows:foo-objs := foo.o foo2.o
Single-file plugins do not need the *-objs notation.
Signed-off-by: Masahiro Yamada
Acked-by: Kees Cook -
Currently, the directories of objects are automatically created
only for O= builds.It should not hurt to cater to this for in-tree builds too.
Signed-off-by: Masahiro Yamada
07 Jul, 2020
1 commit
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Since the pre-git time the checker is run first, before the compiler.
But if the source file contains some syntax error, the warnings from
the compiler are more useful than those from sparse (and other
checker most probably too).So move the 'check' command to run after the compiler.
Signed-off-by: Luc Van Oostenryck
Signed-off-by: Masahiro Yamada
03 Jun, 2020
1 commit
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Make modules.order depend on $(obj-m), and use if_changed to build it.
This will avoid unneeded update of modules.order, which will be useful
to optimize the modpost stage.Currently, the second pass of modpost is always invoked. By checking the
timestamp of modules.order, we can avoid the unneeded modpost.Signed-off-by: Masahiro Yamada
01 Jun, 2020
1 commit
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Remove lib-target, builtin-target, modorder-target, and modtargets.
Instead, add targets-for-builtin and targets-for-modules.
Signed-off-by: Masahiro Yamada
25 May, 2020
5 commits
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built-in.a contains the built-in object paths from the current and sub
directories.module.order collects the module paths from the current and sub
directories.Make their build rules look more symmetrical.
Signed-off-by: Masahiro Yamada
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I think subdir-builtin is clearer.
While I was here, I made its build rule explicit.
Signed-off-by: Masahiro Yamada
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Save $(addprefix ...) for subdir-obj-y.
Signed-off-by: Masahiro Yamada
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Do not try to build any module-related artifacts when CONFIG_MODULES
is disabled.Signed-off-by: Masahiro Yamada
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I do not see a good reason to add ifdef here.
Signed-off-by: Masahiro Yamada
17 May, 2020
1 commit
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Kbuild supports the infrastructure to build host programs, but there
was no support to build userspace programs for the target architecture
(i.e. the same architecture as the kernel).Sam Ravnborg worked on this in 2014 (https://lkml.org/lkml/2014/7/13/154),
but it was not merged. One problem at that time was, there was no good way
to know whether $(CC) can link standalone programs. In fact, pre-built
kernel.org toolchains [1] are often used for building the kernel, but they
do not provide libc.Now, we can handle this cleanly because the compiler capability is
evaluated at the Kconfig time. If $(CC) cannot link standalone programs,
the relevant options are hidden by 'depends on CC_CAN_LINK'.The implementation just mimics scripts/Makefile.host
The userspace programs are compiled with the same flags as the host
programs. In addition, it uses -m32 or -m64 if it is found in
$(KBUILD_CFLAGS).This new syntax has two usecases.
- Sample programs
Several userspace programs under samples/ include UAPI headers
installed in usr/include. Most of them were previously built for
the host architecture just to use the 'hostprogs' syntax.However, 'make headers' always works for the target architecture.
This caused the arch mismatch in cross-compiling. To fix this
distortion, sample code should be built for the target architecture.- Bpfilter
net/bpfilter/Makefile compiles bpfilter_umh as the user mode helper,
and embeds it into the kernel. Currently, it overrides HOSTCC with
CC to use the 'hostprogs' syntax. This hack should go away.[1]: https://mirrors.edge.kernel.org/pub/tools/crosstool/
Signed-off-by: Masahiro Yamada
Acked-by: Sam Ravnborg
08 Apr, 2020
2 commits
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Kbuild supports not only obj-y but also lib-y to list objects linked to
vmlinux.The difference between them is that all the objects from obj-y are
forcibly linked to vmlinux, whereas the objects from lib-y are linked
as needed; if there is no user of a lib-y object, it is not linked.lib-y is intended to list utility functions that may be called from all
over the place (and may be unused at all), but it is a problem for
EXPORT_SYMBOL(). Even if there is no call-site in the vmlinux, we need
to keep exported symbols for the use from loadable modules.Commit 7f2084fa55e6 ("[kbuild] handle exports in lib-y objects reliably")
worked around it by linking a dummy object, lib-ksyms.o, which contains
references to all the symbols exported from lib.a in that directory.
It uses the linker script command, EXTERN. Unfortunately, the meaning of
EXTERN of ld.lld is different from that of ld.bfd. Therefore, this does
not work with LD=ld.lld (CBL issue #515).Anyway, the build rule of lib-ksyms.o is somewhat tricky. So, I want to
get rid of it.At first, I was thinking of accumulating lib-y objects into obj-y
(or even replacing lib-y with obj-y entirely), but the lib-y syntax
is used beyond the ordinary use in lib/ and arch/*/lib/.Examples:
- drivers/firmware/efi/libstub/Makefile builds lib.a, which is linked
into vmlinux in the own way (arm64), or linked to the decompressor
(arm, x86).- arch/alpha/lib/Makefile builds lib.a which is linked not only to
vmlinux, but also to bootloaders in arch/alpha/boot/Makefile.- arch/xtensa/boot/lib/Makefile builds lib.a for use from
arch/xtensa/boot/boot-redboot/Makefile.One more thing, adding everything to obj-y would increase the vmlinux
size of allnoconfig (or tinyconfig).For less impact, I tweaked the destination of lib.a at the top Makefile;
when CONFIG_MODULES=y, lib.a goes to KBUILD_VMLINUX_OBJS, which is
forcibly linked to vmlinux, otherwise lib.a goes to KBUILD_VMLINUX_LIBS
as before.The size impact for normal usecases is quite small since at lease one
symbol in every lib-y object is eventually called by someone. In case
you are intrested, here are the figures.x86_64_defconfig:
text data bss dec hex filename
19566602 5422072 1589328 26578002 1958c52 vmlinux.before
19566932 5422104 1589328 26578364 1958dbc vmlinux.afterThe case with the biggest impact is allnoconfig + CONFIG_MODULES=y.
ARCH=x86 allnoconfig + CONFIG_MODULES=y:
text data bss dec hex filename
1175162 254740 1220608 2650510 28718e vmlinux.before
1177974 254836 1220608 2653418 287cea vmlinux.afterHopefully this is still not a big deal. The per-file trimming with the
static library is not so effective after all.If fine-grained optimization is desired, some architectures support
CONFIG_LD_DEAD_CODE_DATA_ELIMINATION, which trims dead code per-symbol
basis. When LTO is supported in mainline, even better optimization will
be possible.Link: https://github.com/ClangBuiltLinux/linux/issues/515
Signed-off-by: Masahiro Yamada
Reported-by: kbuild test robot
Reviewed-by: Nick Desaulniers -
Nobody was opposed to raising minimum GCC version to 4.8 [1]
So, we will drop GCC = 4.8.This commit drops the plugin support for GCC
Acked-by: Kees Cook
04 Feb, 2020
1 commit
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In old days, the "host-progs" syntax was used for specifying host
programs. It was renamed to the current "hostprogs-y" in 2004.It is typically useful in scripts/Makefile because it allows Kbuild to
selectively compile host programs based on the kernel configuration.This commit renames like follows:
always -> always-y
hostprogs-y -> hostprogsSo, scripts/Makefile will look like this:
always-$(CONFIG_BUILD_BIN2C) += ...
always-$(CONFIG_KALLSYMS) += ...
...
hostprogs := $(always-y) $(always-m)I think this makes more sense because a host program is always a host
program, irrespective of the kernel configuration. We want to specify
which ones to compile by CONFIG options, so always-y will be handier.The "always", "hostprogs-y", "hostprogs-m" will be kept for backward
compatibility for a while.Signed-off-by: Masahiro Yamada
07 Jan, 2020
2 commits
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The built-in.a in a sub-directory is created by descending into that
directory. It does not depend on the other sub-directories. Loosen
the dependency.Signed-off-by: Masahiro Yamada
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Both 'obj-y += foo/' and 'obj-m += foo/' request Kbuild to visit the
sub-directory foo/, but the difference is that only the former combines
foo/built-in.a into the built-in.a of the current directory because
everything in sub-directories visited by obj-m is supposed to be modular.So, it makes sense to create built-in.a only if that sub-directory is
reachable by the chain of obj-y. Otherwise, built-in.a will not be
linked into vmlinux anyway. For the same reason, it is pointless to
compile obj-y objects in the directory visited by obj-m.Signed-off-by: Masahiro Yamada
14 Nov, 2019
1 commit
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There are both positive and negative options about this feature.
At first, I thought it was a good idea, but actually Linus stated a
negative opinion (https://lkml.org/lkml/2019/9/29/227). I admit it
is ugly and annoying.The baseline I'd like to keep is the compile-test of uapi headers.
(Otherwise, kernel developers have no way to ensure the correctness
of the exported headers.)I will maintain a small build rule in usr/include/Makefile.
Remove the other header test functionality.Signed-off-by: Masahiro Yamada
11 Nov, 2019
2 commits
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Since commit 394053f4a4b3 ("kbuild: make single targets work more
correctly"), building single targets is really slow.Speed it up by not descending into unrelated directories.
Signed-off-by: Masahiro Yamada
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KBUILD_SINGLE_TARGETS does not need to contain all the targets.
Change it to keep track the targets only from the current directory
and its subdirectories.Signed-off-by: Masahiro Yamada
01 Oct, 2019
1 commit
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Commit 40df759e2b9e ("kbuild: Fix build with binutils
Reviewed-by: Nick Desaulniers
Tested-by: Nick Desaulniers
06 Sep, 2019
1 commit
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KBUILD_ENABLE_EXTRA_GCC_CHECKS started as a switch to add extra warning
options for GCC, but now it is a historical misnomer since we use it
also for Clang, DTC, and even kernel-doc.Rename it to more sensible, shorter KBUILD_EXTRA_WARN.
For the backward compatibility, KBUILD_ENABLE_EXTRA_GCC_CHECKS is still
supported (but not advertised in the documentation).I also fixed up 'make help', and updated the documentation.
Signed-off-by: Masahiro Yamada
Reviewed-by: Nathan Chancellor
Reviewed-by: Nick Desaulniers
Reviewed-by: Sedat Dilek
22 Aug, 2019
2 commits
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Makefile.lib is included by Makefile.modfinal as well as Makefile.build.
Move modkern_cflags to Makefile.lib in order to simplify cmd_cc_o_c
in Makefile.modfinal. Move modkern_cflags as well for consistency.Signed-off-by: Masahiro Yamada
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Add CONFIG_ASM_MODVERSIONS. This allows to remove one if-conditional
nesting in scripts/Makefile.build.scripts/Makefile.build is run every time Kbuild descends into a
sub-directory. So, I want to avoid $(wildcard ...) evaluation
where possible although computing $(wildcard ...) is so cheap that
it may not make measurable performance difference.Signed-off-by: Masahiro Yamada
Acked-by: Geert Uytterhoeven
21 Aug, 2019
1 commit
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Currently, the single target build directly descends into the directory
of the target. For example,$ make foo/bar/baz.o
... directly descends into foo/bar/.
On the other hand, the normal build usually descends one directory at
a time, i.e. descends into foo/, and then foo/bar/.This difference causes some problems.
[1] miss subdir-asflags-y, subdir-ccflags-y in upper Makefiles
The options in subdir-{as,cc}flags-y take effect in the current
and its sub-directories. In other words, they are inherited
downward. In the example above, the single target will miss
subdir-{as,cc}flags-y if they are defined in foo/Makefile.[2] could be built in a different directory
As Documentation/kbuild/modules.rst section 4.3 says, Kbuild can
handle files that are spread over several sub-directories.The build rule of foo/bar/baz.o may not necessarily be specified in
foo/bar/Makefile. It might be specifies in foo/Makefile as follows:[foo/Makefile]
obj-y := bar/baz.oThis often happens when a module is so big that its source files
are divided into sub-directories.In this case, there is no Makefile in the foo/bar/ directory, yet
the single target descends into foo/bar/, then fails due to the
missing Makefile. You can still do 'make foo/bar/' for partial
building, but cannot do 'make foo/bar/baz.s'. I believe the single
target '%.s' is a useful feature for inspecting the compiler output.Some modules work around this issue by putting an empty Makefile
in every sub-directory.This commit fixes those problems by making the single target build
descend in the same way as the normal build does.Another change is the single target build will observe the CONFIG
options. Previously, it allowed users to build the foo.o even when
the corresponding CONFIG_FOO is disabled:obj-$(CONFIG_FOO) += foo.o
In the new behavior, the single target build will just fail and show
"No rule to make target ..." (or "Nothing to be done for ..." if the
stale object already exists, but cannot be updated).The disadvantage of this commit is the build speed. Now that the
single target build visits every directory and parses lots of
Makefiles, it is slower than before. (But, I hope it will not be
too slow.)Signed-off-by: Masahiro Yamada
15 Aug, 2019
2 commits
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For the single target building %.symtypes from %.S, $(a_flags) is
expanded into the _KERNEL flags even if the object is a part of a
module.$(real-obj-m:.o=.symtypes): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
... would fix the issue, but it is not nice to duplicate similar code
for every suffix.Implement modkern_aflags in the same way as modkern_cflags.
Signed-off-by: Masahiro Yamada
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Make it even shorter.
Signed-off-by: Masahiro Yamada
14 Aug, 2019
1 commit
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$(basename ...) trims the last suffix. Using it is more intuitive in
my opinion.This pattern rule makes %.asn1.c and %.asn1.h at the same time.
Previously, the short log showed only either of them, depending on
the target file in question.To clarify that two files are being generated by the single recipe,
I changed the log as follows:Before:
ASN.1 crypto/asymmetric_keys/x509.asn1.c
After:
ASN.1 crypto/asymmetric_keys/x509.asn1.[ch]
Signed-off-by: Masahiro Yamada
10 Aug, 2019
3 commits
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Since commit ff9b45c55b26 ("kbuild: modpost: read modules.order instead
of $(MODVERDIR)/*.mod"), a module is no longer built in the following
pattern:[Makefile]
subdir-y := some-module[some-module/Makefile]
obj-m := some-module.oYou cannot write Makefile this way in upstream because modules.order is
not correctly generated. subdir-y is used to descend to a sub-directory
that builds tools, device trees, etc.For external modules, the modules order does not matter. So, the
Makefile above was known to work.I believe the Makefile should be re-written as follows:
[Makefile]
obj-m := some-module/[some-module/Makefile]
obj-m := some-module.oHowever, people will have no idea if their Makefile suddenly stops
working. In fact, I received questions from multiple people.Show a warning for a while if obj-m is specified in a Makefile visited
by subdir-y or subdir-m.I touched the %/ rule to avoid false-positive warnings for the single
target.Cc: Jan Kiszka
Cc: Tom Stonecypher
Signed-off-by: Masahiro Yamada
Tested-by: Jan Kiszka -
The modules.order files in directories visited by the chain of obj-y
or obj-m are merged to the upper-level ones, and become parts of the
top-level modules.order. On the other hand, there is no need to
generate modules.order in directories visited by subdir-y or subdir-m
since they would become orphan anyway.Signed-off-by: Masahiro Yamada
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The current implementation of need-builtin is false-positive,
for example, in the following Makefile:obj-m := foo/
obj-y := foo/bar/..., where foo/built-in.a is not required.
Signed-off-by: Masahiro Yamada
18 Jul, 2019
3 commits
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Currently, *.mod is created as a side-effect of obj-m.
Split out *.mod as a dedicated build rule, which allows to unify
the %.c -> %.o rule, and remove the single-used-m rule.This also makes the incremental build of allmodconfig faster because
it saves $(NM) invocation when there is no change in the module.Signed-off-by: Masahiro Yamada
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The current format of *.mod is like this:
line 1: directory path to the .ko file
line 2: a list of objects linked into this module
line 3: unresolved symbols (only when CONFIG_TRIM_UNUSED_KSYMS=y)Now that *.mod and *.ko are created in the same directory, the line 1
provides no valuable information. It can be derived by replacing the
extension .mod with .ko. In fact, nobody uses the first line any more.Cut down the first line.
Signed-off-by: Masahiro Yamada
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While descending directories, Kbuild produces objects for modules,
but do not link final *.ko files; it is done in the modpost.To keep track of modules, Kbuild creates a *.mod file in $(MODVERDIR)
for every module it is building. Some post-processing steps read the
necessary information from *.mod files. This avoids descending into
directories again. This mechanism was introduced in 2003 or so.Later, commit 551559e13af1 ("kbuild: implement modules.order") added
modules.order. So, we can simply read it out to know all the modules
with directory paths. This is easier than parsing the first line of
*.mod files.$(MODVERDIR) has a flat directory structure, that is, *.mod files
are named only with base names. This is based on the assumption that
the module name is unique across the tree. This assumption is really
fragile.Stephen Rothwell reported a race condition caused by a module name
conflict:https://lkml.org/lkml/2019/5/13/991
In parallel building, two different threads could write to the same
$(MODVERDIR)/*.mod simultaneously.Non-unique module names are the source of all kind of troubles, hence
commit 3a48a91901c5 ("kbuild: check uniqueness of module names")
introduced a new checker script.However, it is still fragile in the build system point of view because
this race happens before scripts/modules-check.sh is invoked. If it
happens again, the modpost will emit unclear error messages.To fix this issue completely, create *.mod with full directory path
so that two threads never attempt to write to the same file.$(MODVERDIR) is no longer needed.
Since modules with directory paths are listed in modules.order, Kbuild
is still able to find *.mod files without additional descending.I also killed cmd_secanalysis; scripts/mod/sumversion.c computes MD4 hash
for modules with MODULE_VERSION(). When CONFIG_DEBUG_SECTION_MISMATCH=y,
it occurs not only in the modpost stage, but also during directory
descending, where sumversion.c may parse stale *.mod files. It would emit
'No such file or directory' warning when an object consisting a module is
renamed, or when a single-obj module is turned into a multi-obj module or
vice versa.Signed-off-by: Masahiro Yamada
Acked-by: Nicolas Pitre
17 Jul, 2019
4 commits
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Currently, only the top-level modules.order drops duplicated entries.
The modules.order files in sub-directories potentially contain
duplication. To list out the paths of all modules, I want to use
modules.order instead of parsing *.mod files in $(MODVERDIR).To achieve this, I want to rip off duplication from modules.order
of external modules too.Signed-off-by: Masahiro Yamada
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Removing the 'kernel/' prefix will make our life easier because we can
simply do 'cat modules.order' to get all built modules with full paths.Currently, we parse the first line of '*.mod' files in $(MODVERDIR).
Since we have duplicated functionality here, I plan to remove MODVERDIR
entirely.In fact, modules.order is generated also for external modules in a
broken format. It adds the 'kernel/' prefix to the absolute path of
the module, like this:kernel//path/to/your/external/module/foo.ko
This is fine for now since modules.order is not used for external
modules. However, I want to sanitize the format everywhere towards
the goal of removing MODVERDIR.We cannot change the format of installed module.{order,builtin}.
So, 'make modules_install' will add the 'kernel/' prefix while copying
them to $(MODLIB)/.Signed-off-by: Masahiro Yamada
-
Currently, $(objtree)/modules.order is touched in two places.
In the 'prepare0' rule, scripts/Makefile.build creates an empty
modules.order while processing 'obj=.'In the 'modules' rule, the top-level Makefile overwrites it with
the correct list of modules.While this might be a good side-effect that modules.order is made
empty every time (probably this is not intended functionality),
I personally do not like this behavior.Create modules.order only when it is sensible to do so.
This avoids creating the following pointless files:
scripts/basic/modules.order
scripts/dtc/modules.order
scripts/gcc-plugins/modules.order
scripts/genksyms/modules.order
scripts/mod/modules.order
scripts/modules.order
scripts/selinux/genheaders/modules.order
scripts/selinux/mdp/modules.order
scripts/selinux/modules.orderGoing forward, $(objtree)/modules.order lists the modules that
was built in the last successful build.Signed-off-by: Masahiro Yamada
-
It will be useful to control the header-test by a tristate option.
If CONFIG_FOO is a tristate option, you can write like this:
header-test-$(CONFIG_FOO) += foo.h
Signed-off-by: Masahiro Yamada