Eric Lee / smarc-fsl-linux-kernel

09 Jun, 2011

4 commits

  • 626a96db1   spi/ep93xx: add DMA support ... Browse Code »

    This patch adds DMA support for the EP93xx SPI driver. By default the DMA is
    not enabled but it can be enabled by setting ep93xx_spi_info.use_dma to true
    in board configuration file.

    Note that the SPI driver still uses PIO for small transfers (
    Acked-by: H Hartley Sweeten
    Acked-by: Vinod Koul
    Signed-off-by: Grant Likely

    Mika Westerberg
     
  • 71cebd700   ep93xx: remove the old M2P DMA code ... Browse Code »

    Since we have converted all existing users of the old DMA API to use the DMA
    engine API the old code can be dropped.

    Signed-off-by: Mika Westerberg
    Acked-by: Ryan Mallon
    Acked-by: H Hartley Sweeten
    Acked-by: Vinod Koul
    Signed-off-by: Grant Likely

    Mika Westerberg
     
  • e791e3455   ep93xx: add dmaengine platform code ... Browse Code »

    Add platform support code for the new EP93xx dmaengine driver.

    Signed-off-by: Mika Westerberg
    Signed-off-by: Ryan Mallon
    Acked-by: H Hartley Sweeten
    Acked-by: Vinod Koul
    Signed-off-by: Grant Likely

    Mika Westerberg
     
  • 760ee1c4a   dmaengine: add ep93xx DMA support ... Browse Code »

    The ep93xx DMA controller has 10 independent memory to peripheral (M2P)
    channels, and 2 dedicated memory to memory (M2M) channels. M2M channels can
    also be used by SPI and IDE to perform DMA transfers to/from their memory
    mapped FIFOs.

    This driver supports both M2P and M2M channels with DMA_SLAVE, DMA_CYCLIC and
    DMA_MEMCPY (M2M only) capabilities.

    Signed-off-by: Mika Westerberg
    Signed-off-by: Ryan Mallon
    Acked-by: H Hartley Sweeten
    Acked-by: Vinod Koul
    Signed-off-by: Grant Likely

    Mika Westerberg
     

05 Jun, 2011

2 commits

04 Jun, 2011

3 commits

03 Jun, 2011

1 commit

02 Jun, 2011

1 commit

01 Jun, 2011

4 commits

31 May, 2011

7 commits

30 May, 2011

6 commits

29 May, 2011

12 commits

  • 3c5cffb66   [S390] mm: fix mmu_gather rework ... Browse Code »

    Quite a few functions that get called from the tlb gather code require that
    preemption must be disabled. So disable preemption inside of the called
    functions instead.
    The only drawback is that rcu_table_freelist_finish() doesn't get necessarily
    called on the cpu(s) that filled the free lists. So we may see a delay, until
    we finally see an rcu callback. However over time this shouldn't matter.

    So we get rid of lots of "BUG: using smp_processor_id() in preemptible"
    messages.

    Signed-off-by: Heiko Carstens

    Heiko Carstens
     
  • a43a9d93d   [S390] mm: fix storage key handling ... Browse Code »

    page_get_storage_key() and page_set_storage_key() expect a page address
    and not its page frame number. This got inconsistent with 2d42552d
    "[S390] merge page_test_dirty and page_clear_dirty".

    Result is that we read/write storage keys from random pages and do not
    have a working dirty bit tracking at all.
    E.g. SetPageUpdate() doesn't clear the dirty bit of requested pages, which
    for example ext4 doesn't like very much and panics after a while.

    Unable to handle kernel paging request at virtual user address (null)
    Oops: 0004 [#1] PREEMPT SMP DEBUG_PAGEALLOC
    Modules linked in:
    CPU: 1 Not tainted 2.6.39-07551-g139f37f-dirty #152
    Process flush-94:0 (pid: 1576, task: 000000003eb34538, ksp: 000000003c287b70)
    Krnl PSW : 0704c00180000000 0000000000316b12 (jbd2_journal_file_inode+0x10e/0x138)
    R:0 T:1 IO:1 EX:1 Key:0 M:1 W:0 P:0 AS:3 CC:0 PM:0 EA:3
    Krnl GPRS: 0000000000000000 0000000000000000 0000000000000000 0700000000000000
    0000000000316a62 000000003eb34cd0 0000000000000025 000000003c287b88
    0000000000000001 000000003c287a70 000000003f1ec678 000000003f1ec000
    0000000000000000 000000003e66ec00 0000000000316a62 000000003c287988
    Krnl Code: 0000000000316b04: f0a0000407f4 srp 4(11,%r0),2036,0
    0000000000316b0a: b9020022 ltgr %r2,%r2
    0000000000316b0e: a7740015 brc 7,316b38
    >0000000000316b12: e3d0c0000024 stg %r13,0(%r12)
    0000000000316b18: 4120c010 la %r2,16(%r12)
    0000000000316b1c: 4130d060 la %r3,96(%r13)
    0000000000316b20: e340d0600004 lg %r4,96(%r13)
    0000000000316b26: c0e50002b567 brasl %r14,36d5f4
    Call Trace:
    ([] jbd2_journal_file_inode+0x5e/0x138)
    [] mpage_da_map_and_submit+0x2e8/0x42c
    [] ext4_da_writepages+0x2da/0x504
    [] writeback_single_inode+0xf8/0x268
    [] writeback_sb_inodes+0xd2/0x18c
    [] writeback_inodes_wb+0x80/0x168
    [] wb_writeback+0x2aa/0x324
    [] wb_do_writeback+0xd2/0x274
    [] bdi_writeback_thread+0xba/0x1c4
    [] kthread+0xa6/0xb0
    [] kernel_thread_starter+0x6/0xc
    [] kernel_thread_starter+0x0/0xc
    INFO: lockdep is turned off.
    Last Breaking-Event-Address:
    [] jbd2_journal_file_inode+0x86/0x138

    Reported-by: Sebastian Ott
    Signed-off-by: Heiko Carstens

    Heiko Carstens
     
  • 5d4c47e01   x86 idle: deprecate mwait_idle() and "idle=mwait" cmdline param ... Browse Code »

    mwait_idle() is a C1-only idle loop intended to be more efficient
    than HLT on SMP hardware that supports it.

    But mwait_idle() has been replaced by the more general
    mwait_idle_with_hints(), which handles both C1 and deeper C-states.
    ACPI uses only mwait_idle_with_hints(), and never uses mwait_idle().

    Deprecate mwait_idle() and the "idle=mwait" cmdline param
    to simplify the x86 idle code.

    After this change, kernels configured with
    (!CONFIG_ACPI=n && !CONFIG_INTEL_IDLE=n) when run on hardware
    that support MWAIT will simply use HLT. If MWAIT is desired
    on those systems, cpuidle and the cpuidle drivers above
    can be used.

    cc: x86@kernel.org
    cc: stable@kernel.org # .39.x
    Signed-off-by: Len Brown

    Len Brown
     
  • cdaab4a0d   x86 idle: deprecate "no-hlt" cmdline param ... Browse Code »

    We'd rather that modern machines not check if HLT works on
    every entry into idle, for the benefit of machines that had
    marginal electricals 15-years ago. If those machines are still running
    the upstream kernel, they can use "idle=poll". The only difference
    will be that they'll now invoke HLT in machine_hlt().

    cc: x86@kernel.org # .39.x
    Signed-off-by: Len Brown

    Len Brown
     
  • 99c632214   x86 idle APM: deprecate CONFIG_APM_CPU_IDLE ... Browse Code »

    We don't want to export the pm_idle function pointer to modules.
    Currently CONFIG_APM_CPU_IDLE w/ CONFIG_APM_MODULE forces us to.

    CONFIG_APM_CPU_IDLE is of dubious value, it runs only on 32-bit
    uniprocessor laptops that are over 10 years old. It calls into
    the BIOS during idle, and is known to cause a number of machines
    to fail.

    Removing CONFIG_APM_CPU_IDLE and will allow us to stop exporting
    pm_idle. Any systems that were calling into the APM BIOS
    at run-time will simply use HLT instead.

    cc: x86@kernel.org
    cc: Jiri Kosina
    cc: stable@kernel.org # .39.x
    Signed-off-by: Len Brown

    Len Brown
     
  • 06ae40ce0   x86 idle: EXPORT_SYMBOL(default_idle, pm_idle) only when APM demands it ... Browse Code »

    In the long run, we don't want default_idle() or (pm_idle)() to
    be exported outside of process.c. Start by not exporting them
    to modules, unless the APM build demands it.

    cc: x86@kernel.org
    cc: Jiri Kosina
    Signed-off-by: Len Brown

    Len Brown
     
  • 02c68a020   x86 idle: clarify AMD erratum 400 workaround ... Browse Code »

    The workaround for AMD erratum 400 uses the term "c1e" falsely suggesting:
    1. Intel C1E is somehow involved
    2. All AMD processors with C1E are involved

    Use the string "amd_c1e" instead of simply "c1e" to clarify that
    this workaround is specific to AMD's version of C1E.
    Use the string "e400" to clarify that the workaround is specific
    to AMD processors with Erratum 400.

    This patch is text-substitution only, with no functional change.

    cc: x86@kernel.org
    Acked-by: Borislav Petkov
    Signed-off-by: Len Brown

    Len Brown
     
  • c320afe96   Blackfin: debug-mmrs: include RSI_PID[4567] MMRs ... Browse Code »

    The documentation is a little iffy as to whether these are actual MMRs,
    but reading them on the hardware works, and the previous version of this
    logic (the SDH) had PID[4567]. So add it for RSI too.

    Signed-off-by: Mike Frysinger

    Mike Frysinger
     
  • fcb243918   Blackfin: bf51x: fix up RSI_PID# MMR defines ... Browse Code »

    Looks like the copying of MMR defines from the SDH block missed updating
    the addresses of the RSI_PID# registers. So tweak them to reflect the
    actual hardware.

    Signed-off-by: Mike Frysinger

    Mike Frysinger
     
  • 61aa818f7   Blackfin: bf52x/bf54x: fix up usb MMR defines ... Browse Code »

    The bf52x/bf54x have the incorrect addresses for USB_EP_NI7_RXINTERVAL
    and USB_EP_NI7_TXCOUNT, so adjust those.

    Further, the bf54x header puts the USB defines in the wrong place, so
    shuffle them back to the right grouping.

    Signed-off-by: Mike Frysinger

    Mike Frysinger
     
  • d09fb6020   Blackfin: debug-mmrs: fix typos with gptimers/mdma/ppi ... Browse Code »

    This code was mostly developed against a BF54x, so some BF537-specific
    issues were missed.

    The PPI block starts at PPI_CONTROL, not PPI_STATUS (which is the reverse
    of the EPPI block).

    The MDMA block starts at MDMA_NEXT_DESC_PTR, not MDMA_CONFIG. Seems the
    sim does not catch misreads here so that'll need to get fixed.

    The gptimer block is mostly 32bit regs, not 16bit. Use the gptimer struct
    to figure that out rather than hardcoding it locally.

    Signed-off-by: Mike Frysinger

    Mike Frysinger
     
  • a4ffd9569   Blackfin: gptimers: add structure for hardware register layout ... Browse Code »

    Signed-off-by: Mike Frysinger

    Mike Frysinger