29 Aug, 2017
1 commit
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Add device node more property to support multiple panel.
Signed-off-by: Fugang Duan
14 Jun, 2017
1 commit
-
Driver can now work with both ID and VBUS pins or either one of
them.There can be the following 3 cases
1) Both ID and VBUS GPIOs are available:
ID = LOW -> USB_HOST active, USB inactive
ID = HIGH -> USB_HOST inactive, USB state is same as VBUS.2) Only ID GPIO is available:
ID = LOW -> USB_HOST active, USB inactive
ID = HIGH -> USB_HOST inactive, USB active3) Only VBUS GPIO is available:
VBUS = LOW -> USB_HOST inactive, USB inactive
VBUS = HIGH -> USB_HOST inactive, USB activeSigned-off-by: Roger Quadros
Reviewed-by: Peter Chen
Signed-off-by: Chanwoo Choi
(cherry picked from commit 541332a13b1ded42097ba96c52c7bc70931e528c)
09 Jun, 2017
9 commits
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Add i.MX7ULP binding doc. Note i.MX7ULP PIN_FUNC_ID consists of 4
integers as it shares one mux and config register as follows:Also fix the copyright.
Signed-off-by: Dong Aisheng
-
Add I2S XTOR machine driver.
Signed-off-by: Shengjiu Wang
Signed-off-by: Viorel Suman -
Add rpmsg-keys driver on i.mx7ulp-evk board since vol+/vol- keys
are connected on m4 side and have to get the status of keys by
rpmsg.Signed-off-by: Robin Gong
[Irina: updated for 4.9 APIs]
Signed-off-by: Irina Tirdea -
Signed-off-by: Adriana Reus
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Add binding doc for tpm pwm module.
Signed-off-by: Bai Ping
-
Some i.MX SoCs lpuart has ipg_clk and per_clk, ipg_clk for bus and register
accessing, per_clk is lpuart module clock. Add per_clk support in
driver.Signed-off-by: Fugang Duan
-
EDMA controller will loss power on i.MX7ULP VLLS mode, then registers
are set to HW reset default value that cause EDMA cannot work after
system wake up. So the patch is to restore eDMA registers status after
system exit from VLLS mode.Signed-off-by: Fugang Duan
(cherry picked from commit:bc15f814383d)Conflicts:
drivers/dma/fsl-edma.c -
add focaltech touch screen support
Signed-off-by: Gao Pan
(cherry-pick from 595cefbee5586e77ceb9ad900c256177a98367c7) -
In defalut, most of i.MX boards share one MII bus in boards design to reduce
pins utilize, but others each MAC use their exclusive MII bus. To solve the
problem, user can select to define the mii-exclusive property in board dts file.The patch also update binding doc.
Signed-off-by: Fugang Duan
08 Jun, 2017
12 commits
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- move imx_rpmsg from arch/arm/ to drivers/rpmsg.
- use the new MU generic APIs in the rpmsg implementation.
- Validated the pingpong test on both imx6sx and imx7d sdb boards.Signed-off-by: Richard Zhu
-
The LCDIF driver fails at boot time because it cannot read display timings
from device tree. This is a fake error because the LCDIF DT node contains a
display device property which leads to the display driver that also provides
the timings.This fake error case has been introduced by
commit 5443a75ed038 ("MLK-14283: dts: fix DE polarity for lcdif") and
commit 56412d6a83d8 ("MLK-13996: lcdif: Use DE polarity specified in DTS")
which fixed DE polarity panel differences for different boards.This patch adds support for choosing a particular video mode from the ones
provided by the display driver, thus also fixing the DE polarity issue
initially fixed by the above mentioned 2 patches.Signed-off-by: Cristina Ciocan
-
The GPC controller driver is handling two sections: interrupts and PGC
(Power Gate Controller). The interrupts are handled in imx_gpcv2_init
function, and the PGC is handled in imx_gpcv2_probe function.
In kernel 4.9, the driver is probed by it's compatible entry in:
OF_DECLARE_2(irqchip, imx_gpcv2, "fsl,imx7d-gpc", imx_gpcv2_init);Because the driver is already probed, imx_gpcv2_probe function is not
called, since it is registered with the same compatible name.
In order to separate the interrupts from PGC, this patch moves the
regulator entrys in DTS to a new node: pgc. And, assign the probe
function to this new node.
Also, added DeviceTree documentation about the new added node. Since GPC
(the block containing the PGC) didn't have any documentation, documented
GPC too.Signed-off-by: Robert Chiras
-
Add machine driver, which is using the dummy codec.
Signed-off-by: Shengjiu Wang
Acked-by: Robin Gong -
Add the cpu dai driver, as the rpmsg_send api can't be used in
atomic context, so using the workqueue instead of calling
rpmsg_send() directly.
The detail communication stack is defined in header file.Signed-off-by: Shengjiu Wang
Acked-by: Robin Gong -
imx7ulp non core register mapping is similar with imx7d, and the
initialization is the same, but lacks of USB charger detection support.Signed-off-by: Peter Chen
-
At imx7ulp, the USB related analog register is located in PHY register
region too, so we need to control PLL at PHY driver directly.Signed-off-by: Peter Chen
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Add devicetree bindings for mxc ion
Signed-off-by: Song Bing
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Add a binding document for lpi2c driver.
Signed-off-by: Gao Pan
Signed-off-by: Wolfram Sang -
Add the support for a CT36X based touchscreens using
the CT36X controller and i2c touchscreen interface.Signed-off-by: Alejandro Lozano
Signed-off-by: Juan Gutierrez
Signed-off-by: Alejandro Sierra -
After MX6ULL DCP issue is fixed in commit 7a1cc1f, it introduces a new issue,
MX6SL will meet issue as no dcp clock is defined when initializing:
[ 3.061344] mxs-dcp 20fc000.dcp: can't identify DCP clk: -2On mx6sl, dcp clock is always on, so the patch use dummy as dcp clock directly.
Signed-off-by: Quan Zhang
-
In order to pass the pcie gen2 compliance tests on imx6qp
sd revb board, add one standalone imx6qp sd ldo pcie dtb
- disalbe fec/sata, because that the fec/sata can't work
when pll6 is in bypass mode.
NOTE: Bypass mode of pll6 is mandatory required when
external oscillator is used as pcie ref clk.Signed-off-by: Richard Zhu
23 Feb, 2017
17 commits
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Document the gpmi-nand compatibility for i.MX6ULL
Signed-off-by: Han Xu
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document the new option for legacy bch geometry support.
Conflicts:
Documentation/devicetree/bindings/mtd/gpmi-nand.txtSigned-off-by: Han Xu
(cherry picked from commit c1c24ecd24cb808e825eb13a3e3d016c283322cc) -
With igore pm notify feature, MMC core will not re-detect card
after system suspend/resume. This is needed for some special cards
like Broadcom WiFi which can't work propertly on card re-detect
after system resume.Signed-off-by: Dong Aisheng
(cherry picked from commit 3a4a074d2ead8044afe42cd0d060fe25564b274c) -
When enable WIFi and connected with AP, the system is unable to suspend.
root@imx6qdlsolo:~# echo standby > /sys/power/state
PM: Syncing filesystems ... done.
Freezing user space processes ... (elapsed 0.001 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
dhdsdio_isr: Enter
dhdsdio_isr: Enter
dhdsdio_isr: disable SDIO interrupts
Calling dhdsdio_dpc() from dhdsdio_isr
dhdsdio_dpc: Enter
dhdsdio_bussleep: request WAKE (currently SLEEP)(Keypress still response here.... )
It's caused by Broadcom WiFi driver will keep handling SDIO irq even after
the driver is already suspended.
This weird behavior will block the MMC host suspend during its irq
synchronize operation in free_irq(), then the system suspend is blocked
too and hanged.Add SDHCI_QUIRK2_SDIO_IRQ_THREAD for BCM WiFi to use kernel thread
to process sdio interrupts which won't block system suspend and process
freeze operation.Signed-off-by: Dong Aisheng
-
bcmdhd can't support removing host during suspend and
driver crash when detect card after resume due to no response
to CMD7.
It looks bcmdhd has a special requirement to enumerate card
by itself which is incompatible with current MMC core.
So implement post-cd feature to allow driver to detect card
as it wants, then we add back non-removable capability
to avoid MMC core to redetect card after resume.root@imx6qdlsolo:~# echo standby > /sys/power/state
PM: Syncing filesystems ... done.
PM: Preparing system for standby sleep
Freezing user space processes ... (elapsed 0.001 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
PM: Entering standby sleep
evbug: Event. Dev: input3, Type: 0, Code: 0, Value: 1
evbug: Event. Dev: input2, Type: 0, Code: 0, Value: 1
PM: suspend of devices complete after 652.363 msecs
PM: suspend devices took 0.660 seconds
PM: late suspend of devices complete after 1.148 msecs
PM: noirq suspend of devices complete after 1.043 msecs
Disabling non-boot CPUs ...
CPU1: shutdown
Enabling non-boot CPUs ...
CPU1 is up
PM: noirq resume of devices complete after 0.534 msecs
PM: early resume of devices complete after 0.553 msecs
evbug: Event. Dev: input2, Type: 1, Code: 116, Value: 1
evbug: Event. Dev: input2, Type: 0, Code: 0, Value: 0
evbug: Event. Dev: input2, Type: 1, Code: 116, Value: 0
evbug: Event. Dev: input2, Type: 0, Code: 0, Value: 0
mmc1: error -110 during resume (card was removed?)
PM: resume of devices complete after 605.525 msecs
PM: resume devices took 0.610 seconds
PM: Finishing wakeup.
Restarting tasks ... done.
WARNING: driver bcmsdh_sdmmc did not remove its interrupt handler!
root@imx6qdlsolo:~# Unable to handle kernel NULL pointer dereference at virtual address 0000022c
pgd = 80004000
[0000022c] *pgd=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP ARM
Modules linked in: bcmdhd evbug ov5647_camera_mipi mxc_mipi_csi mx6s_capture
CPU: 1 PID: 780 Comm: kworker/u4:4 Not tainted 4.1.15-01434-g70f4b36 #1310
Hardware name: Freescale i.MX7 Dual (Device Tree)
Workqueue: kmmcd mmc_rescan
task: a974af80 ti: a846e000 task.ti: a846e000
PC is at _raw_spin_lock_irqsave+0x1c/0x5c
LR is at get_parent_ip+0x10/0x2c
pc : [] lr : [] psr: 60050093
sp : a846fc20 ip : 0001001f fp : a800b000
r10: 00000000 r9 : 00000001 r8 : 0000022c
r7 : 00000002 r6 : 0000022c r5 : a0050013 r4 : 0000022c
r3 : a974af80 r2 : 00000001 r1 : a846fc44 r0 : 00000000
Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: a951406a DAC: 00000015
Process kworker/u4:4 (pid: 780, stack limit = 0xa846e210)
Stack: (0xa846fc20 to 0xa8470000)
fc20: 00000000 a846fc50 a846fc44 80061808 00000000 000001dc 00000000 805037fc
fc40: 8d89d5ec 00000000 a974af80 80053e88 00000000 00000000 ab7293c0 00000000
fc60: 7f09c828 000000c9 7f09c828 a916a804 00000001 0001001f a800b000 7f0698a4
fc80: a974afc8 00000001 00000000 00000000 00012ebc a974af80 00000001 80ad46c0
fca0: a974af80 00000000 a8eeccc0 00000001 0001001f a846fd04 00000000 7f099440
fcc0: a800b000 7f0699c4 a846fcdf 00000000 00000001 7f068834 a937c900 0105c688
fce0: a846fd04 a8e20000 00000000 00000001 00000000 7f071f08 a846fd04 a80a0000
fd00: ffffffff 00000000 ffffffff a8e20000 a8e20000 00000000 7f099440 00000000
fd20: 00000000 7f099440 a800b000 7f072f4c a974af80 00000000 00000000 80778564
fd40: a846fd54 a9346550 80330028 00000001 a846e000 a8e20000 7f099440 00000000
fd60: 18005000 a8eeccc0 00000000 7f099440 a800b000 7f073744 a846fd8c 80052130
fd80: a9273898 00000000 a800b000 a8e20000 7f099440 00000001 a8eec200 a9270000
fda0: 00000000 7f099440 a800b000 7f07cd3c 80b81100 8040003f a800b000 00000000
fdc0: 00000000 a8e20000 7f099440 a9270000 a9273000 a9270000 00000000 7f099440
fde0: a800b000 7f02df4c 00000001 a8e20000 7f099440 a8eec200 00000000 a916e008
fe00: 00000000 a90bfb00 a800b000 7f074cbc a9270000 7f099440 a8e20000 00000000
fe20: a8f81610 7f0765ec 7f0765b0 a8eeccc0 a855df40 7f069310 a916a800 a8eec200
fe40: 7f09b414 7f06a950 7f06a908 a8f81608 a8f81600 8050e8b8 a8f81608 7f09b414
fe60: 80b22c70 80379744 a974af80 a8f8163c a8f81608 803797d4 00000005 a81ce930
fe80: a8f81608 8037923c a8f81608 a8f81608 80b93cf4 80376504 a846fea0 800e0e3c
fea0: 00000000 00000000 a8f81608 000000bd a833f000 00000000 00000000 8050ed04
fec0: 00000001 8050dd8c 400f8c0f a833f000 ffffff92 a833f000 a81ce600 8050de30
fee0: 8050ddbc a833f240 a833f1dc 80506048 a90bfb00 a833f240 a800b000 a81ce600
ff00: 00000000 800462f0 a81ce600 80043c94 00000000 a800b000 a90bfb18 a800b014
ff20: a846e000 00000088 80b39379 a90bfb00 a800b000 8004654c 80ad4100 a800b164
ff40: a90bfb00 00000000 a84856c0 a90bfb00 80046500 00000000 00000000 00000000
ff60: 00000000 8004b1e8 2df9acc7 00000000 b5f3ff89 a90bfb00 00000000 00000000
ff80: a846ff80 a846ff80 00000000 00000000 a846ff90 a846ff90 a846ffac a84856c0
ffa0: 8004b10c 00000000 00000000 8000f568 00000000 00000000 00000000 00000000
ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 ecd61557 f82769f5
[] (_raw_spin_lock_irqsave) from [] (add_wait_queue+0x20/0x48)
[] (add_wait_queue) from [] (__mmc_claim_host+0x58/0x1b0)
[] (__mmc_claim_host) from [] (sdioh_request_byte+0x1cc/0x2a4 [bcmdhd])
[] (sdioh_request_byte [bcmdhd]) from [] (sdioh_cfg_write+0x20/0x28 [bcmdhd])
[] (sdioh_cfg_write [bcmdhd]) from [] (bcmsdh_cfg_write+0x90/0xdc [bcmdhd])
[] (bcmsdh_cfg_write [bcmdhd]) from [] (dhdsdio_clk_kso_enab+0x38/0x168 [bcmdhd])
[] (dhdsdio_clk_kso_enab [bcmdhd]) from [] (dhdsdio_clk_devsleep_iovar+0xf4/0x5f4 [bcmdhd])
[] (dhdsdio_clk_devsleep_iovar [bcmdhd]) from [] (dhdsdio_bussleep+0x2f8/0x4dc [bcmdhd])
[] (dhdsdio_bussleep [bcmdhd]) from [] (dhd_bus_stop+0x2e8/0x3f0 [bcmdhd])
[] (dhd_bus_stop [bcmdhd]) from [] (dhd_detach+0x2a4/0x438 [bcmdhd])
[] (dhd_detach [bcmdhd]) from [] (dhdsdio_release+0x4c/0x1dc [bcmdhd])
[] (dhdsdio_release [bcmdhd]) from [] (dhdsdio_disconnect+0x3c/0xa0 [bcmdhd])
[] (dhdsdio_disconnect [bcmdhd]) from [] (bcmsdh_remove+0x3c/0x60 [bcmdhd])
[] (bcmsdh_remove [bcmdhd]) from [] (bcmsdh_sdmmc_remove+0x48/0x60 [bcmdhd])
[] (bcmsdh_sdmmc_remove [bcmdhd]) from [] (sdio_bus_remove+0x30/0xf8)
[] (sdio_bus_remove) from [] (__device_release_driver+0x70/0xe4)
[] (__device_release_driver) from [] (device_release_driver+0x1c/0x28)
[] (device_release_driver) from [] (bus_remove_device+0xd8/0x104)
[] (bus_remove_device) from [] (device_del+0x10c/0x210)
[] (device_del) from [] (sdio_remove_func+0x1c/0x28)
[] (sdio_remove_func) from [] (mmc_sdio_remove+0x40/0x70)
[] (mmc_sdio_remove) from [] (mmc_sdio_detect+0x74/0x100)
[] (mmc_sdio_detect) from [] (mmc_rescan+0xb8/0x314)
[] (mmc_rescan) from [] (process_one_work+0x120/0x330)
[] (process_one_work) from [] (worker_thread+0x4c/0x480)
[] (worker_thread) from [] (kthread+0xdc/0xf4)
[] (kthread) from [] (ret_from_fork+0x14/0x2c)
Code: f10c0080 e3a00001 ebe359b1 f594f000 (e1943f9f)Signed-off-by: Dong Aisheng
-
caam_snvs driver involves snvs HP registers access that needs to
enable snvs clock source. The patch add the clock management.Signed-off-by: Fugang Duan
Signed-off-by: Dan Douglass -
User can specify clocks in devicetree which is used for accessing the registers
in this regmap.Signed-off-by: Dong Aisheng
(cherry picked from commit 4a89ef5b579e6fb5640df099ee13939ca6d3a325) -
Interactive governor has lived in Android sources for a very long time
and this commit is based on the code present in following branch:https://android.googlesource.com/kernel/common android-4.4
The Interactive governor is designed for latency-sensitive workloads,
such as interactive user interfaces like the mobile phones and tablets.
The interactive governor aims to be significantly more responsive to
ramp CPU quickly up when CPU-intensive activity begins.Existing governors sample CPU load at a particular rate, typically every
X ms and then update the frequency from a work-handler. This can lead
to under-powering UI threads for the period of time during which the
user begins interacting with a previously-idle system until the next
sample period happens.The 'interactive' governor uses a different approach.
A real-time thread is used for scaling up, giving the remaining tasks
the CPU performance benefit, unlike existing governors which are more
likely to schedule ramp-up work to occur after your performance starved
tasks have completed.The Android version of interactive governor also checks whether to scale
the CPU frequency up soon after coming out of idle. When the CPU comes
out of idle, the governor check if the CPU sampling is overdue or not.
If yes, it immediately starts the sampling. Otherwise, the utilization
hooks from the scheduler handle the sampling later. If the CPU is very
busy from exiting idle to when the evaluation happens, then it assumes
that the CPU is under-powered and ramps it to MAX speed.If the CPU was not sufficiently busy to immediately ramp to MAX speed,
then the governor evaluates the CPU load since the last speed
adjustment, choosing the highest value between that longer-term load or
the short-term load since idle exit to determine the CPU speed to ramp
to.Idle notifiers will be be handled later and are not included for now.
The core of this code is written and maintained (in Android
repositories) by Mike Chan and Todd Poyner over a long period of time.Vireshk has made changes to to the governor to align it with the current
practices followed with mainline governors, like using utilization hooks
from the scheduler and handling kobject (for governor's sysfs directory)
in a race free manner. And of course this included general cleanup of
the governor as well.Signed-off-by: Mike Chan
Signed-off-by: Todd Poynor
Signed-off-by: Viresh Kumar---
V1->V2:
- Changes to fix compilation issues with updated mainline
- Timer APIs got updated
- s/mod_timer_pinned/mod_timer
- s/init_timer/init_timer_pinned
- Updated prototypes of cpufreq_frequency_table_target() and
update_util_handler() -
The patch updates the document by adding more information to describe the
DT proporties used by the Freescale Quadspi driver and the childs nodes.For the child node for SPI NOR flash, we add the required property
("spi-max-frequency"), and refer to spi-nor-flash.txt for the optional
properties.Signed-off-by: Huang Shijie
(cherry picked from commit d7b296f51eb077b0c77580ad63ffd69ce722bf6c) -
We need a DT property to store the dummy cycles for DDR Quad read.
This is a common feature for the SPI NOR flash, such as Spansion and Micron
chips.Add this file to describe this specific SPI NOR flash features which will
be referred by the SPI NOR flash drivers.Signed-off-by: Huang Shijie
(cherry picked from commit dfbe3eb5c7c2c3967c0f1bf32c0279136da7bfce) -
Some registers on pfuze3000 will lost after exit from LPSR, need restore them,
otherwise system may reboot with below command after system enter LPSR one time:root@imx7d_all:~# echo enabled > /sys/class/tty/ttymxc0/power/wakeup
root@imx7d_all:~# echo mem > /sys/power/statebecause LDOGCTL not recover as 1. Add 'fsl,lpsr-mode' property to this case,
please add this property if your board support LPSR mode as imx7d-12x12-lpddr3-arm2
board.Signed-off-by: Robin Gong
-
It's pretty common that on some reference design or validation boards,
one pin could be used by two devices on board, and the pin route is
controlled by a GPIO. So to assert the pin for given device, not only
the pinmux controller in SoC needs to be set up properly but also the
GPIO needs to be pulled up/down.The patch adds support of a device tree property "pinctrl-assert-gpios"
under client device node. It plays pretty much like a board level pin
multiplexer, and steers the pin route by controlling the GPIOs. When
client device has the property represent in its node, pinctrl device
tree mapping function will firstly pull up/down the GPIOs to assert the
pins for the device at board level.[shawn.guo: cherry-pick commit e5a718edab82 from imx_3.10.y]
Signed-off-by: Shawn Guo -
Starting from IMX6, the flexcan stop mode control bits is SoC specific,
move it out of IP driver and parse it from devicetree.
It's good from maintain perspective and can avoid adding too many SoC
specifi bits in driver but with no IP changes when the IMX SoC series
keep growing.Signed-off-by: Dong Aisheng
(cherry picked from commit 97b99b59c9f09d58ea35f3c0cf58665c20f2e292)
(cherry picked from commit 6355208605715f7cb9ea8c37e29c577785f66898)Conflicts:
arch/arm/boot/dts/imx6qdl.dtsi -
If wakeup is enabled, enter stop mode, else enter disabled mode.
Self wake can only work on stop mode.
For imx6q, the stop request has to be mannually assert on
IOMUX GPR13[28:29] register, we use syscon to control that bit.Signed-off-by: Dong Aisheng
(cherry picked from commit 7f8ef8eeb2bd93d75eb4c970bcaabcfd499d348d)
(cherry picked from commit 496fef522e515488147cce3adcc7f101bb532805) -
WiFi driver could call wifi_card_detect function to re-detect card,
this is required by some special WiFi cards like broadcom WiFi.
To use this function, a new property is introduced to indicate a wifi host.Signed-off-by: Dong Aisheng
(cherry picked from commit 74e71dd0aebb9e931f02aefa3dd1990cbe642ae4)
Signed-off-by: Haibo ChenConflicts:
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt -
Forward imx_3.14.y IPU and display drivers to 4.1 kernel.
This includes IPU core driver, display driver, LDB and HDMI driver.Signed-off-by: Sandor Yu
-
cherry-pick below patch from v3.14.y:
ENGR00307635-5 ASoC: imx-wm8962: Add non-SSI cpu dai supportThe current imx-wm8962 machine driver is designed for SSI as CPU DAI only
while as its name we should make the driver more generic to any other CPU
DAI on i.MX serires -- ESAI, SAI for example.So this patch makes the driver more general so as to support those non-SSI
cases.Acked-by: Wang Shengjiu
Signed-off-by: Nicolin Chen
(cherry picked from commit b6fca438dde1b4c0bbdee31729871d601f287dc9)