25 Jul, 2017
1 commit
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When do epdc colormap test, the epdc need pxp lut function. But
if the data flow through mux0->mux1...or mux0->mux2..., the pxp
can not trigger interrupt but mux0->mux3... can. This issue only
occures on imx7d, so I set a constant data path when using lut function.Signed-off-by: Guoniu.Zhou
(cherry picked from commit 8c8fc765c34f2e6fe31646a5f216f30e3391f2e6)
14 Jul, 2017
1 commit
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PxP block on imx6sll, imx6ull is different with imx7d, the node
path_ctrl should be different. So add path_ctrl for 6sll, 6ull.Signed-off-by: Guoniu.Zhou
(cherry picked from commit a5952396dc88856d53a1fd1d150bae301c13d403)
12 Jul, 2017
2 commits
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Add pxp v3 crop feature support.
Update the pxp_dma.h file.Signed-off-by: Guoniu.Zhou
(cherry picked from commit 23da5fe99a89adde6a8943517e0d7042dad50ea3) -
coefficient setting.
Because the caller of pxp-v3 does not set the stride parameter,
this will cause pitch parameter to be zero and pxp can't work.Correct the csc1 coefficient when use pxp convert YUV to RGB format.
Signed-off-by: Guoniu.Zhou
(cherry picked from commit 3005228b17b16d1455b72c66ddf96785b42adb0a)
05 Jul, 2017
1 commit
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This patch fixes build warning that 2 variables may be used uninitialized
in the pxp_fetch_config() function in drivers/dma/pxp/pxp_dma_v3.c .The variables in_fmt and out_fmt are passed as parameters to
pxp_fetch_shift_calc() only if shift_bypass is false. This flag cannot be
false unless changed in a code block that also assigns in_fmt and out_fmt.Since the compiler cannot detect this flow, it shows a warning that in_fmt
and out_fmt are not initialized. Fix this by changing the code flow such
that in_fmt and out_fmt are sent as parameters in the same code block where
they are assigned.Signed-off-by: Cristina Ciocan
(cherry picked from commit e710b061ef292402045b30ccb56bcdcd343d43c5)
30 Jun, 2017
1 commit
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It is possible for an irq triggered by channel0 to be received later,
after clks are disabled. If that happens then clearing them by writing
to SDMA_H_INTR won't work and the system will hang processing infinite
interrupts. Actually, don't need interrupt triggered on channel0 since
it's pollling to know channel0 done rather than interrupt in current
code, just clear BD setting to disable channel0 interrupt to avoid the
above case.Reported-by: Leonard Crestez
Signed-off-by: Robin Gong
(cherry picked from commit ed3bbe18323565b0c07f836fbf53401ffa887bf2)
19 Jun, 2017
1 commit
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1. When pxp do rotation, fetch and store engine need block mode.
2. When use pxp store engine fill function, not only need config
store engine, but also need config fetch engine, otherwise, it
will not work.Signed-off-by: Guoniu.Zhou
(cherry picked from commit 87347dc507631b98d914d42de0a2783915489a2a)
09 Jun, 2017
33 commits
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After soft reset, the irq register value will be zero, so we need set it to enable
all pxp interrupts.Signed-off-by: Guoniu.Zhou
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Commit 665ced16cf044 ("MLK-10050 dma: imx-sdma: add support for sdma
memory copy") enforces maximum SDMA buffer descriptor length at 65532,
but doesn't update period_bytes_max or max_segment size in DMA drivers.Thus, resulting in the following bug:
$ arecord -Dhw:0,0 -r 192000 -f S20_3LE -c 1 -d 10 audio192k20b1c.wav
imx-sdma: SDMA channel 5: maximum period size exceeded: 65534 > 65532Signed-off-by: Daniel Baluta
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The V3 version PXP has added below new 2D features:
1. Input fetch/store blocks to accept different formats input/output.
2. Add Rotation1 block to do rotation before alpha blending.
3. Add Composite1 block to accept source from input fetch.
4. AS and PS have increased supported pixel formats.Signed-off-by: Fancy Fang
Signed-off-by: Guoniu.Zhou
(cherry picked from commit 4daef24b19890ca65135c48fc24018f64761444f) -
Based on the previously caculated adjacent list and mux
config info, the shortest path table can be derived by
distance calculation between two different 2D nodes.Signed-off-by: Fancy Fang
(cherry picked from commit c8adf0f7089d5c5e286d7ae74c138a84bed5e280) -
According to the PXP arch diagram, the V3 PXP can be
abstracted to a graph structure. There are totally
16 2D nodes in PXP and 16 2D related mux nodes:1. Using '16x16' adjacent array to record the 2D nodes
relationship and '16' size array to record the
input and output nodes for each muxe node.
2. Construct the adjacent list to store all the 2D
nodes and also config the mux info used by each
two nodes of one edge during pxp probing stage.Signed-off-by: Fancy Fang
(cherry picked from commit e8087406df2e04982fd90b4070ac68fafa4ad3d5) -
Extract the timer initialization from pxp_probe()
to a seperate function call to make probing process
more clear.Signed-off-by: Fancy Fang
(cherry picked from commit c8a127e506bca2e38fae02c03ceae4e6956d6ea3) -
Extract the attributes creation from the pxp_probe()
to a seperate function call to make the probing process
more clear.Signed-off-by: Fancy Fang
(cherry picked from commit 85ab5476bf59a407037b43419b920b681b58b52d) -
Extract the m4 related initialization code from
pxp_probe() to make the probing function more
clear.Signed-off-by: Fancy Fang
(cherry picked from commit f1bd8146332f880b75f08eab64505070069018fb) -
The PXP interrupt functions in V3 is relatively complex.
So do the interrupt initalization in a sperate function
to make the pxp_probe() more clear.Signed-off-by: Fancy Fang
(cherry picked from commit 2fa43d26f81cf0331820b41bc198adbb414c0c37) -
Remove some assignments which have no real effects for
V2 and V3 PXP drivers, since using devm_kzalloc() to
make the data to be zero.Signed-off-by: Fancy Fang
(cherry picked from commit a6d6e4d2b6b21427c529a33a7d47ddc918b19eb7) -
Some RGB formats fourcc definition are not precise
according to its original meaning. So make some
changes for them.Signed-off-by: Fancy Fang
(cherry picked from commit b0b4ad680e267bdf542d2c9a3202c0192bde9cb0) -
According to the pxp high level architecture diagram,
it is better to divide the whole big pxp module into
four sub-modules:
1. 2D operation module(legacy pxp and input fetch & store).
2. Dithering module.
3. WFE_A module.
4. WFE_B module.
This division will simplify driver implementations and
management.Signed-off-by: Fancy Fang
(cherry picked from commit 5e57840b41adb195515bd652d9624feaadf3448e) -
Abstract PS and OUT formats parsing jobs to seperate
functions 'pxp_parse_ps_fmt()' and 'pxp_parse_out_fmt()'
to make the code clean and easier to maintain.Signed-off-by: Fancy Fang
(cherry picked from commit 3e2cd1880fdf219c77f119fa5c9fb33e50e8654c) -
Add 'need_yuv_swap' field to 'pxp_proc_data' structure to
record the yuv formats which needs byte swap.Signed-off-by: Fancy Fang
(cherry picked from commit 28ce43b27faad915e93f47b438d23f4ebfe020b5) -
Use 'switch' statement to replace 'if' statement to
make logic more clear and easier to maintain.Signed-off-by: Fancy Fang
(cherry picked from commit ca1b4393b86054a81bb40ad856af9c4f166841ea) -
The multiple overlay layers are not used on pxp v2 and
v3 module, so remove this.Signed-off-by: Fancy Fang
(cherry picked from commit c4fd8b36dbf9b53079d88d55ccfedde3a444ec29) -
it's needed for pxp legacy process, so set it just after
pxp does the reset.Signed-off-by: Robby Cai
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use pxp_soft_reset() in probe and resume function because this implementation
follows the recommended flow in the IC spec.
without soft reset, when only use wfe_a process without legacy process it's
likely to meet timeout issue since. In other words, wfe_a process need the
soft reset to work properly.Signed-off-by: Robby Cai
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on imx7d and imx6ull/imx6sll, the collision detection logic is implemented
in PXP WFE (A on imx7d, or B on imx6ull/imx6sll) instead of the logic
implemented on EPDC on previous SoCs (like imx6sl/imx6dl). The driver need
read the LUT status and send this information to PXP WFE (A on imx7d, or B
on imx6ull/imx6sll) engine, so that PXP WFE engine can detect if there is
an active LUT assigned to the pixels affected by current update.
Without this patch, there could possibly be some false collision report due
to the out-of-sync. The patch intends to fix it.Signed-off-by: Robby Cai
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The cause is the legacy process involves PXP AS engine accidentally to
process data, which results to one pixel at (0,0) to be changed. This
will cause an incorrect histogram calculation.Signed-off-by: Robby Cai
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The audio driver is initialized by preparing a DMA slave channel using 0's
as parameters in sdma_prep_dma_cyclic function. This would lead to a
division by zero, since period_len is used as a divisor.
Used the code from 4.1 to fix this, where the division is made only for
non HDMI peripheral types.Signed-off-by: Robert Chiras
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The function .fsl_edma_irq_init() has been called twice in .probe(), which
cause all dma controller registered failed.Signed-off-by: Fugang Duan
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EDMA controller will loss power on i.MX7ULP VLLS mode, then registers
are set to HW reset default value that cause EDMA cannot work after
system wake up. So the patch is to restore eDMA registers status after
system exit from VLLS mode.Signed-off-by: Fugang Duan
(cherry picked from commit:bc15f814383d)Conflicts:
drivers/dma/fsl-edma.c -
Some drivers may call terminate dma channel in interrupt, thus
we'd better use dma_poo_free.(Documentation/DMA-API-HOWTO.txt)Signed-off-by: Robin Gong
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The sdmac->chn_real_count is equal to sdmac->period_len in dma cyclic
mode that is not correct, correct it to real count in current BD transfer.Signed-off-by: Fugang Duan
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Pass ->dev to dma_alloc_coherent() API.
Signed-off-by: Fugang Duan
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Remove the redundant clock operation.
Signed-off-by: Fugang Duan
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Avoid dead lock in DMA cyclic case.
Signed-off-by: Fugang Duan
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Commit:872ee3f9d4c1 introduce build error.
The patch just fix the build error.Signed-off-by: Gao Pan
(cherry picked from commit 06a01760df40fbffe37e6a053a40308240224cb2) -
Before, checking SDMA_H_C0PTR register to know whether sdma controller turned
off in DSM, if yes restore channel context back. Unfortunatly, this checking
is wrong, because SDMA_H_C0PTR has been initialized as non-zero value in
sdma_resume, which means channel context will never be restored back if mega/
fast off on i.mx6sx or i.mx7d. Using 'suspend_off' flag to keep this 'restore
needed' requirement.Signed-off-by: Robin Gong
(cherry picked from commit 565d4c45926a03029d7750a57f3e3f2404de7301)
(cherry picked from commit 70dbe82f8fb504497ab5d544ce0c30cfca15c515) -
Some driver may call dmaengine_terminate_all firstly, and then start next by
calling dmaengine_prep_* without dmaengine_slave_config. In this case sdma
transfer failed since no context loaded, take this case in this patch.Signed-off-by: Robin Gong
(cherry picked from commit 51ff948df543dc273fefeb86608e7d6d28ca8090) -
This patch cherry-pick the blow patch from v4.1.y, and resove
conflicts.commit 70805e9da3fd25eebf0e141a5cda48fba310c5f5
Author: Robin Gong
Date: Mon Aug 17 16:04:48 2015 +0800MLK-11358-3: dma: imx-sdma: add virt-dma support
Old sdma can't support multi instances, because next transfer will return
error if the last transfer not done(sdmac->status == DMA_IN_PROGRESS). virt
dma is a common framework for versus dma drivers, and it's support multi
instances, driver can dynamicly alloc description and add it to list which
will be handled in the last sdma transfer done later.Another advantage of this patch is to clean up the constrain of max bd numer:
--#define NUM_BD (int)(PAGE_SIZE / sizeof(struct sdma_buffer_descriptor))
in other words, now sdma driver can support any length data now.Meanwhile, remove sdma_load_context() in prep_* everytime, since it can do
only once in config channel.Signed-off-by: Robin Gong
Signed-off-by: Robin Gong
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emi_2_emi have to be set in memory_2_memory case, code miss during
rebase, fix up it now.Signed-off-by: Robin Gong