22 Jan, 2014
2 commits
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GPT Status register bit should be cleared by writing 1.
We do not need to read, modify, write for modifying the bits.
In Linux-3.0.35, while clearing ROV bit we inadvertently clear
other bit causing timer issues.Signed-off-by: Nitin Garg
-
The return of v2_set_next_event() will lead to an infinite loop in
tick_handle_oneshot_broadcast() - "goto again;" with imx6q WAIT mode
(to be enabled). This happens because when global event did not expire
any CPU local events, the broadcast device will be rearmed to a CPU
local next_event, which could be far away from now and result in a
max_delta_tick programming in set_next_event().Fix the problem by detecting those next events with increments larger
than 0x7fffffff, and simply return zero in that case.It leaves mx1_2_set_next_event() unchanged since only v2_set_next_event()
will be running with imx6q WAIT mode support.Thanks Russell King for helping understand the problem.
Signed-off-by: Shawn Guo
13 Dec, 2013
1 commit
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issue:
sata phy link down after suspend resume on imx6q TO1.3.
solution:
sata phy ref clock should be gated off/on in suspend/resumeSigned-off-by: Richard Zhu
06 Dec, 2013
2 commits
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This patch fix the Copyright issue introduced by commit: 2b94a4b
2b94a4b ENGR00290444: Need to update CAAM driver with SM patches from STC
The commit:2b94a4b wrongly change the Copyright:
- * Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2008, 2012-2013 Freescale Semiconductor, Inc.The correct one should be:
- * Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2008-2013 Freescale Semiconductor, Inc.Signed-off-by: Jason Liu
-
For i.MX6DL, the latest datasheet defines the min voltage of VDDARM_CAP
for 996MHz setpoint is 1.25V, adding 25mV margin, so we should set the
VDDARM_CAP's voltage to 1.275V.Signed-off-by: Anson Huang
03 Dec, 2013
16 commits
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The platform hangs if UART 1 is not used a console on MX6 SABRESD.
The issue is because the UART UFCR register is not initialized and
the driver uses values provided by the bootloader (U-Boot in this
case). This patch initializes the UFCR register and does not rely
on the default or what is configured by the bootloader.Test method on MX6 SABRESD:
1. Add 'noconsole' to the kernel command line.
2. SSH to the board and type the below from the SSH window:
echo Hello >/dev/ttymxc0
3. Platform will hang, with the patch the hang will not be seen.Signed-off-by: Mahesh Mahadevan
(cherry picked from commit e1925c5b8ca74a77322f34772f170563fee76d0d) -
This patch adds logics to report video buffer field information
via VIDIOC_DQBUF ioctrl so that the user space may rely on this
to determine how to go on to process the dqueued video buffers.
Currently, we only support two field types - V4L2_FIELD_INTERLACED
and V4L2_FIELD_NONE.Signed-off-by: Liu Ying
-
According to datasheet, VDD_CACHE_CAP must not exceed VDDARM_CAP
by more than 200mV, as all of our i.MX6Q boards' VDD_CACHE_CAP
are connected to VDDSOC_CAP, so we need to follow this rule by
increasing VDDARM_CAP's voltage when necessary.Signed-off-by: Anson Huang
-
This patch updates IPUv3 IC RGB to YUV color space conversion
matrix's parameters to align with the default VIV GPU CSC
implementation so that we may pass relevant Android CTS test
cases.Signed-off-by: Liu Ying
(cherry picked from commit 17b6dbef8eea2051a6c3819f3690c21948bd0e93) -
Some boards' irq #125 are not pending, so we need to
force irq #32 to be pending manually to ensure CCM is
in correct stat before entering low power mode. Using
irq #32 is more reliable than #125, as we can trigger
it manually. See below commit for detail of CCM LPM
issue:commit 04b5224599fef16ef3a1856dd1b3205360b772c1
Signed-off-by: Anson Huang
-
V4L2_PIX_FMT_YUYV is the original format from camera and the source format
for CSI. This format may be needed on Android to do CSC before encoding.
We can now choose V4L2_PIX_FMT_YUYV, V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_RGB565
for the v4l capture format.Signed-off-by: Robby Cai
-
The ipu task thread checks outstanding tasks to be done on waiting
event uninterruptibly on the function find_task()'s return value.
However, sleeping on waiting event uninterruptibly contributes to
system load average value. This patch changes wait_event() to
wait_event_interruptible() to avoid the load average value inflation.Signed-off-by: Liu Ying
-
Previous ptp test environment is base on IPv4, now add VLAN
(virtual local area network) support. Fix the ptp packet parse
issue to support it.PTP test on VLAN environment:
- Enable kernel config "CONFIG_FEC_1588", and rebuild
- After kernel up, dhcp require IP address for eth0
- Use vconfig to add virtual netdev eth0.n (exp: eth0.5):
vconfig add eth0 5
- Use ifconfig to config virtual netdev eth5, and config
real netdev eth0 to 0.0.0.0:
ifconfig eth0.5 192.168.0.100 netmask 255.255.255.0 up
ifconfig eth0 0.0.0.0
- If connect switch, enable switch VLAN feature and add the
related ptp device ports to VID 5.
- Last, run the IXXAT stack V1.05.03:
ptp_main_1.05.03 -d -o -m -l -w -z -i 0:eth0.5Signed-off-by: Fugang Duan
-
The previous behavior of the driver did not work properly with Qt5
QtQuick multi touch-point gestures, due to how touch-points are
reported when removing a touch-point. My interpretation of the
available documentation [1] was that the driver should report all
touch-points between SYN_REPORTs, but it is not explicitly stated so.
I've found another mail-thread [2] where the creator of the protocol
states:"The protocol defines a generic way of sending a variable amount of
contacts. The contact count is obtained by counting the number of
non-empty finger packets between SYN_REPORT events."-Henrik RydbergI think this verifies my assumption that all touch-points should be
reported between SYN_REPORTs, otherwise it can not be used to obtain
the count.[1] https://www.kernel.org/doc/Documentation/input/multi-touch-protocol.txt
[2] http://lists.x.org/archives/xorg-devel/2010-March/006466.htmlSigned-off-by: Erik Boto
Signed-off-by: Mahesh Mahadevan -
clk structure member name is defined only when CONFIG_CLK_DEBUG is enabled.
Hence need to encapsulate the code with this config.Patch received from imx community:
https://community.freescale.com/thread/308482Signed-off-by: xiongweihuang
Signed-off-by: Mahesh Mahadevan -
Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by
recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
with the memset return value. However the memset itself became broken
by that patch for misaligned pointers.This fixes the above by branching over the entry code from the
misaligned fixup code to avoid reloading the original pointer.Also, because the function entry alignment is wrong in the Thumb mode
compilation, that fixup code is moved to the end.While at it, the entry instructions are slightly reworked to help dual
issue pipelines.Signed-off-by: Nicolas Pitre
Tested-by: Alexander Holler
Signed-off-by: Russell King
(cherry picked from commit 418df63adac56841ef6b0f1fcf435bc64d4ed177) -
Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the value of
its first argument, as is usually expected from standard implementations.For instance in the following function:
void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
{
memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
waiter->magic = waiter;
INIT_LIST_HEAD(&waiter->list);
}compiled as:
800554d0 :
800554d0: e92d4008 push {r3, lr}
800554d4: e1a00001 mov r0, r1
800554d8: e3a02010 mov r2, #16 ; 0x10
800554dc: e3a01011 mov r1, #17 ; 0x11
800554e0: eb04426e bl 80165ea0
800554e4: e1a03000 mov r3, r0
800554e8: e583000c str r0, [r3, #12]
800554ec: e5830000 str r0, [r3]
800554f0: e5830004 str r0, [r3, #4]
800554f4: e8bd8008 pop {r3, pc}GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
register/memory corruptions.This patch fixes the return value of the assembly version of memset.
It adds a 'mov' instruction and merges an additional load+store into
existing load/store instructions.
For ease of review, here is a breakdown of the patch into 4 simple steps:Step 1
======
Perform the following substitutions:
ip -> r8, then
r0 -> ip,
and insert 'mov ip, r0' as the first statement of the function.
At this point, we have a memset() implementation returning the proper result,
but corrupting r8 on some paths (the ones that were using ip).Step 2
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:save r8:
- str lr, [sp, #-4]!
+ stmfd sp!, {r8, lr}and restore r8 on both exit paths:
- ldmeqfd sp!, {pc} @ Now
Reviewed-by: Nicolas Pitre
Signed-off-by: Dirk Behme
Signed-off-by: Russell King
(cherry picked from commit 455bd4c430b0c0a361f38e8658a0d6cb469942b5) -
With the new tap-out of i.MX6DQ(TO1.5) and i.MX6DL/SOLO(TO1.2), we need add
more chip revision support in order to report the chip revision correctly.Signed-off-by: Jason Liu
-
These patches come from Winston Hudson of STC and allow building CAAM
as a kernel module. His comments:
This patch enables the CAAM driver to be built as a single LKM
(Loadable Kernel Module). Individual components of the CAAM driver
may be selected from the kernel configuration options, but a
single monolithic "caam.ko" module is created. Adding or removing
individual CAAM driver components requires that the module be
recompiled, unloaded (rmmod caam.ko) then reloaded (insmod
caam.ko), before the changes take affect. The option to build CAAM
as part of the kernel is still available, but a kernel recompile
and reboot is required before the changes take affect. The patch
was created for the 3.0.x kernel.This patch also fixes an issue with the CAAM driver crashing with
a kernel "opps" during driver initialization. The problem occurs
when the CAAM RNG initialization fails and the "caam_remove()"
function called. The driver attemps to release resources that have
not been allocated. Checks have been added to ensure that resource
allocation has occurred before attempting to release those
resources.Signed-off-by Jay Monkman
-
These patches came from Steve Cornelius of STC and are to fix the RNG
instantiation problem in the CAAM driver. His comments:
Add code to enable the "caam_probe" function to detect if the RNG
has been instantiated and to skip the instantiation process if
already completed.Signed-off-by Jay Monkman
-
These patches came from Steve Cornelius of STC and are to fix SM in
CAAM driver. His comments:
Original implementation assumed that physical base of Secure
Memory (SM) region could be back-derived from the virtual
address. Since the kernel doesn't normally know anything about the
existence of SM (it is clearly not "general purpose" memory), then
the normal means of address translation would not work,
necessitating specific computation of physical addresses for SM
pages.Last spin of this driver accounted for this, but did not extract
the physical base address of SM from a property; instead, it used
a constant as a shortcut. This change restores correct use of the
device property to extract the physical base value.Signed-off-by Jay Monkman
12 Nov, 2013
1 commit
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[1] The gpmi uses the nand_command_lp to issue the commands to NAND chips.
The gpmi issues a DMA operation with gpmi_cmd_ctrl when it handles
a NAND_CMD_NONE control command. So when we read a page(NAND_CMD_READ0)
from the NAND, we may send two DMA operations back-to-back.If we do not serialize the two DMA operations, we will meet a bug when
1.1) we enable CONFIG_DMA_API_DEBUG, CONFIG_DMADEVICES_DEBUG,
and CONFIG_DEBUG_SG.1.2) Use the following commands in an UART console and a SSH console:
cmd 1: while true;do dd if=/dev/mtd0 of=/dev/null;done
cmd 1: while true;do dd if=/dev/mmcblk0 of=/dev/null;doneThe kernel log shows below:
-----------------------------------------------------------------
kernel BUG at lib/scatterlist.c:28!
Unable to handle kernel NULL pointer dereference at virtual address 00000000
.........................
[] (__bug+0x18/0x24) from [] (sg_next+0x48/0x4c)
[] (sg_next+0x48/0x4c) from [] (debug_dma_unmap_sg+0x170/0x1a4)
[] (debug_dma_unmap_sg+0x170/0x1a4) from [] (dma_unmap_sg+0x14/0x6c)
[] (dma_unmap_sg+0x14/0x6c) from [] (mxs_dma_tasklet+0x18/0x1c)
[] (mxs_dma_tasklet+0x18/0x1c) from [] (tasklet_action+0x114/0x164)
-----------------------------------------------------------------1.3) Assume the two DMA operations is X (first) and Y (second).
The root cause of the bug:
Assume process P issues DMA X, and sleep on the completion
@this->dma_done. X's tasklet callback is dma_irq_callback. It firstly
wake up the process sleeping on the completion @this->dma_done,
and then trid to unmap the scatterlist S. The waked process P will
issue Y in another ARM core. Y initializes S->sg_magic to zero
with sg_init_one(), while dma_irq_callback is unmapping S at the same
time.See the diagram:
ARM core 0 | ARM core 1
-------------------------------------------------------------
(P issues DMA X, then sleep) --> |
|
(X's tasklet wakes P) --> |
|
| |
|
(X's tasklet wakes P) --> |
|
|
Signed-off-by: Brian Norris
16 Sep, 2013
2 commits
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Minimize the VDDHIGH_IN current by
- Use 100K pullup for SD card detect, write protect and charger signals.
Use 100K internal pullup for PAD_KEY_COL7, PAD_KEY_ROW7, PAD_REF_CLK_32K,
PAD_SD2_DAT6, PAD_SD2_DAT7, PAD_ECSPI2_MISO, PAD_ECSPI2_MOSI, PAD_ECSPI2_SS0
- Some pads have external pullup resistors. When suspend, disable pull/keeper
for MX6SL_PAD_FEC_MDIO__GPIO_4_20, MX6SL_PAD_I2C1_SCL__GPIO_3_12,
MX6SL_PAD_I2C1_SDA__GPIO_3_13, MX6SL_PAD_I2C2_SCL__GPIO_3_14,
MX6SL_PAD_I2C2_SDA__GPIO_3_15
- Some function pads have external pull resistors. Disable internal pull for
MX6SL_PAD_JTAG_MOD__SJC_MOD, MX6SL_PAD_JTAG_TCK__SJC_TCKSigned-off-by: Peter Chan
-
Minimize the VDDHIGH_IN current by
- Some pads are either have external pullup or may idle at HIGH state. Enable
internal pulldown will increase leakage current. Do not enable internal
pulldown to the following pads when suspend: PAD_I2C1_SCL, PAD_I2C1_SDA,
PAD_I2C2_SCL, PAD_I2C2_SDA, PAD_SD1_CLK, PAD_SD1_CMD, PAD_SD1_DAT0,
PAD_SD1_DAT1, PAD_SD1_DAT2, PAD_SD1_DAT3, PAD_SD1_DAT4, PAD_SD1_DAT5,
PAD_SD1_DAT6, PAD_SD1_DAT7, PAD_SD2_CLK, PAD_SD2_CMD, PAD_SD2_DAT0,
PAD_SD2_DAT1, PAD_SD2_DAT2, PAD_SD2_DAT3, PAD_SD2_DAT4, PAD_SD2_DAT5,
PAD_SD3_CLK, PAD_SD3_CMD, PAD_SD3_DAT0, PAD_SD3_DAT1, PAD_SD3_DAT2,
PAD_SD3_DAT3, PAD_FEC_MDIO, PAD_ECSPI1_SS0, PAD_EPDC_PWRCTRL2, PAD_KEY_COL4,
PAD_KEY_ROW5, PAD_KEY_COL6, PAD_FEC_TX_CLK, PAD_SD2_DAT6, PAD_SD2_DAT7,
PAD_KEY_ROW7, PAD_KEY_COL7, PAD_REF_CLK_32K
- The pin configurations of SD card detect and write protect should not be
changed when suspend, remove PAD_SD2_DAT4, PAD_SD2_DAT5 and PAD_KEY_COL7 from
suspend_enter_pads[]
- LCDIF pins should be configured as GPIO when suspend, add PAD_LCD_ENABLE,
PAD_LCD_HSYNC, PAD_LCD_VSYNC, PAD_LCD_RESET, PAD_LCD_DAT6, PAD_LCD_DAT7,
PAD_LCD_DAT8, PAD_LCD_DAT9 to suspend_enter_pads[]
- PAD_WDOG_B is used as a software ON/OFF button detect on EVK. Remove
MX6SL_PAD_WDOG_B__WDOG1_WDOG_B from mx6sl_brd_pads[]
- PAD_SD1_DAT0 is used by SD1 port, remove MX6SL_PAD_SD1_DAT0__GPIO_5_11
from mx6sl_uart4_pads[]
- Configure PAD_JTAG_MOD, PAD_JTAG_TCK, PAD_JTAG_TDI, PAD_JTAG_TDO,
PAD_JTAG_TMS, PAD_JTAG_TRSTB for JTAG functionSigned-off-by: Peter Chan
13 Sep, 2013
1 commit
-
This patch enable the L2 cache I/D prefetch function on the i.MX6 family.
Based on Android test result, it has the performance improvement:Before the change:
JB4.3 RC1:
Browser Vellamo scores See The Sun Canvas: 51.16
Browser Vellamo scores Deep Sea Canvas: 65.41
Browser Vellamo scores Aquarium Canvas: 50.23After the change:
Browser Vellamo scores See The Sun Canvas: 70.28
Browser Vellamo scores Deep Sea Canvas: 78.57
Browser Vellamo scores Aquarium Canvas: 53.73Signed-off-by: Jason Liu
09 Sep, 2013
1 commit
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VDD_ARM_IN, VDD_SOC_IN and VDD_PU_IN are at minimum operating voltages of
i.MX6SL when running. Raise these power rails by 25mV for all CPU working
points to compensate the output tolerance from external regulators.Signed-off-by: Peter Chan
16 Aug, 2013
1 commit
-
When do stream on/off in pair repeatedly without close the v4l device,
the kernel dump happens:Unable to handle kernel paging request at virtual address 00200200
pgd = c0004000
[00200200] *pgd=00000000
Internal error: Oops: 805 [#1] PREEMPT
Modules linked in:
CPU: 0 Not tainted (3.0.35-06027-gbbea887-dirty #21)
PC is at camera_callback+0x15c/0x1c8
LR is at 0x200200
pc : [] lr : [] psr: 20000193
sp : c0b0fed0 ip : 00200200 fp : daf1102c
r10: daf11034 r9 : 00100100 r8 : daf11098
r7 : daf11100 r6 : daf11034 r5 : daf11000 r4 : c0b0e000
r3 : 00000000 r2 : 00000001 r1 : 00000001 r0 : daf114b8
Flags: nzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: 8cc8c059 DAC: 00000015...
Process swapper (pid: 0, stack limit = 0xc0b0e2e8)
Stack: (0xc0b0fed0 to 0xc0b10000)
fec0: c0374674 822a4000 daf11000 c0b87eb4
fee0: 00000000 00000027 c0b73904 c0b305e0 00000001 c0374090 da2bbbe0 c0b0e000
ff00: 00000000 c00acc58 00000000 c0098058 00989680 c0b305e0 c0b0e000 00000000
ff20: 00000002 00000001 c0b0e000 00000000 00000000 c00acdf8 00000000 c0b0e000
ff40: 9e4e7881 c0b305e0 c0b0e000 c00aee44 c00aed9c c0b43c6c 00000027 c00ac634
ff60: 00000270 c004257c ffffffff f2a00100 00000027 c00417cc 20000000 00000006
ff80: f40c4000 00000000 c0b0e000 c0b6a924 c0b1876c c0b18764 80004059 412fc09a
ffa0: 00000000 00000000 c0063a40 c0b0ffc0 c004f758 c0042690 80000013 ffffffff
ffc0: c004266c c004294c c0b1013c 00000000 c10960c0 c00088ec c0008334 00000000
ffe0: 00000000 c00337d4 10c53c7d c0b10060 c00337d0 80008040 00000000 00000000
[] (camera_callback+0x15c/0x1c8) from [] (csi_irq_handler+
0x7c/0x160)
[] (csi_irq_handler+0x7c/0x160) from [] (
handle_irq_event_percpu+0x50/0x19c)
[] (handle_irq_event_percpu+0x50/0x19c) from [] (
handle_irq_event+0x54/0x84)
[] (handle_irq_event+0x54/0x84) from [] (handle_fasteoi_irq
+0xa8/0x160)
[] (handle_fasteoi_irq+0xa8/0x160) from [] (
generic_handle_irq+0x2c/0x40)
[] (generic_handle_irq+0x2c/0x40) from [] (handle_IRQ
+0x30/0x84)
[] (handle_IRQ+0x30/0x84) from [] (__irq_svc+0x4c/0xa8)
[] (__irq_svc+0x4c/0xa8) from [] (default_idle+0x24/0x28)
[] (default_idle+0x24/0x28) from [] (cpu_idle+0x8c/0xc0)
[] (cpu_idle+0x8c/0xc0) from [] (start_kernel+0x294/0x2e4)
[] (start_kernel+0x294/0x2e4) from [] (0x80008040)
Code: e88c4200 e595c030 e5858030 e8881800 (e58c8000)
---[ end trace 224150c26d2bd5f7 ]---The root cause is cam->enc_counter is not re-initialized to 0 when calls
STREAMOFF ioctl, and then in DQBUF ioctl wait_event_interruptible_timeout()
sees the condition is true and access cam->done_q queue which has no strict
check and could be empty.This patch adds the re-initialization and the sanity check.
Also, add the pointer check for memcpy because the destination may be
NULL on UERSPTR mode.Signed-off-by: Robby Cai
15 Aug, 2013
1 commit
-
The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
But according to ARM PL310 errata: 752271
ID: 752271: Double linefill feature can cause data corruption
Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2
Workaround: The only workaround to this erratum is to disable the
double linefill feature. This is the default behavior.[in the commit:c483abdca0011c1342bad42f16925dd5a2c7c091]
ENGR00271977-1 imx6_defconfig: enable PL310_ERRATA_769419There is one error in the commit log, the correct PL310 version in
i.MX6DL/SOLO should be r3p2, not r3p1-50rel0.so, PL310_ERRATA_769419, will not apply to i.MX6DL/SOLO. But since we build
one image to support both i.MX6Q and i.MX6DL/SOLO, the ideal solution is to
manage this errata in dynamic way. Someone did post the patches here:
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/145593.htmlAs the discussion on the above link, Russell King, the ARM arch maintainer said:
"As I already said, there is _no_ point making the barrier conditional;
it's probably more expensive to make it conditional than just to execute
it every time. But we still might as well optimize it away if we are
running _only_ on platforms which _do_ _not_ have that errata."So, we will turn on the PL310_ERRATA_769419 on both i.MX6D/Q and i.MX6DL/SOLO.
Signed-off-by: Jason Liu
08 Aug, 2013
5 commits
-
There's an interim buffer which should only be used when PxP CSC is used.
Otherwise the video buffer gets incorrect data by copying the content of
interim buffer. The patch fixes this by moving the memcpy to the right place.Signed-off-by: Robby Cai
(cherry picked from commit 8e0b8ff485dd7cdeabc653f1e27c271ac923710e) -
One bd actually needs 4KB page size. So changed the iram_alloc()
size parameter to allocate a precise iram memory for bd.This patch also removed the extra iram pool for SDMA due to its
insufficient total size: SDMA allows around 48 channels to work
simultaneously, so it's better to allocate memory from iram pool
directly.[There will be 3KB size waste in sdma->channel_control, which is
640B but actually using 4KB due to 4KB alignment for iram pool.]Acked-by: Huang Shijie
Signed-off-by: Nicolin Chen -
This reverts commit 7b60e285b7b019185389326c2d989f5e42d9736e.
With the commit 881e21c1 and 7b60e285, the system will hang when do suspend
and resume stress test continuouly while run edpc test in the background.
Revert it now and revisit it later.Signed-off-by: Robby Cai
-
This reverts commit 881e21c1275dcc40ccd63fb4fa46b990eeb4fb00.
With the commit 881e21c1 and 7b60e285, the system will hang when do suspend
and resume stress test continuouly while run edpc test in the background.
Revert it now and revisit it later.Signed-off-by: Robby Cai
-
The transceiver TJA1041A on sabreauto RevE baseboard will
fail to transit to Normal state if EN/STBY is high by default
after board power up. So we set the EN/STBY initial state to low
first then to high to guarantee the state transition successfully.Signed-off-by: Dong Aisheng
Acked-by: Jason Liu
31 Jul, 2013
1 commit
-
CONFIG_USB_EHCI_TT_NEWSCHED introduces a new schedule method
for periodic transfer, it can cover more peridic transfers which
introduced recently years.Meanwhile, both PC and our 3.5.7 (and coming 3.10) enable it,
and have not found any issues, this commit also fixes a bug
this CR reported.Signed-off-by: Peter Chen
25 Jul, 2013
6 commits
-
CC arch/arm/mach-mx6/usb_h1.o
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
In function '_host_wakeup_enable':
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
522: warning: unused variable 'phy_reg'Signed-off-by: Peter Chen
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This patch adds a null pointer check and explicitly frees memory in the
tcrypt.c function test_ahash_speed.Signed-off-by: Winston Hudson
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At host 1 code, we should use UH1_XXXX. The wrong register
access causing a bug that the u-disk disconnion at host 1
can't be recognized after system resume.Signed-off-by: Peter Chen
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At mx6, if usb wakeup is not enabled, the PHY's power
will be off during the system suspend, so the dp/dm
will be unknown after the system resumes, it may wake up
controller at some boards since dp/dm's status satisfies
wake up condition. If the controller is waken up, the
PHCD will be cleared automatically.According to IC requirement, after PHCD is cleared, we
need to wait 1ms before clear PHY's clock gate to wait
PHY's clock stable. At above condition, the PHCD is cleared
automatically, it may less than 1ms before we clear
PHY's clock gate, then, software operation to clear PHY's
clock gate will be useless. At this case, the PHY will works
abnormal, and cause the controller hang when we write some registers
(eg, portsc).Signed-off-by: Peter Chen
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the ARM core version we are using on the i.MX6 is
r2p10, thus, we need apply this ARM errataSigned-off-by: Jason Liu
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The PL310 version we are using on the i.MX6Q/DL is r3p1-50rel0,
thus, we need enable this errata for i.MX6DQ/DL/SOLO.i.MX6SL has the PL310 version: r3p2, no need enable this errata.
Signed-off-by: Jason Liu
