Eric Lee / smarc-fsl-linux-kernel

29 Oct, 2009

2 commits

  • e0e492e99   x86: AVX instruction set decoder support ... Browse Code »

    Add Intel AVX(Advanced Vector Extensions) instruction set
    support to x86 instruction decoder. This adds insn.vex_prefix
    field for storing VEX prefixes, and introduces some original
    tags for expressing opcodes attributes.

    Signed-off-by: Masami Hiramatsu
    Cc: Steven Rostedt
    Cc: Jim Keniston
    Cc: Ananth N Mavinakayanahalli
    Cc: Christoph Hellwig
    Cc: Frank Ch. Eigler
    Cc: Frederic Weisbecker
    Cc: Jason Baron
    Cc: K.Prasad
    Cc: Peter Zijlstra
    Cc: Srikar Dronamraju
    LKML-Reference:
    Signed-off-by: Ingo Molnar

    Masami Hiramatsu
     
  • 04d46c1b1   x86: Merge INAT_REXPFX into INAT_PFX_* ... Browse Code »

    Merge INAT_REXPFX into INAT_PFX_* macro and rename it to
    INAT_PFX_REX.

    Signed-off-by: Masami Hiramatsu
    Cc: Steven Rostedt
    Cc: Jim Keniston
    Cc: Ananth N Mavinakayanahalli
    Cc: Christoph Hellwig
    Cc: Frank Ch. Eigler
    Cc: Frederic Weisbecker
    Cc: Jason Baron
    Cc: K.Prasad
    Cc: Peter Zijlstra
    Cc: Srikar Dronamraju
    LKML-Reference:
    Signed-off-by: Ingo Molnar

    Masami Hiramatsu
     

27 Aug, 2009

1 commit

  • eb13296cf   x86: Instruction decoder API ... Browse Code »

    Add x86 instruction decoder to arch-specific libraries. This decoder
    can decode x86 instructions used in kernel into prefix, opcode, modrm,
    sib, displacement and immediates. This can also show the length of
    instructions.

    This version introduces instruction attributes for decoding
    instructions.
    The instruction attribute tables are generated from the opcode map file
    (x86-opcode-map.txt) by the generator script(gen-insn-attr-x86.awk).

    Currently, the opcode maps are based on opcode maps in Intel(R) 64 and
    IA-32 Architectures Software Developers Manual Vol.2: Appendix.A,
    and consist of below two types of opcode tables.

    1-byte/2-bytes/3-bytes opcodes, which has 256 elements, are
    written as below;

    Table: table-name
    Referrer: escaped-name
    opcode: mnemonic|GrpXXX [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...]
    (or)
    opcode: escape # escaped-name
    EndTable

    Group opcodes, which has 8 elements, are written as below;

    GrpTable: GrpXXX
    reg: mnemonic [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...]
    EndTable

    These opcode maps include a few SSE and FP opcodes (for setup), because
    those opcodes are used in the kernel.

    Signed-off-by: Masami Hiramatsu
    Signed-off-by: Jim Keniston
    Acked-by: H. Peter Anvin
    Cc: Ananth N Mavinakayanahalli
    Cc: Avi Kivity
    Cc: Andi Kleen
    Cc: Christoph Hellwig
    Cc: Frank Ch. Eigler
    Cc: Ingo Molnar
    Cc: Jason Baron
    Cc: K.Prasad
    Cc: Lai Jiangshan
    Cc: Li Zefan
    Cc: Przemysław Pawełczyk
    Cc: Roland McGrath
    Cc: Sam Ravnborg
    Cc: Srikar Dronamraju
    Cc: Steven Rostedt
    Cc: Tom Zanussi
    Cc: Vegard Nossum
    LKML-Reference:
    Signed-off-by: Frederic Weisbecker

    Masami Hiramatsu