22 Nov, 2011
1 commit
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Signed-off-by: Dave Martin
Acked-by: Vinod Koul
19 Sep, 2011
2 commits
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In pl08x_free_txd(), check if pool is allocated successfully before freeing it.
Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
Untill now, sg_len greater than one is not supported. This patch adds support to
do that.Note: Still, if peripheral is flow controller, sg_len can't be greater that one.
Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul
05 Sep, 2011
1 commit
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Before converting the dma channel to our private data structure, first
check that the channel is indeed one which our driver registered. We
do this by ensuring that the underlying device is bound to our driver.This avoids potential oopses if we try to reference 'plchan->name'
against a foreign drivers dma channel.Signed-off-by: Russell King
Signed-off-by: Vinod Koul
02 Sep, 2011
1 commit
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Fixed trivial conflicts in drivers/dma/amba-pl08x.c
Signed-off-by: Vinod Koul
25 Aug, 2011
16 commits
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pl08x_prep_channel_resources() is calling kfree() directly for txd(). To
maintain consistency in code call pl08x_free_txd() instead.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
At least, on SPEAr platforms there is one peripheral, JPEG, which can be flow
controller for DMA transfer. Currently DMA controller driver didn't support
peripheral flow controller configurations.This patch adds device_fc field in struct pl08x_channel_data, which will be used
only for slave transfers and is not used in case of mem2mem transfers.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
When we have DMA transfers between peripheral and memory, then we shouldn't
reduce width of peripheral at all, as that may be a strict requirement. But we
can always reduce width of memory access, with some compromise in performance.
Thus, we must select peripheral as master and not memory.Also this rearranges code to make it shorter.
Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
Currently lli_len is aligned to min of two widths, which looks to be incorrect.
Instead it should be aligned to max of both widths.Lets say, total_size = 441 bytes
MIN: lets check if min() suits or not:
CASE 1: srcwidth = 1, dstwidth = 4
min(src, dst) = 1i.e. We program transfer size in control reg to 441.
Now, till 440 bytes everything is fine, but on the last byte DMAC can't transfer
1 byte to dst, as its width is 4.CASE 2: srcwidth = 4, dstwidth = 1
min(src, dst) = 1i.e. we program transfer size in control reg to 110 (data transferred = 110 * srcwidth).
So, here too 1 byte is left, but on the source side.MAX: Lets check if max() suits or not:
CASE 3: srcwidth = 1, dstwidth = 4
max(src, dst) = 4Aligned size is 440
i.e. We program transfer size in control reg to 440.
Now, all 440 bytes will be transferred without any issues.CASE 4: srcwidth = 4, dstwidth = 1
max(src, dst) = 4Aligned size is 440
i.e. We program transfer size in control reg to 110 (data transferred = 110 * srcwidth).
Now, also all 440 bytes will be transferred without any issues.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
Code for creating single byte llis is present at several places. Create a
routine to avoid code redundancy.Also, we don't need one lli per single byte transfer, we can have single lli to
do all single byte transfer.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
max_bytes_per_lli = bd.srcbus.buswidth * PL080_CONTROL_TRANSFER_SIZE_MASK;
This is confirmed by ARM support guys.Below is summary of mail exchange with them:
[Viresh] What is the total data to be transferred in case source and destination
bus widths are different. Suppose, source bus width is 2 bytes and destination
is 4 bytes. Now in order to transfer 80 bytes, what should be value of
TransferSize field in control reg: 40? or 20?.[David from ARM] The value that is programmed into the TransferSize field should
be the number of transfers needed to achieve the required data
transfer.So, to transfer 80 bytes, with a Source Width of 2, the TransferSize field =
should be programmed with:Total transfer size
------------------- = 40
[Viresh] Will this change if source is 4 bytes and dest is 2?
[David] Yes - the calculation then becomes:
Total transfer size
------------------- =20
Also, max_bytes_per_lli must be calculated after fixing src and dest widths not
before that. So move this code to the correct place.This patch also removes max_bytes_per_lli from earlier print message, as till
that point max_bytes_per_lli is unknown.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
Pl080 Manual says: "Bursts do not cross the 1KB address boundary"
We can program the controller to cross 1 KB boundary on a burst and controller
can take care of this boundary condition by itself.Following is the discussion with ARM Technical Support Guys (David):
[Viresh] Manual says: "Bursts do not cross the 1KB address boundary"What does that actually mean? As, Maximum size transferable with a single LLI is
4095 * 4 =16380 ~ 16KB. So, if we don't have src/dest address aligned to burst
size, we can't use this big of an LLI.[David] There is a difference between bursts describing the total data
transferred by the DMA controller and AHB bursts. Bursts described by the
programmable parameters in the PL080 have no direct connection with the bursts
that are seen on the AHB bus.The statement that "Bursts do not cross the 1KB address boundary" in the TRM is
referring to AHB bursts, where this limitation is a requirement of the AHB spec.
You can still issue bursts within the PL080 that are in excess of 1KB. The
PL080 will make sure that its bursts are broken down into legal AHB bursts which
will be formatted to ensure that no AHB burst crosses a 1KB boundary.Based on above discussion, this patch removes all code related to 1 KB boundary
as we are not required to handle this in driver.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
Currently, if error interrupt occurs, nothing is done in interrupt handler (just
clearing the interrupts). We must somehow indicate this to the user that DMA is
over, due to ERR interrupt or TC interrupt.So, this patch just schedules existing tasklet, with a print showing error
interrupt has occurred on which channels.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
We have just executed following in pl08x_get_phy_channel():
ch->signal = -1;We don't have to compare "ch->signal < 0", as this will always be true.
Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
Simply writing 1 on bit 0 is sufficient instead of reading and clearing bits.
Also as per manual, for bit 3-31 of DMACConfiguration register:
"read undefined, write as 0"So, we must not rely on values read from this registers bit 3-31.
Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
Insert notifiers for the runtime PM API. With this the runtime PM layer kicks in
to action where used.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
For 8 memory and 16 slave channels 35 boot print lines are printed. And that is
too much. Most of this would be more useful for debugging. So moving few of them
to dev_dbg instead of dev_info. Now only 3 prints will be printed.This also rearrange one of the debug message to fit into two lines.
Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
Similar comment is present over routine also pl08x_choose_master_bus(). Keeping
one of them. Also rewrite that comment to convey message clearly.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
As mentioned in Documentation/CodingStyle,
The preferred form for passing a size of a struct is the following:
p = kmalloc(sizeof(*p), ...);The alternative form where struct name is spelled out hurts readability and
introduces an opportunity for a bug when the pointer variable type is changed
but the corresponding sizeof that is passed to a memory allocator is not.This patch replaces (struct xyz) with *ptr at several occurrences in driver.
Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
Header files included in driver are not present in alphabetical order. Rearrange
them in alphabetical order.Signed-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
There were few formatting related issues in code. This patch fixes them.
Fixes include:
- Remove extra blank lines
- align code to 80 cols
- combine several lines to one lineSigned-off-by: Viresh Kumar
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul
09 Aug, 2011
1 commit
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Something changed during the 3.1 merge window in the include files
which now causes the pl08x DMA engine driver to fail to build. Fix
this by adding the now necessary dma-mapping.h include:drivers/dma/amba-pl08x.c: In function ■pl08x_unmap_buffers■:
drivers/dma/amba-pl08x.c:1524: error: implicit declaration of function ■dma_unmap_single■
drivers/dma/amba-pl08x.c:1527: error: implicit declaration of function ■dma_unmap_page■Acked-by: Vinod Koul
Acked-by: Linus Walleij
Signed-off-by: Russell King
26 Jul, 2011
9 commits
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pl08x_width function does not handle rest of enums for DMA_SLAVE_BUSWIDTH_xxxx
which causes gcc to emit below wariningdrivers/dma/amba-pl08x.c: In function 'pl08x_width':
drivers/dma/amba-pl08x.c:1119: warning: enumeration value
'DMA_SLAVE_BUSWIDTH_UNDEFINED' not handled in switch
drivers/dma/amba-pl08x.c:1119: warning: enumeration value
'DMA_SLAVE_BUSWIDTH_8_BYTES' not handled in switchthis patch adds a default case which returns error
Signed-off-by: Vinod Koul
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Acked-by: Linus Walleij
Signed-off-by: Russell King
Signed-off-by: Vinod Koul -
Now that we have separate cctl values for M>P and P>M transfers, we can
avoid calculating the cctl value each time we prepare a transaction.
Move the bus selection and increment setting to the slave configuration
and initialization functions.Acked-by: Linus Walleij
Signed-off-by: Russell King
Signed-off-by: Vinod Koul -
Acked-by: Linus Walleij
Signed-off-by: Russell King
Signed-off-by: Vinod Koul -
Store the source/destination cctl values into the channel structure.
This moves us towards being able to avoid a configuration call each
time we use the channel.Acked-by: Linus Walleij
Signed-off-by: Russell King
Signed-off-by: Vinod Koul -
Store the source/destination slave address separately into the channel
structure. This moves us towards being able to avoid a configuration
call each time we use the channel.Acked-by: Linus Walleij
Signed-off-by: Russell King
Signed-off-by: Vinod Koul -
Clean up debugging when setting up the LLI list. This reduces the
amount of output while preserving the information, and makes it easier
to read.Acked-by: Linus Walleij
Signed-off-by: Russell King
Signed-off-by: Vinod Koul -
Avoid re-selecting the LLI bus each time we create an LLI. Move it out
of the LLI setup loops.Acked-by: Linus Walleij
Signed-off-by: Russell King
Signed-off-by: Vinod Koul -
PL08X_WQ_PERIODMIN and PL08X_MAX_ALLOCS are not used, remove them.
Acked-by: Linus Walleij
Signed-off-by: Russell King
Signed-off-by: Vinod Koul
24 Feb, 2011
1 commit
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Make Primecell driver probe functions take a const pointer to their
ID tables. Drivers should never modify their ID tables in their
probe handler.Signed-off-by: Russell King
31 Jan, 2011
2 commits
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If a transfer is initiated from memory to a peripheral, then data is
fetched and the channel is marked busy. This busy status persists until
the HALT bit is set and the queued data has been transfered to the
peripheral. Waiting indefinitely after setting the HALT bit results in
system lockups. Timeout this operation, and print an error when this
happens.Signed-off-by: Russell King
Acked-by: Linus Walleij
Signed-off-by: Dan Williams -
If we try to pause a channel when terminating a transfer, we could end
up spinning for it to become inactive indefinitely, and can result in
an uninterruptible wait requiring a reset to recover from.Terminating a transfer is supposed to take effect immediately, but may
result in data loss.To make this clear, rename the function to pl08x_terminate_phy_chan().
Also, make sure it is always consistently called - with the spinlock
held and IRQs disabled, and ensure that the TC and ERR interrupt status
is always cleared.Signed-off-by: Russell King
Acked-by: Linus Walleij
Signed-off-by: Dan Williams
17 Jan, 2011
1 commit
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Cleanup the formatting of comments, remove some which don't make sense
anymore.Signed-off-by: Russell King
[fix conflict with 96a608a4]
Signed-off-by: Dan Williams
05 Jan, 2011
5 commits
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Prevent dma_set_runtime_config() being used to alter the configuration
supplied by the platform for memcpy channel configuration. No one
should be trying to change this configuration.Signed-off-by: Russell King
Acked-by: Linus Walleij
Signed-off-by: Dan Williams -
There are cases in dma_set_runtime_config() where we fail to perform
the requested action - and we just issue a KERN_ERR message in that
case. We have the facility to return an error to the caller, so that
is what we should do.When we encounter an error due to invalid parameters, we should not
modify driver state.Signed-off-by: Russell King
Acked-by: Linus Walleij
Signed-off-by: Dan Williams -
The PL08x driver holds on to the channel lock with interrupts disabled
between the prepare and the subsequent submit API functions. This
means that the locking state when the prepare function returns is
dependent on whether it suceeeds or not.It did this to ensure that the physical channel wasn't released, and
as it used to add the descriptor onto the pending list at prepare time
rather than submit time.Now that we have reorganized the code to remove those reasons, we can
now safely release the spinlock at the end of preparation and reacquire
it in our submit function.Signed-off-by: Russell King
Acked-by: Linus Walleij
Signed-off-by: Dan Williams -
Introduce 'phychan_hold' to hold on to physical DMA channels while we're
preparing a new descriptor for it. This will be incremented when we
allocate a physical channel and set the MUX registers during the
preparation of the TXD, and will only be decremented when the TXD is
submitted.This prevents the physical channel being given up before the new TXD
is placed on the queue.Signed-off-by: Russell King
Acked-by: Linus Walleij
Signed-off-by: Dan Williams -
Don't place TXDs on the pending list when they're prepared - place
them on the list when they're ready to be submitted. Also, only
place memcpy requests in the wait state when they're submitted and
don't have a physical channel associated.Signed-off-by: Russell King
Acked-by: Linus Walleij
Signed-off-by: Dan Williams