19 Jun, 2017
1 commit
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1. When pxp do rotation, fetch and store engine need block mode.
2. When use pxp store engine fill function, not only need config
store engine, but also need config fetch engine, otherwise, it
will not work.Signed-off-by: Guoniu.Zhou
(cherry picked from commit 87347dc507631b98d914d42de0a2783915489a2a)
16 Jun, 2017
3 commits
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iMX7D Sabre SD board implement the GPIO expander
connected to a peripheral bus.
Probe deferral would be triggered when try to request
the expanded GPIO at the first time.
pcie ep can't be probed properly at the second probe,
because of the duplicated registration of the sysfs.Change the registeration point of the sysfs to fix
this issue.Signed-off-by: Richard Zhu
(cherry picked from commit dfa403d5ae689fcb9cdb8e082ad15493bf8a38d7) -
i.MX7ULP QSPI dtb was used to update the M4 images, it should not able
to boot the kernel even without the M4 image in QSPI.Also fixed the typo in dtsi to correct the QSPI register address
mapping range.Signed-off-by: Han Xu
(cherry picked from commit 6fb558d7e38a4f60944a791d4ff12fd5a5f039f5) -
Fix build error when SOC_IMX_PCM_DMA is not enabled
error: expected identifier or ‘(’ before ‘{’ token})Signed-off-by: Adrian Alonso
(cherry picked from commit 67ee27e3c97c8deb851ca61fab0e513009b93dbe)
15 Jun, 2017
7 commits
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Dynamic constraints for supported sampling rates cannot prevent aplay to
play audio files with higher rates. So we remove the constraints and hard
reject the unsupported samples.Signed-off-by: Mihai Serban
Reviewed-by: Shengjiu Wang
(cherry picked from commit f9f35e22e657845a593f6e3338e9e5acec6addc4) -
The ASRC support 24 bit input width, but for S20_3LE the input width
is 20 bit, asrc will treat it as 24bit, which like a 24bit data shift
4 bit right, the result is the volume is lower than expected.
ASRC can't shift the 20bit data left 4 bit internally, so remove the
S20_3LE in supported list, add S24_3LE in supported list.Signed-off-by: Shengjiu Wang
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Same as commit cfe36e2e7fce ("MLK-15043-2: ASoC: imx-cs42888: fix
noise issue with FE-BE case"). need to add same configuration
for imx-wm8960, imx-wm8962, imx-mqs.Signed-off-by: Shengjiu Wang
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In master mode, clock of S20_3LE mono bistream is calculated by formula
"2 * params_width * params_rate", and this clock can't be divided from
clock soure, so switch to use the "2 * params_physical_width * params_rate"
formula to fix this issue.Signed-off-by: Shengjiu Wang
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Update imx_v7_defconfig to match the output of 'make savedefconfig'.
Signed-off-by: Octavian Purdila
Reviewed-by: Anson Huang -
The case is "aplay -Dhw:0,1 -d 5 -r 8000 -f S16_LE -c 9 audio8k16b9c.wav",
which is to playback 9 channel bitstream. But the maximum supported channel
of codec is 8, ALSA didn't return error for this case, but continue to
playback.The reason is that in FE-BE case, ASLA only get the FE's hw parameter for
constraint list, omit the BE's parameter. This patch is to merge BE's
parameter to FE. in this situation with the 9 channel case, ASLA will
return error "aplay: set_params:1303: Channels count non available"Signed-off-by: Shengjiu Wang
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According to commit b073ed4e2126 ("ASoC: soc-pcm: DPCM cares BE format"),
Current DPCM only care FE channel, but it will set unsupported channel to
drivers.
So add dpcm_merged_chan, which is used to merge the BE's codec
channels configuration to FE if it exist in snd_soc_dai_link. And
dpcm_runtime_base_chan function is to get the channel configuration of BE,
which likes the dpcm_runtime_base_format function.Signed-off-by: Shengjiu Wang
14 Jun, 2017
14 commits
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IMX_SOC_IMX7 is referenced in makefiles and kconfig but it is not
defined, so define it and select it for both IMX7D and IMX7ULP.Fixes the following build errors:
arch/arm/mach-imx/built-in.o: In function `update_lpddr2_freq_smp':
platform-imx-dma.c:(.text+0xf7c): undefined reference to `imx_scu_base'
platform-imx-dma.c:(text+0xf88): undefined reference to `imx_scu_base'
arch/arm/mach-imx/built-in.o: In function `update_ddr_freq_imx_smp':
platform-imx-dma.c:(text+0x330c): undefined reference to `imx_scu_base'
platform-imx-dma.c:(text+0x3318): undefined reference to `imx_scu_base'
Makefile:969: recipe for target 'vmlinux' failed
make: *** [vmlinux] Error 1Signed-off-by: Octavian Purdila
Reviewed-by: Leonard Crestez -
Fixes the following build errors:
ERROR: "mipi_csi2_reset" [drivers/media/platform/mxc/capture/ov5640_camera_mipi_int.ko] undefined!
ERROR: "mipi_csi2_set_datatype" [drivers/media/platform/mxc/capture/ov5640_camera_mipi_int.ko] undefined!
ERROR: "mipi_csi2_enable" [drivers/media/platform/mxc/capture/ov5640_camera_mipi_int.ko] undefined!
ERROR: "mipi_csi2_dphy_status" [drivers/media/platform/mxc/capture/ov5640_camera_mipi_int.ko] undefined!
ERROR: "mipi_csi2_disable" [drivers/media/platform/mxc/capture/ov5640_camera_mipi_int.ko] undefined!
ERROR: "mipi_csi2_set_lanes" [drivers/media/platform/mxc/capture/ov5640_camera_mipi_int.ko] undefined!
ERROR: "mipi_csi2_get_status" [drivers/media/platform/mxc/capture/ov5640_camera_mipi_int.ko] undefined!
ERROR: "mipi_csi2_get_info" [drivers/media/platform/mxc/capture/ov5640_camera_mipi_int.ko] undefined!
ERROR: "mipi_csi2_get_error1" [drivers/media/platform/mxc/capture/ov5640_camera_mipi_int.ko] undefined!Signed-off-by: Octavian Purdila
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When epdc driver use pxp, it didn't fill stride value of s0_parm, so it leads to
epdc can display picture normally.So fill it in this patch.
Signed-off-by: Guoniu.Zhou
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There are boards without gpr setting, so it's better not to fail
in such cases and only print a warning.This is related to commit ce72b6d2668049 ("MLK-13574-1: ASoC: imx-wm8960:
remove the gpr dependency").Signed-off-by: Daniel Baluta
(cherry picked from commit 882c373c74aecd27aad64062d4cceb89a4371c2e) -
The AIPSx address space of i.MX7ULP need to be mapped as SZ_1M block
in iRAM tlb for suspend code use. If we use ioremap to map these
address region into kernel space, we can't make sure that the returned
virtual address is 1M alignment. So we can map this address regions
as static, then if we use the ioremap to map these memory regions, it will
always return the virtual address of static mapping. So we can make sure
the virtual address is 1M aligned.Signed-off-by: Bai Ping
(cherry picked from commit 486041dc2fed38adc82ad93bd2dcc155c219ef01) -
This patch uses the resource-managed extcon API for extcon_register_notifier()
and replaces the deprecated extcon API as following:
- extcon_get_cable_state_() -> extcon_get_state()Signed-off-by: Chanwoo Choi
Signed-off-by: Peter Chen
(cherry picked from commit 3f991aa0b665c8e9bb702421a4e5005c3588fb62) -
We must check for ID/VBUS changes during resume irrespective
of whether our device wakeup is enabled or not.Without this we seem to be missing ID/VBUS events after
system suspend/resume.Signed-off-by: Roger Quadros
Signed-off-by: Chanwoo Choi
(cherry picked from commit 8680b4d1933fbe3349d51a4e1fd4513b12abffed) -
Whether the USB port as a wakeup source should be determined by user,
but not enabled by default.Signed-off-by: Peter Chen
Signed-off-by: Chanwoo Choi
(cherry picked from commit 98fd079297dd274c15c926a337253675573c5832) -
At some systems, the pinctrl setting will be lost or needs to
set as "sleep" state to save power consumption. So, we need to
configure pinctrl as "sleep" state when system enters suspend,
and as "default" state after system resumes. In this way, the
pinctrl value can be recovered as "default" state after resuming.Signed-off-by: Peter Chen
Signed-off-by: Chanwoo Choi
(cherry picked from commit bcb7440e76a96c8a244bd683142a38f7d5cecb93) -
Driver can now work with both ID and VBUS pins or either one of
them.There can be the following 3 cases
1) Both ID and VBUS GPIOs are available:
ID = LOW -> USB_HOST active, USB inactive
ID = HIGH -> USB_HOST inactive, USB state is same as VBUS.2) Only ID GPIO is available:
ID = LOW -> USB_HOST active, USB inactive
ID = HIGH -> USB_HOST inactive, USB active3) Only VBUS GPIO is available:
VBUS = LOW -> USB_HOST inactive, USB inactive
VBUS = HIGH -> USB_HOST inactive, USB activeSigned-off-by: Roger Quadros
Reviewed-by: Peter Chen
Signed-off-by: Chanwoo Choi
(cherry picked from commit 541332a13b1ded42097ba96c52c7bc70931e528c) -
commit 916e43e1d6fb ("MLK-13570-3 usb: chipidea: core: change extcon
usage for imx_4.1.y") is directly cherry-picked from 4.1.y, but which
is not valid anymore on 4.y kernel, so revert most part and only keep
the irq check after resume.Reviewed-by: Peter Chen
Signed-off-by: Li Jun
(cherry picked from commit 9e8e32042df9e0a43574cb222070ec2f1051007d) -
This reverts commit 4c7d332e3316 ("MLK-13638-3 extcon: usb-gpio: add
pinctrl operation during system PM"). We will use the upstream version.Reviewed-by: Peter Chen
Signed-off-by: Li Jun
(cherry picked from commit bf584fcb7294cac67c67b552d7b347b6e59fe243) -
This reverts commit 358776f8c5d8 ("MLK-13912-1 extcon: ext-usb-gpio: do not
enable wakeup by default"), we will use the upstream patch version.Reviewed-by: Peter Chen
Signed-off-by: Li Jun
(cherry picked from commit 72c6b1977e334c5fde2f394ce276ab42df76575f) -
The change introduced by commit 00c174b3b28a
("MLK-14525: ASoC: fsl_esai: channel swap issue in 3 channels or 5 channels")
is no longer valid after improvements added with commit c35bc6ae5c48
("MLK-14778: ASoC: fsl: imx-cs42888: Improve support for odd number of channels")Because we use TDM instead of I2S for 3,5 and 7 channels we must
initialize ESAI with the actual number of channels. There is no need
to count the additional channel required when I2S was used.Signed-off-by: Mihai Serban
Reviewed-by: Daniel Baluta
(cherry picked from commit 85a9aa0a73f80968445d8929f5ae9acb1972c8fe)
09 Jun, 2017
15 commits
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One codebase to support all graphics standards for imx chips,
Optimized software pipeline for modern GPU benchmarks,
Integrated more bug-fixings for critical gpu issues.Source repo: gpu-viv6
Source branch: origin/imx_6.2.2
Source commit: 8826fbc75269e7d26b0bf9c5e9a2b0110b295f9cSigned-off-by: Xianzhong
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When the tick is stopped and we reach the dynticks evaluation code on
IRQ exit, we perform a soft tick restart if we observe an expired timer
from there. It means we program the nearest possible tick but we stay in
dynticks mode (ts->tick_stopped = 1) because we may need to stop the tick
again after that expired timer is handled.Now this solution works most of the time but if we suffer an IRQ storm
and those interrupts trigger faster than the hardware clockevents min
delay, our tick won't fire until that IRQ storm is finished.Here is the problem: on IRQ exit we reprog the timer to at least
NOW() + min_clockevents_delay. Another IRQ fires before the tick so we
reschedule again to NOW() + min_clockevents_delay, etc... The tick
is eternally rescheduled min_clockevents_delay ahead.A solution is to simply remove this soft tick restart. After all
the normal dynticks evaluation path can handle 0 delay just fine. And
by doing that we benefit from the optimization branch which avoids
clock reprogramming if the clockevents deadline hasn't changed since
the last reprog. This fixes our issue because we don't do repetitive
clock reprog that always add hardware min delay.As a side effect it should even optimize the 0 delay path in general.
Reported-and-tested-by: Octavian Purdila
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: Rik van Riel
Cc: Ingo Molnar
Signed-off-by: Frederic Weisbecker -
commit 3f0191b80cf1 ("MLK-14381 mmc: sdhci-esdhc-imx: reset tuning
circuit when system resume") add tuning reset when the timing is
MMC_TIMING_LEGACY/MMC_TIMING_MMC_HS/MMC_TIMING_SD_HS. For timing
MMC_TIMING_MMC_HS, we can not do tuning reset, otherwise HS400
timing is not right.Here is the process of config HS400, it do tuning in HS200 mode,
then switch to HS mode and 8 bit DDR mode, finally switch to HS400
mode. If we do tuning reset in HS mode, this will cause HS400 mode
lost the tuning setting, which will cause CRC error.Signed-off-by: Haibo Chen
(cherry picked from commit 25e7080552a8d681a83e6c328ef5dedf5132afbf) -
After soft reset, the irq register value will be zero, so we need set it to enable
all pxp interrupts.Signed-off-by: Guoniu.Zhou
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Some designs implement reset GPIO via a GPIO expander connected to a
peripheral bus. One such example would be i.MX7 Sabre board where said
GPIO is provided by SPI shift register connected to a bitbanged SPI bus.
To support such designs, allow reset GPIO request to defer probing of the
driver.Signed-off-by: Andrey Smirnov
Signed-off-by: Bjorn Helgaas
Reviewed-by: Lucas Stach
Cc: yurovsky@gmail.com
Cc: Fabio Estevam
Cc: Dong Aisheng
Cc: linux-arm-kernel@lists.infradead.org
(cherry picked from commit bde4a5a00e761f55be92f62378cf5024ced79ee3) -
GPC will stop ARM clock if both CPUs are in idle and CPU_CLK_ON_LPM is
set in GPC_LPCR_A7_BSC. Make sure that doesn't happen when cpu1 enters
state2 and cpu0 enters state0 because the default arm WFI state is not
marked with CPUIDLE_FLAG_TIMER_STOP and it can result in arch_sys_timer
being stopped unexpectedly.It is possible to reproduce incorrect behavior by explicitly disabling
other idle states for cpu0/cpu1 and timing how much sleep calls take on
cpu0. Ocassionaly something like "sleep 1" will take 3-4 seconds to
complete.Make sure that both CPUs are in the same idle state before entering
WAIT.Signed-off-by: Leonard Crestez
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On most imx SOCs GPT1 takes it's clock from the oscillater because
otherwise it might get confusing when bus frequency is decreased.Right now imx7 is an exception because imx7s.dtsi comes from upstream
rather than a port of imx_4.1.y.On the imx_4.1.y branch imx7 uses GPT_3M as well, adopt that approach.
Signed-off-by: Leonard Crestez
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nand-on-flash-bbt flag for i.mx6sx sabreauto dtb was set in wrong device
node, move it back to gpmi node.Signed-off-by: Han Xu
(cherry picked from commit 07643110a47b5c1982057e77316f229fa66740b5) -
The current min_delta for TPM clock event is 2 ticks which
is too small. As the TPM is running at 3MHz, 2 ticks equal
2/3 us. According to our testing, the interrupt latency will
be longer than this min_delta, especially when GPU is running.This patch changed the min_delta to 300 which give the system
around 100us for interrupt handling in case the "set_next_event"
call is interrupted by other signals.Also a simple validation code is added before the function returns.
Signed-off-by: Shenwei Wang
Signed-off-by: Bai Ping
(cherry picked from commit 4f882165cc31672f3c98de74ab02b757cb96ad26) -
According to design, PFD needs to be gated before
setting rate, this patch adds warning for PFD when
there is any try to set PFD rate with gate open;Since PFD may be enabled during kernel boot up,
here doing enable and disable before setting APLL_PFD2
rate is to make sure it is gated by clock framework
before setting rate.Signed-off-by: Anson Huang
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with "echo 1 > /sys/class/graphics/fb0/blank", and there is no
usb connected on board, the system may enter low power mode,
then audio playback will be failed. use pm_qos to prevent A7
core enter low power mode during audio playback and recording.Signed-off-by: Shengjiu Wang
(cherry picked from commit ea80731e828695bcfbf0d20c966813c3bdddfb88) -
When starting a playback the initialization data used to reduce underruns
was send to the transmit data register after the DMA requests were enabled.
This patch moves the initialization phase before enabling the DMA so the
data is transmitted in correct order.Signed-off-by: Mihai Serban
(cherry picked from commit 44e5c11332390a8b1c09d33d5653cb6673e9eea4) -
For samples with more than 2 and odd number of channels the I2S mode
does not work correctly. In I2S mode we are required to activate an even
number of channels (possibly on multiple datalines) and thus configure
the BCLK for even channels. In this case samples with odd (smaller) number
of channels are played faster and the sound is distorted.To fix this behavior we can enable TDM mode for the special cases of
samples with 3, 5 or 7 channels. But even TDM has some restrictions that
prevent us from having full support for the special cases:
1. TDM is not supported by codec in master mode so 3, 5 and 7 channels
usage is denied.
2. In codec slave mode TDM works only with 8 slots and slot width of 32
bits. For an often used MCLK frequency of 24MHz and the above restrictions
the maximum sample rate is limited to 48KHz = 24576000/(2*8*32).
The 2 denominator is required by ESAI BCLK divisors.Signed-off-by: Mihai Serban
(cherry picked from commit c35bc6ae5c48f62bae534ce8d2d818f857778ff8) -
Remove usless 'fsl,wdog-reset' property in dts on v4.9
Signed-off-by: Robin Gong
(cherry picked from commit bfe33c0df6a7cba546fcc5b30609be277f499af2) -
align watchdog external reset output property with community
instead of "fsl,wdog_b".Signed-off-by: Robin Gong
(cherry picked from commit c07391d10d74a1c85a0978085a3ac0a761fb6410)
