29 Oct, 2018
7 commits
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This patch adds NXP copyright for the i.MX PWM driver.
Signed-off-by: Liu Ying
(cherry picked from commit 59c94789cef003fe64ebeb68c7b209da0bf2de78) -
The PWM in i.MX8qxp MIPI subsystem needs to use the
'32k' clock to work properly. This patch gets this
clock in the PWM driver and uses it if it is supplied.Signed-off-by: Liu Ying
(cherry picked from commit a343cc44ee9aa4be408c51b02176c8d0970a698d)Conflicts:
drivers/pwm/pwm-imx.c -
As part of converting the imx pwm driver to an atomic apply function the
code handling ipg clock was dropped. Add it back because on imx8qm it is
indeed required.This fixes the same issue as imx_4.9.y commit
ce627dbfd76e ("MLK-16973-4 pwm: imx: Use ipg and per clks in ->config, ->enable and ->disable")Signed-off-by: Leonard Crestez
Reported-by: Marius Vlad
Tested-by: Marius Vlad
Reviewed-by: Liu Ying -
The TPM IP block on i.MX8QM has the following changes:
1) The IPG clock has to be enabled before access any registers
2) The extra bits in FTM_SC register are added to enable the PWM mode.This patch updates the driver according to these changes, and it
can support the TPM PWM module on i.MX8QM.Signed-off-by: Shenwei Wang
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In i.MX7ULP TPM PWM module, it has a pre-scale divider,
this divider setting is missed, so fix it.Signed-off-by: Bai Ping
Reviewed-by: Anson Huang -
Add ARM64 platform support for i.MX PWM driver.
Signed-off-by: Anson Huang
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Add TPM PWM driver support i.MX7ULP.
Signed-off-by: Bai Ping
[Octavian: updated for 4.9 APIs]
Signed-off-by: Octavian Purdila
15 Sep, 2018
1 commit
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[ Upstream commit b96e9eb62841c519ba1db32d036628be3cdef91f ]
Current clock name looks like this:
/soc/bus@ffd00000/pwm@1b000#mux0This is bad because CCF uses the clock to create a directory in clk debugfs.
With such name, the directory creation (silently) fails and the debugfs
entry end up being created at the debugfs root.With this change, the clock name will now be:
ffd1b000.pwm#mux0This matches the clock naming scheme used in the ethernet and mmc driver.
It also fixes the problem with debugfs.Fixes: 36af66a79056 ("pwm: Convert to using %pOF instead of full_name")
Signed-off-by: Jerome Brunet
Acked-by: Neil Armstrong
Signed-off-by: Thierry Reding
Signed-off-by: Sasha Levin
Signed-off-by: Greg Kroah-Hartman
10 Sep, 2018
2 commits
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commit 38dabd91ff0bde33352ca3cc65ef515599b77a05 upstream.
pwm-tiehrpwm driver disables PWM output by putting it in low output
state via active AQCSFRC register in ehrpwm_pwm_disable(). But, the
AQCSFRC shadow register is not updated. Therefore, when shadow AQCSFRC
register is re-enabled in ehrpwm_pwm_enable() (say to enable second PWM
output), previous settings are lost as shadow register value is loaded
into active register. This results in things like PWMA getting enabled
automatically, when PWMB is enabled and vice versa. Fix this by
updating AQCSFRC shadow register as well during ehrpwm_pwm_disable().Fixes: 19891b20e7c2 ("pwm: pwm-tiehrpwm: PWM driver support for EHRPWM")
Cc: stable@vger.kernel.org
Signed-off-by: Vignesh R
Signed-off-by: Thierry Reding
Signed-off-by: Greg Kroah-Hartman -
commit aa49d628f6e016bcec8c6f8e704b9b18ee697329 upstream.
As per AM335x TRM SPRUH73P "15.2.2.11 ePWM Behavior During Emulation",
TBCTL[15:14] only have effect during emulation suspend events (IOW,
to stop PWM when debugging using a debugger). These bits have no effect
on PWM output during normal running of system. Hence, remove code
accessing these bits as they have no role in enabling/disabling PWMs.Fixes: 19891b20e7c2 ("pwm: pwm-tiehrpwm: PWM driver support for EHRPWM")
Cc: stable@vger.kernel.org
Signed-off-by: Vignesh R
Signed-off-by: Thierry Reding
Signed-off-by: Greg Kroah-Hartman
03 Jul, 2018
1 commit
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commit 1d375b58c12f08d8570b30b865def4734517f04f upstream.
On some devices the contents of the ctrl register get lost over a
suspend/resume and the PWM comes back up disabled after the resume.This is seen on some Bay Trail devices with the PWM in ACPI enumerated
mode, so it shows up as a platform device instead of a PCI device.If we still think it is enabled and then try to change the duty-cycle
after this, we end up with a "PWM_SW_UPDATE was not cleared" error and
the PWM is stuck in that state from then on.This commit adds suspend and resume pm callbacks to the pwm-lpss-platform
code, which save/restore the ctrl register over a suspend/resume, fixing
this.Note that:
1) There is no need to do this over a runtime suspend, since we
only runtime suspend when disabled and then we properly set the enable
bit and reprogram the timings when we re-enable the PWM.2) This may be happening on more systems then we realize, but has been
covered up sofar by a bug in the acpi-lpss.c code which was save/restoring
the regular device registers instead of the lpss private registers due to
lpss_device_desc.prv_offset not being set. This is fixed by a later patch
in this series.Cc: stable@vger.kernel.org
Signed-off-by: Hans de Goede
Reviewed-by: Andy Shevchenko
Signed-off-by: Thierry Reding
Signed-off-by: Greg Kroah-Hartman
24 Apr, 2018
1 commit
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commit 6225f9c64b40bc8a22503e9cda70f55d7a9dd3c6 upstream.
This patch fixes an issue that is possible to set mismatch value to duty
for R-Car PWM if we input the following commands:# cd /sys/class/pwm//
# echo 0 > export
# cd pwm0
# echo 30 > period
# echo 30 > duty_cycle
# echo 0 > duty_cycle
# cat duty_cycle
0
# echo 1 > enable
--> Then, the actual duty_cycle is 30, not 0.So, this patch adds a condition into rcar_pwm_config() to fix this
issue.Signed-off-by: Ryo Kodama
[shimoda: revise the commit log and add Fixes and Cc tags]
Fixes: ed6c1476bf7f ("pwm: Add support for R-Car PWM Timer")
Cc: Cc: # v4.4+
Signed-off-by: Yoshihiro Shimoda
Signed-off-by: Thierry Reding
Signed-off-by: Greg Kroah-Hartman
19 Mar, 2018
1 commit
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[ Upstream commit 8472b529e113e0863ea064fdee51bf73c3f86fd6 ]
Fix trivial copy/paste bug.
Signed-off-by: Axel Lin
Reviewed-by: Linus Walleij
Fixes: ef1f09eca74a ("pwm: Add a driver for the STMPE PWM")
Signed-off-by: Thierry Reding
Signed-off-by: Sasha Levin
Signed-off-by: Greg Kroah-Hartman
02 Nov, 2017
1 commit
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Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.By default all files without license information are under the default
license of the kernel, which is GPL version 2.Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if
Reviewed-by: Philippe Ombredanne
Reviewed-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
12 Sep, 2017
1 commit
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…ierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"The changes for this release include a new driver for the PWM
controller found on SoCs of the ZTX ZX family. Support for an old
SH-Mobile SoC has been dropped and the Rockchip and MediaTek drivers
gain support for more generations.Other than that there are a bunch of coding style fixes, minor bug
fixes and cleanup as well as documentation patches"* tag 'pwm/for-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (32 commits)
pwm: pwm-samsung: fix suspend/resume support
pwm: samsung: Remove redundant checks from pwm_samsung_config()
pwm: mediatek: Disable clock on PWM configuration failure
dt-bindings: pwm: Add MT2712/MT7622 information
pwm: mediatek: Fix clock control issue
pwm: mediatek: Fix PWM source clock selection
pwm: mediatek: Fix Kconfig description
pwm: tegra: Explicitly request exclusive reset control
pwm: hibvt: Explicitly request exclusive reset control
pwm: tiehrpwm: Set driver data before runtime PM enable
pwm: tiehrpwm: Miscellaneous coding style fixups
pwm: tiecap: Set driver data before runtime PM enable
pwm: tiecap: Miscellaneous coding style fixups
dt-bindings: pwm: tiecap: Add TI 66AK2G SoC specific compatible
pwm: tiehrpwm: fix clock imbalance in probe error path
pwm: tiehrpwm: Fix runtime PM imbalance at unbind
pwm: Kconfig: Enable pwm-tiecap to be built for Keystone
pwm: Add ZTE ZX PWM device driver
dt-bindings: pwm: Add bindings doc for ZTE ZX PWM controller
pwm: bcm2835: Support for polarity setting via DT
...
05 Sep, 2017
1 commit
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…-4.14', 'ib-mfd-iio-pwm-4.14', 'ib-mfd-input-rtc-4.14', 'ib-mfd-many-4.14' and 'ib-mfd-pinctrl-regulator-4.14' into ibs-for-mfd-merged
04 Sep, 2017
2 commits
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Add support for single PWM channel on Low-Power Timer, that can be
found on some STM32 platforms.Signed-off-by: Fabrice Gasnier
Acked-by: Thierry Reding
Signed-off-by: Lee Jones -
include/linux/i2c is not for client devices. Move the header file to a
more appropriate location.Signed-off-by: Wolfram Sang
Acked-by: Greg Kroah-Hartman
Acked-by: Alexandre Belloni
Acked-by: Mark Brown
Acked-by: Sebastian Reichel
Acked-by: Jonathan Cameron
Acked-by: Dmitry Torokhov
Acked-by: Kishon Vijay Abraham I
Acked-by: Bartlomiej Zolnierkiewicz
Acked-by: Thierry Reding
Acked-by: Tony Lindgren
Acked-by: Daniel Thompson
Acked-by: Linus Walleij
Acked-by: Guenter Roeck
Signed-off-by: Lee Jones
21 Aug, 2017
17 commits
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Fix suspend/resume support:
- add disabled_mask to struct samsung_pwm_chip to track PWM
disabled state information in pwm_samsung_{disable,enable}()- rename pwm_samsung_config() to __pwm_samsung_config() and
add extra force_period parameter to be used during resume
(to force tin_ns and tcnt recalculation)- add pwm_samsung_config() wrapper for preserving old behavior
- properly restore PWM configuration in pwm_samsung_resume()
- remove no longer needed pwm_samsung_suspend()
- update Copyrights
Signed-off-by: Bartlomiej Zolnierkiewicz
Signed-off-by: Thierry Reding -
If the requested period_ns and duty_ns values are identical to the last
programmed ones pwm_samsung_config() returns early and skips the
hardware configuration. The same checks are now done by the PWM core so
the driver specific ones can be removed.Signed-off-by: Bartlomiej Zolnierkiewicz
Signed-off-by: Thierry Reding -
Make sure to disable the PWM clock if the PWM cannot be configured due
to the clock divider exceeding the maximum value.While at it, replace the hardcoded maximum clock divider with a defined
constant to improve code readability.Signed-off-by: Zhi Mao
Acked-by: John Crispin
Signed-off-by: Thierry Reding -
In order to save some power, do not prepare the top and main clocks
during mtk_pwm_probe(). Instead, prepare the clocks only when necessary
and also make sure to enable the clocks to match the semantics of the
common clock framework.While at it, don't explicitly disable all PWM channels in ->remove()
because all users should have done that already.Signed-off-by: Zhi Mao
Acked-by: John Crispin
Signed-off-by: Thierry Reding -
In original code, the PWM output frequency is not correct when set
bit=1 to PWMCON register.Signed-off-by: Zhi Mao
Reviewed-by: Matthias Brugger
Acked-by: John Crispin
Signed-off-by: Thierry Reding -
Fix a copy/paste error that sneaked into the Kconfig description of the
Mediatek PWM driver.Signed-off-by: Zhi Mao
Acked-by: John Crispin
Signed-off-by: Thierry Reding -
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
reset lines") started to transition the reset control request API calls
to explicitly state whether the driver needs exclusive or shared reset
control behavior. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.No functional changes.
Cc: Thierry Reding
Cc: Jonathan Hunter
Cc: linux-pwm@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Philipp Zabel
Signed-off-by: Thierry Reding -
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
reset lines") started to transition the reset control request API calls
to explicitly state whether the driver needs exclusive or shared reset
control behavior. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.No functional changes.
Cc: Thierry Reding
Cc: linux-pwm@vger.kernel.org
Signed-off-by: Philipp Zabel
Signed-off-by: Thierry Reding -
Runtime PM callbacks can be run right after runtime PM is enabled, so
make sure to set the driver data before that. This is unlikely to ever
happen with the current driver, but it doesn't hurt to follow best
practices anyway.Signed-off-by: Thierry Reding
-
I noticed most of these while reviewing another patch and thought I'd
fix them while at it. These are mostly changes to make variable types
more strict and whitespace fixups.Signed-off-by: Thierry Reding
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Runtime PM callbacks can be run right after runtime PM is enabled, so
make sure to set the driver data before that. This is unlikely to ever
happen with the current driver, but it doesn't hurt to follow best
practices anyway.Signed-off-by: Thierry Reding
-
I noticed most of these while reviewing another patch and thought I'd
fix them while at it. These are mostly changes to make variable types
more strict and whitespace fixups.Signed-off-by: Thierry Reding
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Make sure to unprepare the clock before returning on late probe errors.
Fixes: b388f15fd14c ("pwm: pwm-tiehrpwm: Use clk_enable/disable instead clk_prepare/unprepare.")
Signed-off-by: Johan Hovold
Signed-off-by: Thierry Reding -
Remove unbalanced RPM put at driver unbind which resulted in a negative
usage count.Fixes: 19891b20e7c2 ("pwm: pwm-tiehrpwm: PWM driver support for EHRPWM")
Signed-off-by: Johan Hovold
Signed-off-by: Thierry Reding -
66AK2G SoC has ECAP subsystem that is used as pwm-backlight provider for
display. Hence, enable pwm-tiecap driver to be built for Keystone
architecture.Signed-off-by: Vignesh R
Signed-off-by: Thierry Reding -
It adds PWM device driver for ZTE ZX family SoCs. The PWM controller
supports 4 devices with polarity configuration.The driver has been tested with pwm-regulator support to scale core
voltage via cpufreq.Signed-off-by: Shawn Guo
Signed-off-by: Thierry Reding -
This adds support for the third (optional) pwm cell to specify the
polarity, which is needed by display backlights for example.Signed-off-by: Stefan Wahren
Reviewed-by: Eric Anholt
Signed-off-by: Thierry Reding
18 Aug, 2017
5 commits
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The rk3328 SoC supports atomic update, we could lock the configuration
of period and duty at first, after unlock is configured, the period and
duty are effective at the same time.If the polarity, period and duty need to be configured together,
the way for atomic update is "configure lock and old polarity" ->
"configure period and duty" -> "configure unlock and new polarity".Signed-off-by: David Wu
Acked-by: Rob Herring
Signed-off-by: Thierry Reding -
Just use the same PWM ops for each IP, and get rid of the ops in struct
rockchip_pwm_data, but still define the three different instances of the
struct to use common interface for each IP.Signed-off-by: David Wu
Signed-off-by: Thierry Reding -
It is usually possible to configure the polarity, cycle and duty all at
once, so that the polarity and cycle and duty are applied atomically.
Move it from rockchip_pwm_set_enable() into rockchip_pwm_config(), as
well as prepare for the next atomic update commit.Signed-off-by: David Wu
Signed-off-by: Thierry Reding -
Drop the custom hook of pwm_enable() and implement pwm_apply_v1() and
pwm_apply_v2() instead.Signed-off-by: David Wu
Signed-off-by: Thierry Reding -
It seems the rockchip_pwm_config() always returns the result 0, so
remove the judge.Signed-off-by: David Wu
Acked-by: Boris Brezillon
Signed-off-by: Thierry Reding
