14 Dec, 2011
1 commit
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This patch updates the common platform files with AM335X device
support (AM33XX family).The approach taken in this patch is,
AM33XX device will be considered as OMAP3 variant, and a separate
SoC class created for AM33XX family of devices with a subclass type
for AM335X device, which is newly added device in the family.This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x()
checks will return success on AM335X device.
A kernel config option CONFIG_SOC_OMAPAM33XX is added under OMAP3
to include support for AM33XX build.Also, cpu_mask and RATE_IN_XXX flags have crossed 8 bit hence
struct clksel_rate.flags, struct prcm_config.flags and cpu_mask
are changed to u16 from u8.Signed-off-by: Afzal Mohammed
Signed-off-by: Vaibhav Hiremath
Cc: Hemant Pedanekar
[tony@atomide.com: left out CK_AM33XX for now]
Signed-off-by: Tony Lindgren
07 Oct, 2011
1 commit
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OMAP4 DPLL_ABE can enable a 4X multipler on top of the normal MN multipler
and divider. This is achieved by setting CM_CLKMODE_DPLL_ABE.DPLL_REGM4XEN
bit in CKGEN module of CM1. From the OMAP4 TRM:Fdpll = Fref x 2 x (4 x M/(N+1)) in case REGM4XEN bit field is set (only
applicable to DPLL_ABE).Add new round_rate() and recalc() functions for OMAP4, that check the
setting of REGM4XEN bit and handle this appropriately. The new functions
are a simple wrapper on top of the existing omap2_dpll_round_rate() and
omap2_dpll_get_rate() functions to handle the REGM4XEN bit.The REGM4XEN bit is only implemented for the ABE DPLL on OMAP4 and so
only dpll_abe_ck uses omap4_dpll_regm4xen_round_rate() and
omap4_dpll_regm4xen_recalc() functions.Signed-off-by: Mike Turquette
Tested-by: Jon Hunter
Signed-off-by: Jon Hunter
[paul@pwsan.com: fixed attempt to return a negative from a fn returning
unsigned; pass along errors from omap2_dpll_round_rate();
added documentation; added Jon's S-o-b]
Signed-off-by: Paul Walmsley
10 Jul, 2011
1 commit
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The OMAP2/3 clock code was written to notify the clockdomain code when
the first clock in a clockdomain is enabled and when the last enabled
clock in a clockdomain is disabled. OMAP4 requires a different
approach: the hwmod code needs to signal the clockdomain code when to
force-enable and auto-idle a clockdomain during the IP block enable
process. The current conjecture is that once that hwmod sequence is
implemented, it will no longer be necessary for the clock code to call
into the clockdomain code for "optional clocks" on OMAP4.Add a static flag to the OMAP2+ clock code, clkdm_control, that by
default preserves the OMAP2/3 behavior. Also add a function,
omap2_clk_disable_clkdm_control(), intended to be called from OMAP4
and beyond clock initcalls, that disables the old behavior.Part of this patch was originally based on a patch by Rajendra Nayak
.Signed-off-by: Paul Walmsley
Cc: Benoît Cousson
Cc: Rajendra Nayak
08 Mar, 2011
5 commits
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After commit 81b34fbecbfbf24ed95c2d80d5cb14149652408f ("OMAP2 clock:
split OMAP2420, OMAP2430 clock data into their own files"), it's
possible to remove dsp_irate_ick from the OMAP2420 and OMAP2430 clock
files. It was originally only needed due to a 2420/2430 clock tree difference,
and now that the data is in separate files, it's superfluous.Signed-off-by: Paul Walmsley
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Remove the DPLL rate tolerance code that is called during rate
rounding. As far as I know, this code is never used, since it's been
more important for callers of the DPLL round_rate()/set_rate()
functions to obtain an exact rate than it is to save a relatively
small amount of power.Signed-off-by: Paul Walmsley
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OMAP2430 and OMAP3xxx have modem autoidle bits that are actually
attached to clocks with CM_FCLKEN bits; add the code and data to
handle these.Signed-off-by: Paul Walmsley
Tested-by: Rajendra Nayak
Reviewed-by: Kevin Hilman -
Add interface clock type code with autoidle enable/disable support.
The clkops structures created in this file will be used for all
OMAP2/3 interface clocks with autoidle support. They will enable the
clock framework to control interface clock autoidle directly.Signed-off-by: Paul Walmsley
Tested-by: Rajendra Nayak
Reviewed-by: Kevin Hilman -
Add the necessary code and data to allow the clock framework to enable
and disable the OMAP2 DPLL autoidle state. This is so the direct
register access can be moved out of the mach-omap2/pm24xx.c code, and other
code that needs to control this (e.g., CPUIdle) can do so via an API.
As part of this patch, remove the pm24xx.c code that formerly wrote
directly to the autoidle bits.Signed-off-by: Paul Walmsley
Cc: Kevin Hilman
Tested-by: Rajendra Nayak
Reviewed-by: Kevin Hilman
26 Feb, 2011
3 commits
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Enable hardware gate control for all dpll MX and X2 postdividers.
This requires the allow_idle/deny_idle functions to be
populated for all clock nodes (mx/x2 post dividers) in
clkops.Signed-off-by: Rajendra Nayak
Signed-off-by: Paul Walmsley -
On OMAP4, the dpll post divider outputs (MX outputs)
along with clockout_x2 output provide a way to allow/deny
hardware level autogating.
Allowing autoidle would mean that the hw would autogate
this clock when there is no dependency for it.
Denying idle would mean that this clock output will be
forced to stay enabled.Add dpll api's to read/allow/deny idle control
for these dpll mx postdividers.NOTE: The gatectrl bit set to 0 allows gatectrl,
and the bit set to 1 denies gatectrl.Signed-off-by: Rajendra Nayak
[paul@pwsan.com: moved OMAP4-specific DPLL control code to
mach-omap2/dpll44xx.c; added some documentation for CLOCK_CLKOUTX2]
Signed-off-by: Paul Walmsley -
All OMAP3/4 dpll's support hardware level autogating.
Populate allow_idle/deny_idle function pointers for all
DPLL's in clkops.Signed-off-by: Rajendra Nayak
Signed-off-by: Paul Walmsley
22 Dec, 2010
1 commit
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J-Type DPLLs have additional configuration parameters that need to
be programmed when setting the multipler and divider for the DPLL.
These parameters being the sigma delta divider (SD_DIV) for the DPLL
and the digital controlled oscillator (DCO) to be used by the DPLL.The current code is implemented specifically to configure the
OMAP3630 PER J-Type DPLL. The OMAP4430 USB DPLL is also a J-Type DPLL
and so this code needs to be updated to work for both OMAP3 and OMAP4
devices and any other future devices that have J-TYPE DPLLs.For the OMAP3630 PER DPLL both the SD_DIV and DCO paramenters are
used but for the OMAP4430 USB DPLL only the SD_DIV field is used.
The current implementation will only program the SD_DIV and DCO
fields if the DPLL has both and hence this does not work for
OMAP4430.In order to make the code more generic add two new fields to the
dpll_data structure for the SD_DIV field and DCO field bit-masks
and only program these fields if the masks are defined for a specific
DPLL. This simplifies the code and allows us to remove the flag
DPLL_NO_DCO_SEL.Tested on OMAP36xx Zoom3 and OMAP4 Blaze.
Signed-off-by: Jon Hunter
[paul@pwsan.com: removed explicit inlining and added '_' prefix on lookup_*()
functions; added testing info to commit message; added 35xx comments back in]
Signed-off-by: Paul Walmsley
21 May, 2010
1 commit
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This patch cleans up arch/arm/mach-omap2/clkt_clksel.c. It:
- makes several functions static that are not called outside the file;
- adds documentation;
- makes some code paths easier to read (hopefully), by breaking up
compound statements and removing redundant checks;- converts some pr_err()s that indicate clock tree data problems into WARN()s,
so they are more likely to be noticed;- and moves omap2_clk_round_rate() back into mach-omap2/clock.c, its proper
home, since it is not clksel-specific.Signed-off-by: Paul Walmsley
25 Feb, 2010
6 commits
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On OMAP4 platform the iclk control is completly under hardware control
and no software control is available.This difference w.r.t previous OMAP's needs all the common driver
accross OMAP's , cpu_is_xxxx() checks. To avoid poulluting the
drivers dummy clock nodes are created (The autogeneration
script has been updated accordingly).Signed-off-by: Santosh Shilimkar
Signed-off-by: Rajendra Nayak
Signed-off-by: Benoit Cousson
[paul@pwsan.com: made OMAP1 dummy_ck common and edited patch to reuse that]
Signed-off-by: Paul Walmsley -
The OMAP2 and OMAP3 boot-time MPU rate change code is almost
identical. Merge them into mach-omap2/clock.c, and add kerneldoc
documentation.Signed-off-by: Paul Walmsley
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All of the clocks that are marked with DELAYED_APP are changed as part
of the virt_prcm_set OPP virtual clock. On 24xx, these clocks all
need to be changed as part of a group to keep the clock tree
functional - hence the need for the VALID_CONFIG bit, which is not
present on later OMAPs. These clocks should not be rate-changed
independently. So prevent these clocks from being changed
independently by dropping their .round_rate and .set_rate function
pointers. It then turns out that the DELAYED_APP clock flag is no
longer useful, so drop it and the associated code and renumber the
clock flags.Signed-off-by: Paul Walmsley
Cc: Richard Woodruff -
clock34xx_data.c now contains data for the OMAP34xx family, the
OMAP36xx family, and the OMAP3517 family, so rename it to
clock3xxx_data.c. Rename clock34xx.c to clock3xxx.c, and move the
chip family-specific clock functions to clock34xx.c, clock36xx.c, or
clock3517.c, as appropriate. So now "clock3xxx.*" refers to the OMAP3
superset.The main goal here is to prepare to compile chip family-specific clock
functions only for kernel builds that target that chip family. To get to
that point, we also need to add CONFIG_SOC_* options for those other
chip families; that will be done in future patches, planned for 2.6.35.OMAP4 is also affected by this. It duplicated the OMAP3 non-CORE DPLL
clkops structure. The OMAP4 variant of this clkops structure has been
removed, and since there was nothing else currently in clock44xx.c, it
too has been removed -- it can always be added back later when there
is some content for it. (The OMAP4 clock autogeneration scripts have been
updated accordingly.)Signed-off-by: Paul Walmsley
Cc: Benoît Cousson
Cc: Rajendra Nayak
Cc: Ranjith Lohithakshan
Cc: Tony Lindgren -
DPLL4 for 3630 introduces a changed block called j type dpll, requiring
special divisor bits and additional reg fields. To allow for silicons to
use this, this is introduced as a flag and is enabled for 3630 silicon.
OMAP4 also has j type dpll for usb.Tested with 3630 ZOOM3 and OMAP3430 ZOOM2
Signed-off-by: Richard Woodruff
Signed-off-by: Nishanth Menon
Signed-off-by: Vishwanath BS
[paul@pwsan.com: added some comments; updated copyrights and credits; fixed
some style issues]
Signed-off-by: Paul Walmsley -
Current implementation defines clock idle state indicators based on the
cpu information (cpu_is_omap24xx() or cpu_is_omap34xx()) in a system wide
manner. This patch extends the find_idlest() function in clkops to pass
back the idle state indicator for that clock, thus allowing idle state
indicators to be defined on a per clock basis if required.This is specifically needed on AM35xx devices as the new IPSS clocks
indicates the idle status (0 is idle, 1 is ready) in a way just
opposite to how its handled in OMAP3 (0 is ready, 1 is idle).Signed-off-by: Ranjith Lohithakshan
[paul@pwsan.com: updated to apply after commit 98c45457 et seq.]
Signed-off-by: Paul Walmsley
16 Feb, 2010
2 commits
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Convert ARCH_OMAP24XX to ARCH_OMAP2
Signed-off-by: Tony Lindgren
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Allows compiling in omap2 and omap3.
Signed-off-by: Tony Lindgren
30 Jan, 2010
2 commits
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Rename the omap2_clk_init() in the OMAP2, 3, and 4 clock code to be
omap2xxx_clk_init(), omap3xxx_clk_init(), etc. Remove all traces of
the (commented) old virt_prcm_set code from omap3xxx_clk_init() and
omap4xxx_clk_init(), since this will be handled with the OPP code that
is cooking in the PM branch.After this patch, there should be very little else in the clock code
that blocks a multi-OMAP 2+3 kernel. (OMAP2420+OMAP2430 still has some
outstanding issues that need to be resolved; this is pending on some
additions to the hwmod data.)Signed-off-by: Paul Walmsley
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omap2_clk_prepare_for_reboot() is only applicable to OMAP2xxx chips,
so rename it to omap2xxx_clk_prepare_for_reboot() and only call it when
running on OMAP2xxx chips. Remove the old stub in the OMAP3 clock code.Signed-off-by: Paul Walmsley
27 Jan, 2010
3 commits
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The struct clk_functions for OMAP2, 3, and 4 are all essentially the
same, so combine them. This removes one multi-OMAP kernel impediment
and saves memory on multi-OMAP builds.The stubs for omap2_clk_{init,exit}_cpufreq() code will removed once
the OPP layer code that's currently in Kevin's PM branch is merged.Signed-off-by: Paul Walmsley
Cc: Kevin Hilman -
Move all clksel-related clock functions from mach-omap2/clock.c to
mach-omap2/clkt_clksel.c. This is intended to make the clock code
easier to understand, since all of the functions needed to manage
clksel clocks are now located in their own file, rather than being
mixed with other, unrelated functions.Clock debugging is also now more finely-grained, since the DEBUG macro
can now be defined for clksel clocks alon. This should reduce
unnecessary console noise when debugging.Also, if at some future point the mach-omap2/ directory is split
into OMAP2/3/4 variants, this clkt file can be moved to the plat-omap/
directory to be shared.Thanks to Alexander Shishkin for his comments to
improve the patch description.Signed-off-by: Paul Walmsley
Cc: Alexander Shishkin -
One of the OMAP1 clocks can use the fixed divisor recalculation code
introduced in the OMAP2 clock code, so rename the
omap2_fixed_divisor_recalc() function to omap_fixed_divisor_recalc()
and make it available to all OMAPs. A followup patch converts the OMAP1
clock.Signed-off-by: Paul Walmsley
12 Dec, 2009
5 commits
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An api at init for all dpll nodes seem to be
needed to reparent the dpll clk node to its
bypass clk in case the dpll is in bypass.
If not done this causes sequencing issues at init
during propogate_rate.Signed-off-by: Rajendra Nayak
Signed-off-by: Paul Walmsley
Cc: Benoit Cousson -
Most of the dpll api's from dpll.c are reused for OMAP4.
This patch does extend a few api's for OMAP4 support.Signed-off-by: Rajendra Nayak
Signed-off-by: Paul Walmsley
Cc: Benoit Cousson -
This patch moves all the dpll control api's to a
common file dpll.c. This is in preperation of omap4
support wherein most of these api's can be reused.Signed-off-by: Rajendra Nayak
Signed-off-by: Paul Walmsley
Cc: Benoit Cousson -
The OMAP2 clock code currently #includes a large .h file full of static
data structures. Instead, define the data in a .c file.Russell King proposed this new arrangement:
http://marc.info/?l=linux-omap&m=125967425908895&w=2
This patch also deals with most of the flagrant checkpatch violations.
While here, separate the prcm_config data structures out into their own
files, opp2xxx.h and opp24{2,3}0_data.c, and only build in the OPP tables
for the target device. This should save some memory. In the long run,
these prcm_config tables should be replaced with OPP code.Signed-off-by: Paul Walmsley
Cc: Russell King
Cc: Richard Woodruff
Cc: Nishanth Menon -
The OMAP3 clock code currently #includes a large .h file full of static
data structures. Instead, define the data in a .c file.Russell King proposed this new arrangement:
http://marc.info/?l=linux-omap&m=125967425908895&w=2
Signed-off-by: Paul Walmsley
Cc: Russell King
21 Oct, 2009
1 commit
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Move the remaining headers under plat-omap/include/mach
to plat-omap/include/plat. Also search and replace the
files using these headers to include using the right path.This was done with:
#!/bin/bash
mach_dir_old="arch/arm/plat-omap/include/mach"
plat_dir_new="arch/arm/plat-omap/include/plat"
headers=$(cd $mach_dir_old && ls *.h)
omap_dirs="arch/arm/*omap*/ \
drivers/video/omap \
sound/soc/omap"
other_files="drivers/leds/leds-ams-delta.c \
drivers/mfd/menelaus.c \
drivers/mfd/twl4030-core.c \
drivers/mtd/nand/ams-delta.c"for header in $headers; do
old="#include
25 Jul, 2009
1 commit
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Some OMAP2/3 hardware modules have CM_IDLEST attributes that are not
handled by the current omap2_wait_clock_ready() code. In preparation
for patches that fix the unusual devices, rename the function
omap2_wait_clock_ready() to omap2_wait_module_ready() and split it
into three parts:1. A clkops-specific companion clock return function (by default,
omap2_clk_dflt_find_companion())2. A clkops-specific CM_IDLEST register address and bit shift return
function (by default, omap2_clk_dflt_find_idlest())3. Code to wait for the CM to indicate that the module is ready
(omap2_cm_wait_idlest())Clocks can now specify their own custom find_companion() and find_idlest()
functions; used in subsequent patches.Signed-off-by: Paul Walmsley
20 Feb, 2009
1 commit
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This roughly corresponds with OMAP commits: 7d06c48, 3241b19,
88b5d9b, 18a5500, 9c909ac, 5c6497b, 8b1f0bd, 2ac1da8.For both OMAP2 and OMAP3, we note the reference and bypass clocks in
the DPLL data structure. Whenever we modify the DPLL rate, we first
ensure that both the reference and bypass clocks are enabled. Then,
we decide whether to use the reference and DPLL, or the bypass clock
if the desired rate is identical to the bypass rate, and program the
DPLL appropriately. Finally, we update the clock's parent, and then
disable the unused clocks.This keeps the parents correctly balanced, and more importantly ensures
that the bypass clock is running whenever we reprogram the DPLL. This
is especially important because the procedure for reprogramming the DPLL
involves switching to the bypass clock.Signed-off-by: Russell King
14 Feb, 2009
1 commit
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linux-omap source commit 33d000c99ee393fe2042f93e8422f94976d276ce
introduces a way to "dry run" clock changes before they're committed.
However, this involves putting logic to handle this into each and
every recalc function, and unfortunately due to the caching, led to
some bugs.Solve both of issues by making the recalc methods always return the
clock rate for the clock, which the caller decides what to do with.Signed-off-by: Russell King
09 Feb, 2009
1 commit
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Fix sparse & checkpatch warnings in OMAP2/3 PRCM & PM code. This mostly
consists of:- converting pointer comparisons to integers in form similar to
(ptr == 0) to the standard idiom (!ptr)- labeling a few non-static private functions as static
- adding prototypes for *_init() functions in the appropriate header
files, and getting rid of the corresponding open-coded extern
prototypes in other C files- renaming the variable 'sclk' in mach-omap2/clock.c:omap2_get_apll_clkin
to avoid shadowing an earlier declarationClean up checkpatch issues. This mostly involves:
- converting some asm/ includes to linux/ includes
- cleaning up some whitespace
- getting rid of braces for conditionals with single following statements
Also take care of a few odds and ends, including:
- getting rid of unlikely() and likely() - none of this code is particularly
fast-path code, so the performance impact seems slim; and some of those
likely() and unlikely() indicators are probably not as accurate as the
ARM's branch predictor- removing some superfluous casts
linux-omap source commit is 347df59f5d20fdf905afbc26b1328b0e28a8a01b.
Signed-off-by: Paul Walmsley
Signed-off-by: Tony Lindgren
Signed-off-by: Russell King
08 Feb, 2009
2 commits
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Rather than employing run-time tests in omap2_clk_wait_ready() to
decide whether we need to wait for the clock to become ready, we
can set the .ops appropriately.This change deals with the OMAP24xx and OMAP34xx conditionals only.
Signed-off-by: Russell King
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Signed-off-by: Russell King
06 Oct, 2008
1 commit
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Misc updates from linux-omap tree, mostly to update common
device initialization and add missing defines from linux-omap
tree. Also some changes to make room for adding 34xx in
following patches.Note that the I2C resources are now set up in
arch/arm/plat-omap/i2c.c helper, and can be removed
from devices.c.Signed-off-by: Tony Lindgren
19 Aug, 2008
1 commit
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This patch integrates the OMAP3 clock tree with the clockdomain code.
This patch:- marks OMAP34xx clocks with their corresponding clockdomain.
- adds code to convert the clockdomain name to a clockdomain pointer in the
struct clk during clk_register().- modifies OMAP2 clock usecounting to call into the clockdomain code
when clocks are enabled or disabled.Signed-off-by: Paul Walmsley
Signed-off-by: Tony Lindgren