20 Sep, 2011
1 commit
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dma_async_device_register will re-init chan_id and chancnt,
so whatever chan_id and chancnt are set in drivers, they will
be re-written by dma_async_device_register.Cc: Nicolas Ferre
Cc: Viresh Kumar
Cc: Vinod Koul
Cc: Piotr Ziecik
Cc: Yong Wang
Cc: Jaswinder Singh
Cc: Pelagicore AB
Signed-off-by: Barry Song
Acked-by: Viresh Kumar
Signed-off-by: Vinod Koul
19 Aug, 2011
4 commits
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In this driver, we can trigger cyclic transfer on peripherals-DMA interfaces.
It is dependent on driver implementation but cannot depend on a platform
property: we remove the dma_has_cap(DMA_CYCLIC, ) test which has no meaning.Signed-off-by: Nicolas Ferre
Signed-off-by: Vinod Koul -
Cyclic property and paused state are encoded as bits in the channel status
bitfield. Tests of those bits are wrapped in convenient helper functions.Signed-off-by: Nicolas Ferre
Signed-off-by: Vinod Koul -
Save/restore dma controller state across a suspend-resume sequence.
The prepare() function will wait for the non-cyclic channels to become idle.
It also deals with cyclic operations with the start at next period while
resuming.Signed-off-by: Nicolas Ferre
Signed-off-by: Uwe Kleine-König
Signed-off-by: Vinod Koul -
dmaengine routines can be called from interrupt context and with
interrupts disabled. Whereas spin_unlock_bh can't be called from
such contexts. So this patch converts all spin_lock* routines
to irqsave variants.Also, spin_lock() used in tasklet is converted to irqsave variants,
as tasklet can be interrupted, and dma requests from such interruptions
may also call spin_lock.Idea from dw_dmac patch by Viresh Kumar.
Signed-off-by: Nicolas Ferre
Signed-off-by: Uwe Kleine-König
Signed-off-by: Vinod Koul
06 Jun, 2011
1 commit
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Signed-off-by: H Hartley Sweeten
Cc: Dan Williams
Cc: Vinod Koul
Signed-off-by: Vinod Koul
29 May, 2011
1 commit
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* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (33 commits)
x86: poll waiting for I/OAT DMA channel status
maintainers: add dma engine tree details
dmaengine: add TODO items for future work on dma drivers
dmaengine: Add API documentation for slave dma usage
dmaengine/dw_dmac: Update maintainer-ship
dmaengine: move link order
dmaengine/dw_dmac: implement pause and resume in dwc_control
dmaengine/dw_dmac: Replace spin_lock* with irqsave variants and enable submission from callback
dmaengine/dw_dmac: Divide one sg to many desc, if sg len is greater than DWC_MAX_COUNT
dmaengine/dw_dmac: set residue as total len in dwc_tx_status if status is !DMA_SUCCESS
dmaengine/dw_dmac: don't call callback routine in case dmaengine_terminate_all() is called
dmaengine: at_hdmac: pause: no need to wait for FIFO empty
pch_dma: modify pci device table definition
pch_dma: Support new device ML7223 IOH
pch_dma: Support I2S for ML7213 IOH
pch_dma: Fix DMA setting issue
pch_dma: modify for checkpatch
pch_dma: fix dma direction issue for ML7213 IOH video-in
dmaengine: at_hdmac: use descriptor chaining help function
dmaengine: at_hdmac: implement pause and resume in atc_control
...Fix up trivial conflict in drivers/dma/dw_dmac.c
12 May, 2011
1 commit
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With the addition of the "pause" feature, an active wait was introduced
to check the "FIFO empty" event. This event was not always happening and
a timout contition was needed.
But, in some cases, this event depend on the peripheral connected to the
channel that is paused: FIFO becomes empty if the peripheral consumes data.
The timeout is pretty difficult to evaluate. Moreover, this check is not
needed.
In conclusion, it seems sensible to entirely remove the checking of
"FIFO empty" status when pausing.Signed-off-by: Nicolas Ferre
[commit msg edited for grammer]
Signed-off-by: Vinod Koul
09 May, 2011
3 commits
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A little function helps to chain descriptors:
it is already used in cyclic dma operations, now use it in memcpy and slave_sg
preparation functions.Signed-off-by: Nicolas Ferre
Signed-off-by: Vinod Koul -
Pause and resume controls are useful for audio devices. This also returns
correct status from atc_tx_status() in case chan is paused.Idea from dw_dmac patch by Linus Walleij.
Signed-off-by: Nicolas Ferre
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul -
If transfer status is !=DMA_SUCCESS, return total transfer len as residue,
instead of zero.Idea from dw_dmac patch by Viresh Kumar.
Signed-off-by: Nicolas Ferre
Signed-off-by: Vinod Koul
02 May, 2011
5 commits
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DMA controller has two AHB interfaces on the SOC internal
matrix.
It is more efficient to specialize each interface as the
access to memory can introduce latencies that are not compatible
with peripheral accesses requirements.Signed-off-by: Nicolas Ferre
Signed-off-by: Vinod Koul -
There is no need to test if channel is enabled in tasklet:
- in error path, channel is disabled in interrupt routine
- in normal path, this test is performed in sub functions to report
a misuse of the engine.Signed-off-by: Nicolas Ferre
Signed-off-by: Vinod Koul -
Signed-off-by: Nicolas Ferre
Signed-off-by: Vinod Koul -
Signed-off-by: Nicolas Ferre
Signed-off-by: Vinod Koul -
Now we use Buffer Transfer Completed interrupts. If we
want a chained buffer completed information, we setup the
ATC_IEN bit in CTRLB register in the lli.
This is done by set_desc_eol() function and used by
memcpy/slave_sg functions.Signed-off-by: Nicolas Ferre
Signed-off-by: Vinod Koul
31 Mar, 2011
1 commit
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Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi
18 Jan, 2011
1 commit
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* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (63 commits)
ARM: PL08x: cleanup comments
Update CONFIG_MD_RAID6_PQ to CONFIG_RAID6_PQ in drivers/dma/iop-adma.c
ARM: PL08x: fix a warning
Fix dmaengine_submit() return type
dmaengine: at_hdmac: fix race while monitoring channel status
dmaengine: at_hdmac: flags located in first descriptor
dmaengine: at_hdmac: use subsys_initcall instead of module_init
dmaengine: at_hdmac: no need set ACK in new descriptor
dmaengine: at_hdmac: trivial add precision to unmapping comment
dmaengine: at_hdmac: use dma_address to program DMA hardware
pch_dma: support new device ML7213 IOH
ARM: PL08x: prevent dma_set_runtime_config() reconfiguring memcpy channels
ARM: PL08x: allow dma_set_runtime_config() to return errors
ARM: PL08x: fix locking between prepare function and submit function
ARM: PL08x: introduce 'phychan_hold' to hold on to physical channels
ARM: PL08x: put txd's on the pending list in pl08x_tx_submit()
ARM: PL08x: rename 'desc_list' as 'pend_list'
ARM: PL08x: implement unmapping of memcpy buffers
ARM: PL08x: store prep_* flags in async_tx structure
ARM: PL08x: shrink srcbus/dstbus in txd structure
...
15 Jan, 2011
6 commits
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We were reading channel status then taking a lock. This lead to a race because
this lock may delay us and then make this channel not idle anymore.Signed-off-by: Nicolas Ferre
Signed-off-by: Dan Williams -
Place flags on first descriptor of chain instead of last.
This is the one used by atc_chain_complete() function while unmapping.Signed-off-by: Nicolas Ferre
Signed-off-by: Dan Williams -
Use subsys_initcall instead of module_init in order to keep DMA engine rolling
before other peripheral drivers.Signed-off-by: Eric Xu
Signed-off-by: Nicolas Ferre
Signed-off-by: Dan Williams -
Following descriptor flow in at_hdmac driver, descriptor comming from
atc_desc_get() as already DMA_CTRL_ACK flag set. No need to set it again.Signed-off-by: Nicolas Ferre
Signed-off-by: Dan Williams -
Signed-off-by: Nicolas Ferre
Signed-off-by: Dan Williams -
In atc_prep_slave_sg() function we use dma_address field of scatterlist with
sg_dma_address() macro instead of sg_phys(). DMA address is already computed
by dma_map_sg() or another mapping function in calling driver.Signed-off-by: Nicolas Ferre
Signed-off-by: Dan Williams
14 Dec, 2010
1 commit
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Buffer transfer size is the number of transfers to be performed in
relation with the width of the _source_ interface.
So in the DMA_FROM_DEVICE case, it should be the register width that
should be taken into account.Signed-off-by: Nicolas Ferre
Signed-off-by: Dan Williams
10 Aug, 2010
1 commit
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* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (30 commits)
DMAENGINE: at_hdmac: locking fixlet
DMAENGINE: pch_dma: kill another usage of __raw_{read|write}l
dma: dmatest: fix potential sign bug
ioat2: catch and recover from broken vtd configurations v6
DMAENGINE: add runtime slave control to COH 901 318 v3
DMAENGINE: add runtime slave config to DMA40 v3
DMAENGINE: generic slave channel control v3
dmaengine: Driver for Topcliff PCH DMA controller
intel_mid: Add Mrst & Mfld DMA Drivers
drivers/dma: Eliminate a NULL pointer dereference
dma/timb_dma: compile warning on 32 bit
DMAENGINE: ste_dma40: support older silicon
DMAENGINE: ste_dma40: support disabling physical channels
DMAENGINE: ste_dma40: no disabled phy channels on ux500
DMAENGINE: ste_dma40: fix suspend bug
DMAENGINE: ste_dma40: add DB8500 memcpy channels
DMAENGINE: ste_dma40: no flow control on memcpy
DMAENGINE: ste_dma40: arch updates for LCLA and LCPA
DMAENGINE: ste_dma40: allocate LCLA dynamically
DMAENGINE: ste_dma40: no premature stop
...Fix up trivial conflicts in arch/arm/mach-ux500/devices-db8500.c
05 Aug, 2010
1 commit
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atc_chain_complete shall be called with atchan->lock held
and bh disabled.Signed-off-by: Yong Wang
Signed-off-by: Dan Williams
17 Jun, 2010
2 commits
-
Signed-off-by: Uwe Kleine-König
Signed-off-by: Jiri Kosina
18 May, 2010
2 commits
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This adds an argument to the DMAengine control function, so that
we can later provide control commands that need some external data
passed in through an argument akin to the ioctl() operation
prototype.[dan.j.williams@intel.com: fix up some missed conversions]
Signed-off-by: Linus Walleij
Signed-off-by: Dan Williams
30 Mar, 2010
1 commit
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…it slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
27 Mar, 2010
3 commits
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Simple conditional struct filler to cut out some duplicated code.
Signed-off-by: Dan Williams
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Convert the device_is_tx_complete() operation on the
DMA engine to a generic device_tx_status()operation which
can return three states, DMA_TX_RUNNING, DMA_TX_COMPLETE,
DMA_TX_PAUSED.[dan.j.williams@intel.com: update for timberdale]
Signed-off-by: Linus Walleij
Acked-by: Mark Brown
Cc: Maciej Sosnowski
Cc: Nicolas Ferre
Cc: Pavel Machek
Cc: Li Yang
Cc: Guennadi Liakhovetski
Cc: Paul Mundt
Cc: Ralf Baechle
Cc: Haavard Skinnemoen
Cc: Magnus Damm
Cc: Liam Girdwood
Cc: Joe Perches
Cc: Roland Dreier
Signed-off-by: Dan Williams -
Convert the device_terminate_all() operation on the
DMA engine to a generic device_control() operation
which can now optionally support also pausing and
resuming DMA on a certain channel. Implemented for the
COH 901 318 DMAC as an example.[dan.j.williams@intel.com: update for timberdale]
Signed-off-by: Linus Walleij
Acked-by: Mark Brown
Cc: Maciej Sosnowski
Cc: Nicolas Ferre
Cc: Pavel Machek
Cc: Li Yang
Cc: Guennadi Liakhovetski
Cc: Paul Mundt
Cc: Ralf Baechle
Cc: Haavard Skinnemoen
Cc: Magnus Damm
Cc: Liam Girdwood
Cc: Joe Perches
Cc: Roland Dreier
Signed-off-by: Dan Williams
31 Dec, 2009
1 commit
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* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:
drivers/dma: Correct use after free
drivers/dma: drop unnecesary memset
ioat2,3: put channel hardware in known state at init
async_tx: expand async raid6 test to cover ioatdma corner case
ioat3: fix p-disabled q-continuation
sh: fix DMA driver's descriptor chaining and cookie assignment
dma: at_hdmac: correct incompatible type for argument 1 of 'spin_lock_bh'
17 Dec, 2009
1 commit
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Correct a typo error in locking calls.
Cc:
Signed-off-by: Nicolas Ferre
Signed-off-by: Dan Williams
16 Dec, 2009
1 commit
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Signed-off-by: Alexey Dobriyan
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
04 Dec, 2009
1 commit
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That is "success", "unknown", "through", "performance", "[re|un]mapping"
, "access", "default", "reasonable", "[con]currently", "temperature"
, "channel", "[un]used", "application", "example","hierarchy", "therefore"
, "[over|under]flow", "contiguous", "threshold", "enough" and others.Signed-off-by: André Goddard Rosa
Signed-off-by: Jiri Kosina
23 Sep, 2009
1 commit
