01 Sep, 2016

3 commits

  • The compatible DDR controllers may support DDR, DDR2, DDR3, DDR4 DRAM.
    An individual controller doesn't support all of them. The EDAC driver
    reads SDRAM_CFG to determine which mode is configured.

    Add DDR4 and drop the defines used only in the mtype assignment.

    Signed-off-by: York Sun
    Cc: linux-edac
    Cc: morbidrsa@gmail.com
    Cc: oss@buserror.net
    Cc: stuart.yoder@nxp.com
    Link: http://lkml.kernel.org/r/1470779760-16483-6-git-send-email-york.sun@nxp.com
    Signed-off-by: Borislav Petkov

    York Sun
     
  • Use FSL-specific prefix for macros, variables and functions.

    Signed-off-by: York Sun
    Cc: Johannes Thumshirn
    Cc: linux-edac
    Cc: oss@buserror.net
    Cc: stuart.yoder@nxp.com
    Link: http://lkml.kernel.org/r/1470779760-16483-5-git-send-email-york.sun@nxp.com
    Signed-off-by: Borislav Petkov

    York Sun
     
  • The mpc85xx-compatible DDR controllers are used on ARM-based SoCs too.
    Carve out the DDR part from the mpc85xx EDAC driver in preparation to
    support both architectures.

    Signed-off-by: York Sun
    Cc: Johannes Thumshirn
    Cc: linux-edac
    Cc: oss@buserror.net
    Cc: stuart.yoder@nxp.com
    Link: http://lkml.kernel.org/r/1470946525-3410-1-git-send-email-york.sun@nxp.com
    Signed-off-by: Borislav Petkov

    York Sun