16 Jun, 2015

1 commit


02 Jun, 2015

1 commit

  • The CrystalCove GPIO irqchip doesn't have irq_set_wake callback defined
    so we should set IRQCHIP_SKIP_SET_WAKE for it or it would cause an irq
    desc's wake_depth unbalanced warning during system resume phase from the
    gpio_keys driver, which is the driver for the power button of the ASUS
    T100 laptop.

    Signed-off-by: Aaron Lu
    Cc:
    Signed-off-by: Linus Walleij

    Aaron Lu
     

12 May, 2015

1 commit


26 Mar, 2015

1 commit

  • Export PANEL_EN/DISABLE (offset 0x52) as additional GPIO. Needed
    by display driver to enable the DSI panel on BYT platform where
    the Panel EN/Disable control is routed thorugh CRC PMIC

    CC: Samuel Ortiz
    Cc: Linus Walleij
    Cc: Alexandre Courbot
    Cc: Thierry Reding
    Acked-by: Daniel Vetter
    Signed-off-by: Shobhit Kumar
    Signed-off-by: Linus Walleij

    Shobhit Kumar
     

14 Jan, 2015

1 commit

  • The CrystalCove GPIO chip has can_sleep set so its demultiplexed irqs
    will have IRQ_NESTED_THREAD flag set, thus we should use the nested
    version handle_nested_irq in CrystalCove's irq handler instead of
    handle_generic_irq, or the following warning will be hit and the
    functionality is lost:

    [ 4089.639554] Hardware name: ASUSTeK COMPUTER INC. T100TA/T100TA, BIOS T100TA.313 08/13/2014
    [ 4089.639564] 00000002 00000000 c24fbdf4 c16e0257 c24fbe38 c24fbe28 c105390c c18ec480
    [ 4089.639596] c24fbe54 00000048 c18f8e3b 00000295 c10a60fc 00000295 c10a60fc f4464540
    [ 4089.639626] f446459c c278ad40 c24fbe40 c1053974 00000009 c24fbe38 c18ec480 c24fbe54
    [ 4089.639656] Call Trace:
    [ 4089.639685] [] dump_stack+0x41/0x52
    [ 4089.639707] [] warn_slowpath_common+0x8c/0xc0
    [ 4089.639727] [] ? irq_nested_primary_handler+0x2c/0x30
    [ 4089.639744] [] ? irq_nested_primary_handler+0x2c/0x30
    [ 4089.639763] [] warn_slowpath_fmt+0x34/0x40
    [ 4089.639781] [] irq_nested_primary_handler+0x2c/0x30
    [ 4089.639800] [] handle_irq_event_percpu+0x76/0x190
    [ 4089.639818] [] ? regmap_format_10_14_write+0x30/0x30
    [ 4089.639836] [] ? _regmap_bus_raw_write+0x4c/0x70
    [ 4089.639854] [] handle_irq_event+0x31/0x50
    [ 4089.639872] [] handle_simple_irq+0x4b/0x70
    [ 4089.639889] [] generic_handle_irq+0x24/0x40
    [ 4089.639908] [] crystalcove_gpio_irq_handler+0xa7/0xc0
    [ 4089.639927] [] handle_nested_irq+0x77/0x190
    [ 4089.639947] [] regmap_irq_thread+0x1b1/0x360
    [ 4089.639966] [] irq_thread_fn+0x18/0x30
    [ 4089.639983] [] irq_thread+0xf6/0x110
    [ 4089.640001] [] ? irq_finalize_oneshot.part.30+0x1b0/0x1b0
    [ 4089.640019] [] ? irq_forced_thread_fn+0x50/0x50
    [ 4089.640037] [] ? irq_thread_check_affinity+0xc0/0xc0
    [ 4089.640054] [] kthread+0xa9/0xc0
    [ 4089.640074] [] ret_from_kernel_thread+0x21/0x30
    [ 4089.640091] [] ? kthread_create_on_node+0x110/0x110
    [ 4089.640105] ---[ end trace dca7946ad31eba7d ]---

    Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=90521
    Reported-and-tested-by: Brian Loften
    Cc: Stable
    Signed-off-by: Aaron Lu
    Signed-off-by: Linus Walleij

    Aaron Lu
     

20 Oct, 2014

1 commit


25 Sep, 2014

1 commit

  • The virtual GPIO introduced in ACPI table of Baytrail-T based system is
    used to solve a problem under Windows. We do not have such problems
    under Linux so we do not actually need them. But we have to tell GPIO
    library that the Crystal Cove GPIO chip has this many GPIO pins or the
    common GPIO handler will refuse any access to those high number GPIO
    pins, which will resulted in a failure evaluation of every ACPI control
    method that is used to turn on/off power resource and/or report sensor
    temperatures.

    Signed-off-by: Aaron Lu
    Reviewed-by: Mika Westerberg
    [changed vgpio number from 0x5e to 94]
    Signed-off-by: Linus Walleij

    Aaron Lu
     

23 Sep, 2014

1 commit


19 Jun, 2014

1 commit


17 Jun, 2014

1 commit

  • Devices based on Intel SoC products such as Baytrail have a Power
    Management IC. In the PMIC there are subsystems for voltage regulation,
    A/D conversion, GPIO and PWMs. The PMIC in Baytrail-T platform is
    called Crystal Cove.

    This patch adds support for the GPIO function in Crystal Cove.

    Signed-off-by: Yang, Bin
    Signed-off-by: Zhu, Lejun
    Reviewed-by: Mika Westerberg
    Reviewed-by: Alexandre Courbot
    Reviewed-by: Linus Walleij
    Signed-off-by: Lee Jones

    Zhu, Lejun