16 Oct, 2007
1 commit
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Commit 5a7ad7f044941316dc98eda2a087a12a7a50649d removed all uses of
'retval', but didn't remove the variable itself.Signed-off-by: Linus Torvalds
15 Oct, 2007
1 commit
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Signed-off-by: Al Viro
Signed-off-by: Linus Torvalds
13 Oct, 2007
33 commits
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* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (37 commits)
PCI: merge almost all of pci_32.h and pci_64.h together
PCI: X86: Introduce and enable PCI domain support
PCI: Add 'nodomains' boot option, and pci_domains_supported global
PCI: modify PCI bridge control ISA flag for clarity
PCI: use _CRS for PCI resource allocation
PCI: avoid P2P prefetch window for expansion ROMs
PCI: skip ISA ioresource alignment on some systems
PCI: remove transparent bridge sizing
pci: write file size to inode on proc bus file write
pci: use size stored in proc_dir_entry for proc bus files
pci: implement "pci=noaer"
PCI: fix IDE legacy mode resources
MSI: Use correct data offset for 32-bit MSI in read_msi_msg()
PCI: Fix incorrect argument order to list_add_tail() in PCI dynamic ID code
PCI: i386: Compaq EVO N800c needs PCI bus renumbering
PCI: Remove no longer correct documentation regarding MSI vector assignment
PCI: re-enable onboard sound on "MSI K8T Neo2-FIR"
PCI: quirk_vt82c586_acpi: Omit reading PCI revision ID
PCI: quirk amd_8131_mmrbc: Omit reading pci revision ID
cpqphp: Use PCI_CLASS_REVISION instead of PCI_REVISION_ID for read
... -
* Introduce pci_domains_supported global, hardcoded to zero if
!CONFIG_PCI_DOMAINS.* Introduce 'nodomains' boot option, which clears pci_domains_supported
on platforms that enable it by default (x86, x86-64, and others when
they are converted to use this).Signed-off-by: Jeff Garzik
Cc: Andi Kleen
Signed-off-by: Greg Kroah-Hartman -
Modify PCI Bridge Control ISA flag for clarity
This patch changes PCI_BRIDGE_CTL_NO_ISA to PCI_BRIDGE_CTL_ISA
and modifies it's clarifying comment and locations where used.
The change reduces the chance of future confusion since it makes
the set/unset meaning of the bit the same in both the bridge
control register and bridge_ctl field of the pci_bus struct.Signed-off-by: Gary Hade
Acked-by: Linas Vepstas
Cc: Ivan Kokshaysky
Signed-off-by: Greg Kroah-Hartman -
Avoid creating P2P prefetch window for expansion ROMs
Because of the future possibility that P2P prefetch windows will contain
address ranges above 4GB some BIOSes are providing space in the P2P
non-prefetch windows for expansion ROMs. This is due to expansion ROM
BAR 32-bit limitation. When expansion ROM BARs without BIOS assigned
address(es) are currently found behind a P2P bridge, the kernel attempts
to create a P2P prefetch window for them even though space for them has
already been provided in the non-prefetch window. _CRS on some systems
with certain resource conservation conscious BIOSes may not provide the
extra 1MB or more memory resource needed for the expansion ROM motivated
prefetch window causing resource allocation errors.This change corrects the problem by removing IORESOURCE_PREFETCH from
the expansion ROM flags initialization. It also removes
IORESOURCE_CACHEABLE which seems inappropriate if only non-cacheable
memory is available.Signed-off-by: Gary Hade
Signed-off-by: Greg Kroah-Hartman -
Skip ISA ioresource alignment on some systems
To conserve limited PCI i/o resource on some IBM multi-node systems, the
BIOS allocates (via _CRS) and expects the kernel to use addresses in
ranges currently excluded by pcibios_align_resource() [i386/pci/i386.c].
This change allows the kernel to use the currently excluded address
ranges on the IBM x3800, x3850, and x3950.Signed-off-by: Gary Hade
Signed-off-by: Greg Kroah-Hartman -
Remove transparent bridge sizing.
Due to code in pci_read_bridge_bases() [drivers/pci/probe.c] the child
bus of a transparent bridge already has access to the parent bus
resources so transparent bridge sizing appears unnecessary. The bridge
sizing includes alignment and granularity adjustments that can cause
significantly more memory to be reserved from the parant bus than
required by devices on the child bus and allotted by _CRS.Signed-off-by: Gary Hade
Signed-off-by: Greg Kroah-Hartman -
When a /proc/bus/pci file is written to, the size of that PCI device's
configuration space must be written to the inode. Otherwise, it is
possible for the file to specify a size of 0 on stat if a task is holding
the same file open.Signed-off-by: David Rientjes
Signed-off-by: Greg Kroah-Hartman -
On pci_proc_attach_device(), the size of the PCI configuration space is
stored in the proc_dir_entry as the size of the file. Thus, the procfs
interface to PCI devices should use it instead of the device directly.Signed-off-by: David Rientjes
Signed-off-by: Greg Kroah-Hartman -
For cases in which CONFIG_PCIEAER=y (such as distro kernels), allow users
to disable PCIE Advanced Error Reporting by using "pci=noaer" on the
kernel command line.This can be used to work around hardware or (kernel) software problems.
Signed-off-by: Randy Dunlap
Signed-off-by: Greg Kroah-Hartman -
I got the following error on MIPS Cobalt.
PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1
pata_via 0000:00:09.1: failed to request/iomap BARs for port 0 (errno=-16)
PCI: Unable to reserve I/O region #3:8@f0000170 for device 0000:00:09.1
pata_via 0000:00:09.1: failed to request/iomap BARs for port 1 (errno=-16)
pata_via 0000:00:09.1: no available native portThe legacy mode IDE resources set the following order.
pci_setup_device()
Legacy mode ATA controllers have fixed addresses.
IDE resources: 0x1F0-0x1F7, 0x3F6, 0x170-0x177, 0x376
|
V
pcibios_fixup_bus()
MIPS Cobalt PCI bus regions have the -0x10000000 offset from PCI resources.
pcibios_fixup_bus() fix PCI bus regions.
0x1F0 - 0x10000000 = 0xF00001F0
|
V
ata_pci_init_one()
PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1In some architectures, PCI bus regions have the offset from PCI resources.
For this reason, pci_setup_device() should set PCI bus regions to
dev->resource[].[akpm@linux-foundation.org: use struct initialiser]
Signed-off-by: Yoichi Yuasa
Cc: Alan Cox
Cc: Greg KH
Cc: Bartlomiej Zolnierkiewicz
Cc: Ralf Baechle
Signed-off-by: Andrew Morton
Signed-off-by: Greg Kroah-Hartman -
While reading the MSI code trying to find a reason why MSI wouldn't
work for devices that have a 32-bit MSI address capability, I noticed
that read_msi_msg() seems to read the message data from the wrong
offset in this case.Signed-off-by: Roland Dreier
Acked-by: Eric W. Biederman
Cc: stable
Signed-off-by: Greg Kroah-Hartman -
The code for dynamically assigning new ids to PCI drivers,
store_new_id(), calls list_add_tail() with the list head and new node
arguments in reversed order.The result is that every new id written essentially overwrites the
previous list of ids.Caught with the help of Rusty's "horribly bad" list_node patch:
http://lkml.org/lkml/2007/6/10/10Signed-off-by: Michael Ellerman
Signed-off-by: Greg Kroah-Hartman -
On the "MSI K8T Neo2-FIR" board the BIOS disables the onboard
soundcard, if a second PCI soundcard is present.This patch sets the korrect register bit to enable the onboard sound.
Removed old code in /drivers/pci/quirks.c that only checks for the
PCI-ID and fires on any Board with VIA 8237.New code in /arch/i386/pci/fixup.c checks the DMI-tables and only runs
on the specific board.Signed-off-by: Johannes Goecke
Acked-by: Jean Delvare
Signed-off-by: Greg Kroah-Hartman -
Signed-off-by: Auke Kok
Signed-off-by: Greg Kroah-Hartman -
Signed-off-by: Auke Kok
Cc: Peter Oruba
Signed-off-by: Greg Kroah-Hartman -
While PCI_CLASS_REVISION and PCI_REVISION_ID are identical, the
code here discards the revision content and is only interested in
the class number.Signed-off-by: Auke Kok
Cc: Krosten Accardi
Signed-off-by: Greg Kroah-Hartman -
Signed-off-by: Christoph Hellwig
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
Convert ibmphp to new kthread api
Signed-off-by: Kristen Carlson Accardi
Cc: Christoph Hellwig
Signed-off-by: Greg Kroah-Hartman -
Replacing n & (n - 1) for power of 2 check by is_power_of_2(n)
Signed-off-by: vignesh babu
Signed-off-by: Greg Kroah-Hartman -
Minor cleanups for pciehp_hpc.c. The 80 column rules, removing
unnecessary lines, and so on.Signed-off-by: Kenji Kaneshige
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
Remove trailing whitespaces from pciehp_pci.c.
Signed-off-by: Kenji Kaneshige
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
Remove trailing whitespaces from pciehp_ctrl.c.
Signed-off-by: Kenji Kaneshige
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
Remove trailing whitespaces from pciehp_core.c.
Signed-off-by: Kenji Kaneshige
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
Remove trailing whitespaces from pciehp_hpc.c.
Signed-off-by: Kenji Kaneshige
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
This patch removes DBG_ENTER_ROUTIN, DBG_LEAVE_ROUTINE and related
code, which seem no longer needed.Signed-off-by: Kenji Kaneshige
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
According to the PCI firmware spec (3.0), the OS must claim control
over the PCI Express Capability bits in addition to the PCI Express
Native Hot Plug feature when executing _OSC.Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
When removing a device with a bridge on it, only read the
bridge control register if the adapter is actually present.Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
Remove unnecessary CONFIG_HOTPLUG_PCI_PCIE_EVENT_MODE.
The CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE option is not needed
because polling mechanism can be enabled through 'pciehp_poll_mode'
module option.Signed-off-by: Kenji Kaneshige
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
drivers/pci/hotplug/cpqphp_ctrl.c | 79698 -> 79638 (-60 bytes)
drivers/pci/hotplug/cpqphp_ctrl.o | 192896 -> 192736 (-160 bytes)Signed-off-by: Mariusz Kozlowski
Signed-off-by: Greg Kroah-Hartman -
sysfs_update_file() depends on inode->i_mtime but sysfs iondes are now
reclaimable making the reported modification time unreliable. There's
only one user (pci hotplug) of this notification mechanism and it
reportedly isn't utilized from userland.Kill sysfs_update_file().
Signed-off-by: Tejun Heo
Acked-by: Cornelia Huck
Signed-off-by: Greg Kroah-Hartman -
A kset should not have its name set directly, so dynamically set the
name at runtime.This is needed to remove the static array in the kobject structure which
will be changed in a future patch.Signed-off-by: Greg Kroah-Hartman
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A number of different drivers incorrect access the kobject name field
directly. This is not correct as the name might not be in the array.
Use the proper accessor function instead. -
This changes the uevent buffer functions to use a struct instead of a
long list of parameters. It does no longer require the caller to do the
proper buffer termination and size accounting, which is currently wrong
in some places. It fixes a known bug where parts of the uevent
environment are overwritten because of wrong index calculations.Many thanks to Mathieu Desnoyers for finding bugs and improving the
error handling.Signed-off-by: Kay Sievers
Cc: Mathieu Desnoyers
Cc: Cornelia Huck
Signed-off-by: Greg Kroah-Hartman
11 Oct, 2007
1 commit
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Signed-off-by: Thomas Gleixner
Signed-off-by: Ingo Molnar
29 Sep, 2007
1 commit
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Linas reported me that some machines were crashing at boot in
quirk_e100_interrupt. It appears that this quirk is doing an ioremap
directly on a PCI BAR value, which isn't legal and will cause all sorts
of bad things to happen on architectures where PCI BARs don't directly
match processor bus addresses.This fixes it by using the proper PCI resources instead which is possible
since the quirk has been moved by a previous commit to happen late enough
for that.Signed-off-by: Benjamin Herrenschmidt
Acked-by: Linas Vepstas
Signed-off-by: Linus Torvalds
11 Sep, 2007
2 commits
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PCI quirk to unhide SMBus on Compaq Deskpro EP 401963-001 (PCA# 010174) motherboard.
Signed-off-by: Greg White
Acked-by: Jean Delvare
Signed-off-by: Greg Kroah-Hartman -
On MIPS with PCI && !HOTPLUG, I'm currently getting the following modpost
warning:MODPOST vmlinux.o
WARNING: vmlinux.o(.text+0x1ce128): Section mismatch: reference to .init.text:pci_read_bridge_bases (between 'pcibios_fixup_bus' and 'pcibios_enable_device')On MIPS I have the call chains pci_scan_child_bus -> pcibios_fixup_bus ->
pci_read_bridge_bases. pci_scan_child_bus can't be __devinit because it
it is an exported symbol, thus pcibios_fixup_bus and pci_read_bridge_bases
can't be either.For some reason I don't see this issue on x86; I blame compiler differences.
Signed-off-by: Ralf Baechle
Signed-off-by: Greg Kroah-Hartman
25 Aug, 2007
1 commit
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Conflicts:
drivers/acpi/video.c
Signed-off-by: Len Brown
