08 Nov, 2017

1 commit


08 Jul, 2017

1 commit

  • Pull MFD updates from Lee Jones:
    "New Drivers:
    - Intel Cherry Trail Whiskey Cove PMIC
    - TI LP87565 PMIC

    New Device Support:
    - Add support for Cannonlake to intel-lpss-pci
    - Add support for Simatic IOT2000 to intel_quark_i2c_gpio

    New Functionality:
    - Add Regulator support (axp20x)

    Fix-ups:
    - Rework IRQ handling (intel_soc_pmic_bxtwc, rtsx_pcr, cros_ec)
    - Remove unused/unwelcome code (ipaq-micro, wm831x-core, da9062-core)
    - Provide deregistration on unbind (rn5t618)
    - Rework DT code/documentation (arizona)
    - Constify things (fsl-imx25-tsadc)
    - MAINTAINERS updates (DA9062/61)
    - Kconfig configuration adaptions (INTEL_SOC_PMIC, MFD_AXP20X_I2C)
    - Switch to DMI matching (intel_quark_i2c_gpio)
    - Provide an appropriate level of error checking (wm831x-{i2c,spi},
    twl4030-irq, tc6393xb)
    - Make use of devm_* (resource handling) calls (intel_soc_pmic_bxtwc,
    stm32-timers, atmel-flexcom, cros_ec, fsl-imx25-tsadc,
    exynos-lpass, palmas, qcom-spmi-pmic, smsc-ece1099,
    motorola-cpcap)"

    [ Skipped the last commit in that series that added eight thousand
    lines of pointless repeated register definitions. - Linus ]

    * tag 'mfd-next-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (38 commits)
    mfd: Add LP87565 PMIC support
    mfd: cros_ec: Free IRQ on exit
    dt-bindings: vendor-prefixes: Add arctic to vendor prefix
    mfd: da9061: Fix to remove BBAT_CONT register from chip model
    mfd: da9061: Fix to remove BBAT_CONT register from chip model
    mfd: axp20x-i2c: Document that this must be builtin on x86
    mfd: Add Cherry Trail Whiskey Cove PMIC driver
    mfd: tc6393xb: Handle return value of clk_prepare_enable
    mfd: intel_quark_i2c_gpio: Add support for SIMATIC IOT2000 platform
    mfd: intel_quark_i2c_gpio: Use dmi_system_id table for retrieving frequency
    mfd: motorola-cpcap: Use devm_of_platform_populate()
    mfd: smsc-ece: Use devm_of_platform_populate()
    mfd: qcom-spmi-pmic: Use devm_of_platform_populate()
    mfd: palmas: Use devm_of_platform_populate()
    mfd: exynos: Use devm_of_platform_populate()
    mfd: fsl-imx25: Use devm_of_platform_populate()
    mfd: cros_ec: Use devm_of_platform_populate()
    mfd: atmel: Use devm_of_platform_populate()
    mfd: stm32-timers: Use devm_of_platform_populate()
    mfd: intel_soc_pmic: Select designware i2c-bus driver
    ...

    Linus Torvalds
     

29 Jun, 2017

1 commit

  • According to Whiskey Cove PMIC GPIO controller specification, for GPIO
    pins 0-12, GPIO input and output register control address range from,

    0x4e44-0x4e50 for GPIO outputs control register

    0x4e51-0x4e5d for GPIO input control register

    But, currently when calculating the GPIO register offsets in to_reg()
    function, all GPIO pins in the same bank uses the same GPIO control
    register address. This logic is incorrect. This patch fixes this
    issue.

    This patch also adds support to selectively skip register modification
    for virtual GPIOs.

    In case of Whiskey Cove PMIC, ACPI code may use up 94 virtual GPIOs.
    These virtual GPIOs are used by the ACPI code as means to access various
    non GPIO bits of PMIC. So for these virtual GPIOs, we don't need to
    manipulate the physical GPIO pin register. A similar patch has been
    merged recently by Hans for Crystal Cove PMIC GPIO driver. You can
    find more details about it in Commit 9a752b4c9ab9 ("gpio: crystalcove:
    Do not write regular gpio registers for virtual GPIOs")

    Signed-off-by: Kuppuswamy Sathyanarayanan
    Reported-by: Jukka Laitinen
    Signed-off-by: Linus Walleij

    Kuppuswamy Sathyanarayanan
     

19 Jun, 2017

1 commit

  • Currently all PMIC GPIO domain IRQs are consumed by the same
    device(bxt_wcove_gpio), so there is no need to export them as
    separate interrupts. We can just export only the first level
    GPIO IRQ(BXTWC_GPIO_LVL1_IRQ) as an IRQ resource and let the
    GPIO device driver(bxt_wcove_gpio) handle the GPIO sub domain
    IRQs based on status value of GPIO level2 interrupt status
    register. Also, just using only the first level IRQ will eliminate
    the bug involved in requesting only the second level IRQ and not
    explicitly enable the first level IRQ. For more info on this
    issue please read the details at,

    https://lkml.org/lkml/2017/2/27/148

    This patch also makes relevant change in Whiskey cove GPIO driver to
    use only first level PMIC GPIO IRQ.

    Signed-off-by: Kuppuswamy Sathyanarayanan
    Acked-by: Linus Walleij
    Acked-for-MFD-by: Lee Jones
    Signed-off-by: Lee Jones

    Kuppuswamy Sathyanarayanan
     

28 Apr, 2017

1 commit

  • According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
    battery IO. So we should skip this bit when checking for GPIO IRQ pending
    status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
    loop until IRQ "pending" status becomes 0. This patch fixes this issue.

    Signed-off-by: Kuppuswamy Sathyanarayanan
    Acked-by: Mika Westerberg
    Acked-by: Andy Shevchenko
    Signed-off-by: Linus Walleij

    Kuppuswamy Sathyanarayanan
     

24 Apr, 2017

1 commit

  • Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO
    pins. But when checking for the pending status, for_each_set_bit() uses
    bit width of 7 and hence it only checks the status for first 7 GPIO pins
    missing to check/clear the status of rest of the GPIO pins. This patch
    fixes this issue.

    Signed-off-by: Kuppuswamy Sathyanarayanan
    Signed-off-by: Linus Walleij

    Kuppuswamy Sathyanarayanan
     

26 Jan, 2017

1 commit

  • Currently we already have two pin configuration related callbacks
    available for GPIO chips .set_single_ended() and .set_debounce(). In
    future we expect to have even more, which does not scale well if we need
    to add yet another callback to the GPIO chip structure for each possible
    configuration parameter.

    Better solution is to reuse what we already have available in the
    generic pinconf.

    To support this, we introduce a new .set_config() callback for GPIO
    chips. The callback takes a single packed pin configuration value as
    parameter. This can then be extended easily beyond what is currently
    supported by just adding new types to the generic pinconf enum.

    If the GPIO driver is backed up by a pinctrl driver the GPIO driver can
    just assign gpiochip_generic_config() (introduced in this patch) to
    .set_config and that will take care configuration requests are directed
    to the pinctrl driver.

    We then convert the existing drivers over .set_config() and finally
    remove the .set_single_ended() and .set_debounce() callbacks.

    Suggested-by: Linus Walleij
    Signed-off-by: Mika Westerberg
    Reviewed-by: Andy Shevchenko
    Signed-off-by: Linus Walleij

    Mika Westerberg
     

25 Nov, 2016

2 commits

  • The ADNP, CrystalCove and WhiskeyCove are all nested GPIO
    irqchips, but were avoiding to connect the parent IRQ to
    the gpiochip. This works, but is kind of sloppy as the
    child IRQs are not marked as having the parent IRQ as
    parent.

    Cc: Mika Westerberg
    Cc: Ajay Thomas
    Cc: Bin Gao
    Signed-off-by: Linus Walleij

    Linus Walleij
     
  • This tries to simplify the use of CONFIG_GPIOLIB_IRQCHIP when
    using threaded interrupts: add a new call
    gpiochip_irqchip_add_nested() to indicate that we're dealing
    with a nested rather than a chained irqchip, then create a
    separate gpiochip_set_nested_irqchip() to mirror
    the gpiochip_set_chained_irqchip() call to connect the
    parent and child interrupts.

    In the nested case gpiochip_set_nested_irqchip() does nothing
    more than call irq_set_parent() on each valid child interrupt,
    which has little semantic effect in the kernel, but this is
    probably still formally correct.

    Update all drivers using nested interrupts to use
    gpiochip_irqchip_add_nested() so we can now see clearly
    which these users are.

    The DLN2 driver can drop its specific hack with
    .irq_not_threaded as we now recognize whether a chip is
    threaded or not from its use of gpiochip_irqchip_add_nested()
    signature rather than from inspecting .can_sleep.

    We rename the .irq_parent to .irq_chained_parent since this
    parent IRQ is only really kept around for the chained
    interrupt handlers.

    Cc: Lars Poeschel
    Cc: Octavian Purdila
    Cc: Daniel Baluta
    Cc: Bin Gao
    Cc: Mika Westerberg
    Cc: Ajay Thomas
    Cc: Semen Protsenko
    Cc: Alexander Stein
    Cc: Phil Reid
    Cc: Bartosz Golaszewski
    Cc: Patrice Chotard
    Signed-off-by: Linus Walleij

    Linus Walleij
     

15 Sep, 2016

1 commit

  • The Kconfig for this file is:

    drivers/gpio/Kconfig:config GPIO_WHISKEY_COVE
    drivers/gpio/Kconfig: tristate "GPIO support for Whiskey Cove PMIC"

    ...but however it does not include module.h -- it in turn gets it from
    another header (gpio/driver.h) and we'd like to replace that with a
    forward delcaration of "struct module;" but if we do, this file will
    fail to compile.

    So we fix this first to avoid putting build failures into the bisect
    commit history.

    Cc: Ajay Thomas
    Cc: Bin Gao
    Cc: Andy Shevchenko
    Cc: Mika Westerberg
    Cc: Linus Walleij
    Cc: Alexandre Courbot
    Cc: linux-gpio@vger.kernel.org
    Signed-off-by: Paul Gortmaker
    Signed-off-by: Linus Walleij

    Paul Gortmaker
     

19 Aug, 2016

1 commit


11 Aug, 2016

1 commit

  • This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC.
    This driver is based on gpio-crystalcove.c.

    Changes in v7:
    - Fixed various coding style comments from Andy Shevchenko
    Changes in v6:
    - Removed unnecessary wcove_gpio_remove()
    - Used devm_gpiochip_remove() instead of gpiochip_remove()
    - Various coding style changes per Mika's comment
    Changes in v5:
    - Revisited the interrupt handler code to iterate until all pending
    interrupts are handled. This change is to avoid missing interrupt
    when we're inside the interrupt handler.
    - Used regmap_bulk_read() to read address adjacent registers.
    Changes in v4:
    - Converted CTLI_INTCNT_XX macros to less verbose ones INT_DETECT_XX.
    - Add comments about why there is no .pm for the driver.
    - Header files re-ordered.
    - Various coding style change to address Andy's comments.
    Changes in v3:
    - Fixed the year in copyright line(2015-->2016).
    - Removed DRV_NAME macro.
    - Added kernel-doc for regmap_irq_chip of the wcove_gpio structure.
    - Line length fix.
    Changes in v2:
    - Typo fix (Whsikey --> Whiskey).
    - Included linux/gpio/driver.h instead of linux/gpio.h
    - Implemented .set_single_ended().
    - Added GPIO register description.
    - Replaced container_of() with gpiochip_get_data().
    - Removed unnecessary "if (gpio > WCOVE_VGPIO_NUM" check.
    - Removed the device id table and added MODULE_ALIAS().

    Signed-off-by: Ajay Thomas
    Signed-off-by: Bin Gao
    Reviewed-by: Andy Shevchenko
    Reviewed-by: Mika Westerberg
    Signed-off-by: Linus Walleij

    Bin Gao