07 Jan, 2012

1 commit

  • * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (185 commits)
    powerpc: fix compile error with 85xx/p1010rdb.c
    powerpc: fix compile error with 85xx/p1023_rds.c
    powerpc/fsl: add MSI support for the Freescale hypervisor
    arch/powerpc/sysdev/fsl_rmu.c: introduce missing kfree
    powerpc/fsl: Add support for Integrated Flash Controller
    powerpc/fsl: update compatiable on fsl 16550 uart nodes
    powerpc/85xx: fix PCI and localbus properties in p1022ds.dts
    powerpc/85xx: re-enable ePAPR byte channel driver in corenet32_smp_defconfig
    powerpc/fsl: Update defconfigs to enable some standard FSL HW features
    powerpc: Add TBI PHY node to first MDIO bus
    sbc834x: put full compat string in board match check
    powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address
    powerpc: Fix unpaired probe_hcall_entry and probe_hcall_exit
    offb: Fix setting of the pseudo-palette for >8bpp
    offb: Add palette hack for qemu "standard vga" framebuffer
    offb: Fix bug in calculating requested vram size
    powerpc/boot: Change the WARN to INFO for boot wrapper overlap message
    powerpc/44x: Fix build error on currituck platform
    powerpc/boot: Change the load address for the wrapper to fit the kernel
    powerpc/44x: Enable CRASH_DUMP for 440x
    ...

    Fix up a trivial conflict in arch/powerpc/include/asm/cputime.h due to
    the additional sparse-checking code for cputime_t.

    Linus Torvalds
     

05 Jan, 2012

2 commits


20 Dec, 2011

1 commit

  • The current implementation of CONFIG_RELOCATABLE in BookE is based
    on mapping the page aligned kernel load address to KERNELBASE. This
    approach however is not enough for platforms, where the TLB page size
    is large (e.g, 256M on 44x). So we are renaming the RELOCATABLE used
    currently in BookE to DYNAMIC_MEMSTART to reflect the actual method.

    The CONFIG_RELOCATABLE for PPC32(BookE) based on processing of the
    dynamic relocations will be introduced in the later in the patch series.

    This change would allow the use of the old method of RELOCATABLE for
    platforms which can afford to enforce the page alignment (platforms with
    smaller TLB size).

    Changes since v3:

    * Introduced a new config, NONSTATIC_KERNEL, to denote a kernel which is
    either a RELOCATABLE or DYNAMIC_MEMSTART(Suggested by: Josh Boyer)

    Suggested-by: Scott Wood
    Tested-by: Scott Wood

    Signed-off-by: Suzuki K. Poulose
    Cc: Scott Wood
    Cc: Kumar Gala
    Cc: Josh Boyer
    Cc: Benjamin Herrenschmidt
    Cc: linux ppc dev
    Signed-off-by: Josh Boyer

    Suzuki Poulose
     

16 Dec, 2011

2 commits


09 Dec, 2011

1 commit


08 Dec, 2011

3 commits

  • Most distros use it so we may as well enable it and get regular compile
    testing.

    Signed-off-by: Anton Blanchard
    Signed-off-by: Benjamin Herrenschmidt

    Anton Blanchard
     
  • So I've had one of these for a while and it looks like the vendor never
    bothered submitting the support upstream.

    This adds it using ppc40x_simple and provides a device-tree.

    There are some changes to the boot wrapper because the way u-boot works
    on this thing, it seems to expect a multipart image with the kernel,
    initrd and dtb in it.

    The USB support is missing as it needs the yet unmerged driver for
    the DWC OTG part and the GPIOs may need further definition in the dts.

    Signed-off-by: Benjamin Herrenschmidt

    Benjamin Herrenschmidt
     
  • Refresh ps3_defconfig to latest kernel sources and
    change the options:

    CONFIG_PPP=m to CONFIG_PPP=n.
    CONFIG_NAMESPACES=y to CONFIG_NAMESPACES=n
    CONFIG_NUMA=y to CONFIG_NUMA=n

    Signed-off-by: Geoff Levand
    Signed-off-by: Benjamin Herrenschmidt

    Geoff Levand
     

07 Dec, 2011

2 commits


30 Nov, 2011

1 commit

  • The AppliedMicro APM8018X embedded processor targets embedded applications that
    require low power and a small footprint. It features a PowerPC 405 processor
    core built in a 65nm low-power CMOS process with a five-stage pipeline executing
    up to one instruction per cycle. The family has 128-kbytes of on-chip memory,
    a 128-bit local bus and on-chip DDR2 SDRAM controller with 16-bit interface.

    Signed-off-by: Tanmay Inamdar
    Signed-off-by: Josh Boyer

    Tanmay Inamdar
     

25 Nov, 2011

2 commits

  • This patch add the Chroma platform to WSP/PowerEN, which is a PCIe
    card (a defconfig is included).

    The card includes an H8 service processor that is used to manage the
    card. The H8 is connected over the second serial UART on the PowerEN
    chip so this patch includes a simple 16550 driver to enable
    communication, mostly for "power off" and "rebooting".

    This patch also includes a, WSP specific, "halt" method that will shut
    of all A2 cores but still leave power on at the chip level. This is
    desirable, especially if you wish to interrogate the chip with a
    hardware probe after the halt.

    Signed-off-by: Jimi Xenidis
    Signed-off-by: Benjamin Herrenschmidt

    Jimi Xenidis
     
  • Signed-off-by: Tony Breeds
    Acked-by: Josh Boyer
    Signed-off-by: Benjamin Herrenschmidt

    Tony Breeds
     

08 Nov, 2011

2 commits


07 Nov, 2011

1 commit

  • * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (106 commits)
    powerpc/p3060qds: Add support for P3060QDS board
    powerpc/83xx: Add shutdown request support to MCU handling on MPC8349 MITX
    powerpc/85xx: Make kexec to interate over online cpus
    powerpc/fsl_booke: Fix comment in head_fsl_booke.S
    powerpc/85xx: issue 15 EOI after core reset for FSL CoreNet devices
    powerpc/8xxx: Fix interrupt handling in MPC8xxx GPIO driver
    powerpc/85xx: Add 'fsl,pq3-gpio' compatiable for GPIO driver
    powerpc/86xx: Correct Gianfar support for GE boards
    powerpc/cpm: Clear muram before it is in use.
    drivers/virt: add ioctl for 32-bit compat on 64-bit to fsl-hv-manager
    powerpc/fsl_msi: add support for "msi-address-64" property
    powerpc/85xx: Setup secondary cores PIR with hard SMP id
    powerpc/fsl-booke: Fix settlbcam for 64-bit
    powerpc/85xx: Adding DCSR node to dtsi device trees
    powerpc/85xx: clean up FPGA device tree nodes for Freecsale QorIQ boards
    powerpc/85xx: fix PHYS_64BIT selection for P1022DS
    powerpc/fsl-booke: Fix setup_initial_memory_limit to not blindly map
    powerpc: respect mem= setting for early memory limit setup
    powerpc: Update corenet64_smp_defconfig
    powerpc: Update mpc85xx/corenet 32-bit defconfigs
    ...

    Fix up trivial conflicts in:
    - arch/powerpc/configs/40x/hcu4_defconfig
    removed stale file, edited elsewhere
    - arch/powerpc/include/asm/udbg.h, arch/powerpc/kernel/udbg.c:
    added opal and gelic drivers vs added ePAPR driver
    - drivers/tty/serial/8250.c
    moved UPIO_TSI to powerpc vs removed UPIO_DWAPB support

    Linus Torvalds
     

04 Nov, 2011

1 commit

  • The P3060QDS is a Freescale reference board that hosts the six-core P3060 SOC.
    The P3060 Processor combines six e500mc Power Architecture processor cores with
    high-performance datapath acceleration architecture(DPAA), CoreNet fabric
    infrastructure, as well as network and peripheral interfaces.

    P3060QDS Board Overview:
    Memory subsystem:
    - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
    - 128M Bytes NOR flash single-chip memory
    - 16M Bytes SPI flash
    - 8K Bytes AT24C64 I2C EEPROM
    Ethernet:
    - 4x1G + 4x1G/2.5G Ethernet controllers
    - 2xRGMII + 1xMII, three VSC8641 PHYs on board
    - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
    PCIe: Two PCI Express 2.0 controllers/ports
    USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
    I2C: Four I2C controllers
    UART: Supports up to four UARTs
    RapidIO: Supports two serial RapidIO ports

    Signed-off-by: Shengzhou Liu
    Signed-off-by: Kumar Gala

    Shengzhou Liu
     

12 Oct, 2011

3 commits


07 Oct, 2011

1 commit

  • There's only p2041rdb board for official release, but the p2041 silicon
    on the board can be converted to p2040 silicon without XAUI and L2 cache
    function, then the board becomes p2040rdb board. so we use the file name
    p2041_rdb.c to handle P2040RDB board and P2041RDB board which is also
    consistent with the board name under U-Boot.

    During the rename we make few other minor changes to the device tree:
    * Move USB phy setting into p2041si.dtsi as its SoC not board defined
    * Convert PCI clock-frequency to decimal to be more readable

    Signed-off-by: Mingkai Hu
    Signed-off-by: Kumar Gala

    Mingkai Hu
     

29 Sep, 2011

1 commit


23 Sep, 2011

3 commits

  • Activate all MPC512x related boards. Also enable GPIO-driver, SPI driver
    and at25 to test SPI. Enable DEVTMPFS. Bump to 3.1-rc6.

    Signed-off-by: Wolfram Sang
    Cc: Anatolij Gustschin
    Cc: Benjamin Herrenschmidt
    Signed-off-by: Anatolij Gustschin

    Wolfram Sang
     
  • Move the driver to the place where it is expected to be nowadays. Also
    rename its CONFIG-name to match the rest and adapt the defconfigs.
    Finally, move selection of REQUIRE_GPIOLIB or WANTS_OPTIONAL_GPIOLIB to
    the platforms, because this option is per-platform and not per-driver.

    Signed-off-by: Wolfram Sang
    Cc: Anatolij Gustschin
    Cc: Grant Likely
    Cc: Benjamin Herrenschmidt
    Acked-by: Grant Likely
    Signed-off-by: Anatolij Gustschin

    Wolfram Sang
     
  • Audio support for the MPC5200 exists, so enable it by default.

    Signed-off-by: Timur Tabi
    Acked-by: Wolfram Sang
    Signed-off-by: Anatolij Gustschin

    Timur Tabi
     

22 Sep, 2011

1 commit

  • Conflicts:
    MAINTAINERS
    drivers/net/Kconfig
    drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
    drivers/net/ethernet/broadcom/tg3.c
    drivers/net/wireless/iwlwifi/iwl-pci.c
    drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c
    drivers/net/wireless/rt2x00/rt2800usb.c
    drivers/net/wireless/wl12xx/main.c

    David S. Miller
     

20 Sep, 2011

1 commit


31 Aug, 2011

2 commits


19 Aug, 2011

1 commit

  • In commit 9aa3283595451ca093500ff0977b106e1f465586 (ehea/ibm*: Move the
    IBM drivers) the IBM_NEW_EMAC* were renames to IBM_EMAC*

    The conversion was incomplete so that even if the driver was added to
    the .config it wasn't built, but there were no errors). In this commit
    we also update the various defconfigs that use EMAC to use the new
    Kconfig symbol, and explicitly add the NET_VENDOR_IBM guard.

    We do not explicitly select the Kconfig dependencies, as this would force
    EMAC on. Doing it in the defconfig allows more flexibility.

    Tested on a canyondlands board.

    Signed-off-by: Tony Breeds
    Signed-off-by: David S. Miller

    Tony Breeds
     

12 Aug, 2011

1 commit


22 Jul, 2011

1 commit


19 Jul, 2011

4 commits


12 Jul, 2011

1 commit

  • The 44x code (which is shared by 47x) assumes the available physical memory
    begins at 0x00000000. This is not necessarily the case in an AMP
    environment.

    Support CONFIG_RELOCATABLE for 476 in order to allow the kernel to be
    loaded into a higher memory range.

    Signed-off-by: Tony Breeds
    Signed-off-by: Dave Kleikamp
    Cc: Benjamin Herrenschmidt
    Cc: Josh Boyer
    Cc: linuxppc-dev@lists.ozlabs.org
    Signed-off-by: Josh Boyer

    Dave Kleikamp
     

08 Jul, 2011

1 commit

  • P2040RDB Specification:
    -----------------------
    2Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
    128 Mbyte NOR flash single-chip memory
    256 Kbit M24256 I2C EEPROM
    16 Mbyte SPI memory
    SD connector to interface with the SD memory card
    dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
    dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
    dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
    dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
    dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)
    I2C1: Real time clock, Temperature sensor
    I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM
    SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors
    UART: supports two UARTs up to 115200 bps for console
    USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces
    PCIe:
    - Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
    - Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2

    Signed-off-by: Mingkai Hu
    Signed-off-by: Kumar Gala

    Mingkai Hu