08 Jun, 2017
40 commits
-
The GPC controller driver is handling two sections: interrupts and PGC
(Power Gate Controller). The interrupts are handled in imx_gpcv2_init
function, and the PGC is handled in imx_gpcv2_probe function.
In kernel 4.9, the driver is probed by it's compatible entry in:
OF_DECLARE_2(irqchip, imx_gpcv2, "fsl,imx7d-gpc", imx_gpcv2_init);Because the driver is already probed, imx_gpcv2_probe function is not
called, since it is registered with the same compatible name.
In order to separate the interrupts from PGC, this patch moves the
regulator entrys in DTS to a new node: pgc. And, assign the probe
function to this new node.
Also, added DeviceTree documentation about the new added node. Since GPC
(the block containing the PGC) didn't have any documentation, documented
GPC too.Signed-off-by: Robert Chiras
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For imx7d, the DTS definition (imx7d-sdb.dts) is used by default, and this
is the one used when plugging a HDMI device. Since HDMI works with DE
polarity as active high, but the MIPI DSI works with active low, this
patch sets the DE polarity to active high in imx7-sdb.dts and moves the
active low polarity to imx7d-sdb-mipi-dsi.dts.Signed-off-by: Robert Chiras
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Remove the redundant codes in pcie-designware driver.
Because that the class configration had been
contained in 4.9 kernel.Signed-off-by: Richard Zhu
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- Do not return error when the GEN2 link negatiation
is failed. Because that the limitation maybe caused
by the remote GEN1 EP device.
- Move the power saving codes to the proper place
after the link is down.
Otherwise, system would hang when link is down.Signed-off-by: Richard Zhu
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Set the max link capability of the imx pcie to gen2
Signed-off-by: Richard Zhu
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A bugfix added a new local variable that is only used inside of an #ifdef
section, and unused if CONFIG_PERF_EVENTS is disabled:arch/arm/mach-imx/mmdc.c:63:25: warning: 'cpuhp_mmdc_state' defined but not used [-Wunused-variable]
This moves the variable down inside that same ifdef.
Fixes: a051f220d6b9 ("ARM/imx/mmcd: Fix broken cpu hotplug handling")
Signed-off-by: Arnd Bergmann
Acked-by: Frank Li
Signed-off-by: Shawn Guo -
The cpu hotplug support of this perf driver is broken in several ways:
1) It adds a instance before setting up the state.
2) The state for the instance is different from the state of the
callback. It's just a randomly chosen state.3) The instance registration is not error checked so nobody noticed that
the call can never succeed.4) The state for the multi install callbacks is chosen randomly and
overwrites existing state. This is now prevented by the core code so the
call is guaranteed to fail.5) The error exit path in the init function leaves the instance registered
and then frees the memory which contains the enqueued hlist node.6) The remove function is removing the state and not the instance.
Fix it by:
- Setting up the state before adding instances. Use a dynamically allocated
state for it.- Installing instances after the state has been set up
- Removing the instance in the error path before freeing memory
- Removing the instance not the state in the driver remove callback
While at is use raw_cpu_processor_id(), because cpu_processor_id() cannot
be used in preemptible context, and set the driver data after successful
registration of the pmu.Signed-off-by: Thomas Gleixner
Acked-by: Shawn Guo
Cc: Peter Zijlstra
Cc: Sebastian Siewior
Cc: Frank Li
Cc: Zhengyu Shen
Link: http://lkml.kernel.org/r/20161221192111.596204211@linutronix.de
Signed-off-by: Thomas Gleixner -
i.MX6QP added new register bit PROFILE_SEL in MADPCR0.
need set it at perf start.Signed-off-by: Frank Li
Signed-off-by: Shawn Guo -
This reverts commit 0fcec3b21f92184b230c98b85887fa7fbbdf6f64.
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Upstream rejected this patch because it is wrong: Attaching clk and
regulator resources to the cpu device results in them never actually
getting freed.This is relevant now that we rely on supporting EPROBE_DEFER because we
must handle correctly returning from a partial probe.In particular this patch fixes imx6qp-sabresd not setting the PU
regulator to bypass mode because the cpufreq driver fetched the
regulator before gpc and leaked it.This is not a straight revert because other clks and regulators were
added, we add code to free them too.Signed-off-by: Leonard Crestez
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On imx_4.9.y we no longer override the cpu arm/soc/pu-supply properties
to link to pmic directly but rather rely on the regulator core
propagating a set_voltage on a bypassed regulator upwards.This change was already performance for imx6qdl, now do it for all the
boards using ldo-bypass.Signed-off-by: Leonard Crestez
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The temperature trip points should be writable from userspace to
allow testing the thermal driver. This is a new configuration
option added in 4.9 and needed to allow the functionality
introduced by commit fc4fcd689419
("MLK-11705 thermal: imx: make the critical trip temp changable for test").Signed-off-by: Irina Tirdea
-
When setting passive temperature trip point, it is not
allowed to set a higher value than the default.Currently the driver compares the new temperature to set
with a constant (0). This comparison wil always be true
(temp to set higher than 0) and the driver will return
-EINVAL. This is a leftover from rebasing the commit fc4fcd689419
("MLK-11705 thermal: imx: make the critical trip temp changable for test").Fix the comparison by using the actual default passive
temperature value instead of the wrong constant.Signed-off-by: Irina Tirdea
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The octop node was defined in imx7s.dtsi but disabled. It is needed by
the fsl_otp driver.Signed-off-by: Octavian Purdila
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On imx6SX SDB eLCDIF driver cannot coexist with CAAM driver. The cause
seems to be an ipg clk that failes to be identified by the CAAM driver.This patch disables the CAAM driver by setting its status to "disabled"
in the dts used for obtaining LCDIF functionality.Signed-off-by: Cristina Ciocan
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The Linux kernel regulator core implementation does not accept negative
voltage values; all negative values are treated as errors.The problem with the EPDC is that the panel uses a negative voltage
regulator which fails to be enabled by the regulator core. This issue has
slipped up until the 4.9 rebase because the voltage range [min, max] was
checked against only when min = max. This has been fixed in 4.9, resulting
in errors in the VCOM regulator driver.The fix is to use the negative values when communicating with the hardware,
but send only positive values to the regulator core.This patch sends the absolute value to the regulator core and transforms
the received value (from the regulator core) to negative one before sending
it to hardware.Fix device tree to deal with negative voltage regulator values by setting
min_value = -real_max_value and vice versa. Boards affected:
- imx6dl-sabresd
- imx6ull-14x14-ddr3-arm2
- imx7d-12x12-lpddr3-arm2
- imx7d-sdb
- imx6sll-evk
- imx6sl-evk
- imx6sll-lpddr3-arm2Signed-off-by: Cristina Ciocan
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Currently, the LCDIF driver (mxsfb.c) is overriding the DE polarity
specified in DTS with the one specified in fb_videomode (sync member) by
the panel driver.
Initially, the panel driver found in
drivers/video/fbdev/mxc/mxcfb_hx8363_wvga.c specified the sync in
fb_videomode as FB_SYNC_OE_LOW_ACT.But this patch, changed it to 0x0:
commit 4deb430fd05a ("MLK-13607-8 video: mipi-panel: hx8363: change DE
polarity to active high")
Author: Fancy Fang
Date: Wed Dec 14 16:21:51 2016 +0800The NorthWest Logic MIPI DSI only support active low data enable
signal on imx7ulp-evk board.The problem is that, the hx8363 panel was working with active low on
imx7d-sdb, but with active high on imx7ulp-evk. The above patch broke
hx8363 panel on imx7d-sdb board.So, instead of using a hard-coded polarity in panel driver, better use
the one defined in device-tree.Signed-off-by: Robert Chiras
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The mxsfb framebuffer driver uses three clock definitions, but only two
are defined in DTS for imx7s (also used by imx7d); because of this,
driver fails in probe. Since iMX7D uses only one clock, add the third clock
and make two of them dummy.
Also, add additional error messages for better identification of a
failing probe.Signed-off-by: Robert Chiras
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It is wrong to pass 'int' to IS_ERR_VALUE(), Linus's commit
aa00edc1 point out this abuse.This patch use operator instead.
Signed-off-by: Haibo Chen
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Remove the TI wifi from defconfig and include the head file host.h
which contain the definition of struct mmc_host to avoid the following
compile warning:In file included from drivers/net/wireless/ti/wlcore/sdio.c:28:0:
./include/linux/mmc/sdio.h:193:35: warning: 'struct mmc_host' declared inside parameter list
void mmc_sdio_force_remove(struct mmc_host *host);
^
./include/linux/mmc/sdio.h:193:35: warning: its scope is only this definition or declaration, which is probably not what you wantSigned-off-by: Haibo Chen
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If bootargs with 'heartbeat_off' setting, will remove heartbeat feature
in kernel and M4 will not reset A7 even A7 hang. It's useful for debug
in A7 if you want to connect debugger, otherwise M4 will reset A7 core
if A7 core halt more than 30s.Signed-off-by: Robin Gong
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The rpmsg driver probe function such as pm_rpmsg_probe is called by rpmsg
rx callback, so we can't wait in pm_rpmsg_probe for any completion which
issued by callback itself, otherwise, timeout triggered definitily, because
your last callback no chance to reurn to handle the next callback unless
timeout happened. This patch move the rpmsg send code from pm_rpmsg_probe
to delay work.Signed-off-by: Robin Gong
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cancel heartbeat workqueue to make sure no any heartbeat message will
be sent to M4 after M4 thought A7 core enter VLLS mode.Signed-off-by: Robin Gong
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Heatbeat workqueue and suspend/resume may call pm_send_message at the same
time as pf1550-regulator-rpmsg driver, so add mutex to avoid the potential
pm_qpos_* reentry issue.Signed-off-by: Robin Gong
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Multi drivers(mmc, cpufreq..) may access pf1550 regulator rpmsg driver at
the same time, so we have to add mutex for this multi-entry case. Otherwise
the below kernel warning maybe triggered:------------[ cut here ]------------
WARNING: CPU: 0 PID: 19 at kernel/power/qos.c:453 pf1550_send_message+0x4c/0xf8()
pm_qos_add_request() called for already added request
Modules linked in:
CPU: 0 PID: 19 Comm: kworker/0:1 Not tainted 4.1.33-02293-g80b8c19 #636
Hardware name: Freescale i.MX7ULP (Device Tree)
Workqueue: events od_dbs_timer
[] (unwind_backtrace) from [] (show_stack+0x10/0x14)
[] (show_stack) from [] (dump_stack+0x88/0x9c)
[] (dump_stack) from [] (warn_slowpath_common+0x80/0xb0)
[] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40)
[] (warn_slowpath_fmt) from [] (pf1550_send_message+0x4c/0xf8)
[] (pf1550_send_message) from [] (pf1550_get_voltage+0x48/0x5c)
[] (pf1550_get_voltage) from [] (_regulator_get_voltage+0x68/0xb4)
[] (_regulator_get_voltage) from [] (_regulator_do_set_voltage+0x5c/0x3e4)
[] (_regulator_do_set_voltage) from [] (regulator_set_voltage+0xb0/0x14c)
[] (regulator_set_voltage) from [] (imx7ulp_set_target+0x178/0x238)
[] (imx7ulp_set_target) from [] (__cpufreq_driver_target+0x164/0x294)
[] (__cpufreq_driver_target) from [] (dbs_check_cpu+0x1a0/0x1e0)
[] (dbs_check_cpu) from [] (od_dbs_timer+0x80/0x138)
[] (od_dbs_timer) from [] (process_one_work+0x118/0x3e4)
[] (process_one_work) from [] (worker_thread+0x4c/0x4f4)
[] (worker_thread) from [] (kthread+0xdc/0xf4)
[] (kthread) from [] (ret_from_fork+0x14/0x2c)
---[ end trace f8281ecde7a0b4ce ]---
------------[ cut here ]------------Signed-off-by: Robin Gong
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Put the three dsi domains into reset state when dsi is disabled
to avoid dsi being an unstable state before next time enabled.Signed-off-by: Fancy Fang
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Put the three dsi domains into reset state before dsi is
shutdown to avoid dsi being a unstable state.Signed-off-by: Fancy Fang
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The overlay framebuffer fb1 access maybe accessed when fb0
is in the blank state in which all the lcd clocks have been
disabled.Signed-off-by: Fancy Fang
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The double MU count operations should be only done when changing the
MMDC frequency from 400MHz to a low frequency(100MHz or 24MHz).
Otherwise, the MU count may overflow and lead to system hang/panic issue.This is basically a porting of 4d09bf110b878a6f720ee9d19c8b64ceace95fbe
to imx6dq lppdr2.Also a member "freq" has been added to the mmdc_settings_info structure
to store the current ddr frequency on iram settings to be able to execute
the double MU count, only on 400MHz mode and bypass the operation
otherwise within the update freq routine.Signed-off-by: Juan Gutierrez
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In the mipi_dsi_shutdown() function, it accesses some dsi registers.
But in some cases, the esc_clk may be disabled at this moment. So
first enable this clock then do other shutdown works. Otherwise,
it may cause kernel panic dump as belows when rebooting system:Unhandled fault: imprecise external abort (0x1c06) at 0x0033802c
pgd = b0a24000
[0033802c] *pgd=908f1831, *pte=6320775f, *ppte=63207c7f
Internal error: : 1c06 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1059 Comm: reboot Not tainted 4.1.33-02248-g22f8d64-dirty #513
Hardware name: Freescale i.MX7ULP (Device Tree)
task: b0f56600 ti: b08e8000 task.ti: b08e8000
PC is at mipi_dsi_pkt_write+0x38/0x1b0
LR is at mipi_dsi_wr_tx_header.constprop.2+0x6c/0x94
pc : [] lr : [] psr: 60070013
sp : b08e9c00 ip : 00000001 fp : 00000000
r10: 00000000 r9 : b024a810 r8 : b00c5044
r7 : 80cac4d8 r6 : 80bd2504 r5 : b024a810 r4 : b024a810
r3 : c0920000 r2 : 00000000 r1 : 60070013 r0 : 00000023
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 10c53c7d Table: 90a2406a DAC: 00000015
Process reboot (pid: 1059, stack limit = 0xb08e8210)
Stack: (0xb08e9c00 to 0xb08ea000)
9c00: 00000000 80066e30 00000000 b00c5000 20070113 b024a810 b024a810 b00c5010
9c20: 80cac4d8 b00c5044 80c54020 00000000 00000000 802fdba4 00000028 00000000
9c40: bf672edc 00000001 80bdff40 8007ad7c 8004993c 8082eb30 00000000 80be0140
9c60: 80bcddc0 80832cd8 80c517f1 80bcddc0 b08e9c70 80bdfb40 b0004c60 00000000
9c80: 00000009 00000000 00000009 00000000 80c576c0 00000000 80bd20a8 8003b9d8
9ca0: 00000000 b08e9d68 b08e9ca0 80c576c0 0000000a ffffb7c1 80bd2100 80bcbbe8
9cc0: 00000000 80bcd800 b0f56600 bf672800 b0f56648 b00fab08 b00fab10 8005fc30
9ce0: 00000017 00000000 00000000 8006ff84 c080200c 00000026 80bd2838 b08e9d28
9d00: 80361f04 80c586d6 80c586d6 8035b2a8 80361f04 b02b3610 80bd2504 001c0700
9d20: 003c0700 8036212c 80bff3b0 80c58198 80bdf8a0 20070093 00000199 8082e868
9d40: 00000000 80bdf8a0 80c58198 00000000 00000199 8082eadc 80c58198 8006e8b0
9d60: 00000400 80c5f48c 00000029 80c98ac8 80c58198 80c98098 60070013 00000000
9d80: 80bdf880 00000001 00000000 80c58198 00000000 00000029 00000001 80c58198
9da0: 00000029 00000001 00000000 8006e654 00000000 8006ee2c 00000000 00000000
9dc0: 00000000 00000000 80c98ae6 00000029 00000000 00000000 00000000 60070013
9de0: 00000000 00000000 00000000 8006f214 b024a810 b00c5010 80cac4d8 b00c5044
9e00: 80c54020 00000000 00000000 8006f238 80a580f0 b08e9e34 00000000 80824414
9e20: 80a58148 b08e9e34 b024a810 802fdc6c 80a580f0 80872338 00000000 802fdc80
9e40: 60070013 b024a810 b00c1a10 802fdd10 802fdcf0 b00c5010 b00c1a10 8038e8a8
9e60: b00c501c 8038b3cc 01234567 00000000 80bdee38 00000000 fee1dead 8000f644
9e80: b08e8000 800529cc 00000000 80052c24 bf699000 00000001 00000000 800b3498
9ea0: 00000000 bfca9160 bf699000 80bd04b8 bfca9160 00000000 80c50880 800b5460
9ec0: b08e9ed4 00000000 b08e9ec8 00000000 b074ad10 00000000 00359000 b074a7e8
9ee0: b08e9f20 b074ad10 b0a56e00 00351000 b074ad10 800d3cb8 b0a56e00 00000000
9f00: b074ad10 00351000 00000001 00000001 b08e9f24 b0001680 00000001 00000001
9f20: b08e9f34 bf672e00 b086a240 bf672e00 ae13f550 ae13f5a0 00080040 00000001
9f40: b086a240 ae1533f0 00000000 b07e1d90 ae13f550 40000010 b086a240 800ed1b0
9f60: 00000020 00000000 b0f569f8 00000000 b0f569f8 00000000 80c57c28 b0f56600
9f80: 00000000 8004f358 b086a240 b08e8000 8000f644 7eec5e14 00000003 00000000
9fa0: 00000058 8000f4c0 7eec5e14 00000003 fee1dead 28121969 01234567 00000000
9fc0: 7eec5e14 00000003 00000000 00000058 00000000 00000000 00000000 00000000
9fe0: 76f3ec10 7eec5c7c 00010fc8 76f3ec30 60070010 fee1dead 00000000 00000000
[] (mipi_dsi_pkt_write) from [] (mipi_dsi_dcs_cmd.part.0+0x24/0x2c)
[] (mipi_dsi_dcs_cmd.part.0) from [] (mipi_display_enter_sleep+0x30/0xa0)
[] (mipi_display_enter_sleep) from [] (mipi_dsi_shutdown+0x20/0x9c)
[] (mipi_dsi_shutdown) from [] (platform_drv_shutdown+0x18/0x28)
[] (platform_drv_shutdown) from [] (device_shutdown+0xdc/0x1e4)
[] (device_shutdown) from [] (kernel_restart+0xc/0x50)
[] (kernel_restart) from [] (SyS_reboot+0xc8/0x1b8)
[] (SyS_reboot) from [] (ret_fast_syscall+0x0/0x3c)
Code: e34860bd e58da000 e1a0200c ebffff90 (f57ff04e)
---[ end trace 9f61c48a242457f2 ]---Signed-off-by: Fancy Fang
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Adding the corresponding brackets were missing when introducing
a new phy fixup function. This patch fix it.Signed-off-by: Juan Gutierrez
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Currently the M4 audio driver don't support mono channel, so remove it.
After mono channel is supported in M4 os, this commit should be reverted.Signed-off-by: Shengjiu Wang
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The rpmsg-audio and wm8960-audio use same device in two way, there is
conflict when enabled together.
imx7ulp-evk-wm8960.dts is for demo usage, there is a hardware issue
(TKT320235) that EDMA interrupt can't wake up the A7 core, so there
is glitch noise occassionally.Signed-off-by: Shengjiu Wang
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Now, M4 rpmsg add free buffer feature that free the reciever buffer and update
some rpmsg structure data in share memory(DDR) once M4 receive the message from
A7 side, that means M4 will access DDR after it receive the vlls message(A7 enter
VLLS mode quickly), thus M4 hang because DDR in slef-refresh...
This patch move the vlls message notification ahead to driver suspend and add
acknowledgement to make sure no any DDR access comes from M4 side after A7 enter
suspend.Signed-off-by: Robin Gong
-
add heartbeat device node to add suspend/resume in
arch/arm/mach-imx/pm-rpmsg.cSigned-off-by: Robin Gong
-
some cmd is sent by workqueue, others are sent by call send message
function directly, for workqueue may have delay, so there is occasion
that cmd is not sent in order.
Add flush_workqueue before the CLOSE and SUSPEND to make sure previous
cmd is finished in that time.Signed-off-by: Shengjiu Wang
-
The M4 audio driver only support 8k/16k/32k/44k/48kHz sample rate.
so remove other rate in supported list.Signed-off-by: Shengjiu Wang
-
In userspace, user can not distinguish fb0 and fb1, so add fb1/name property to
distinguish them.Signed-off-by: Guoniu.Zhou
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Enbale cpufreq support for i.MX7ULP in defconfig.
Signed-off-by: Bai Ping
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Add cpufreq device on i.MX7ULP.
Signed-off-by: Bai Ping