Eric Lee / smarc-fsl-linux-kernel

23 Jul, 2008

1 commit

  • 7f1b358a2   I/OAT: I/OAT version 3.0 support ... Browse Code »

    This patch adds to ioatdma and dca modules
    support for Intel I/OAT DMA engine ver.3 (aka CB3 device).
    The main features of I/OAT ver.3 are:
    * 8 single channel DMA devices (8 channels total)
    * 8 DCA providers, each can accept 2 requesters
    * 8-bit TAG values and 32-bit extended APIC IDs

    Signed-off-by: Maciej Sosnowski
    Signed-off-by: Dan Williams

    Maciej Sosnowski
     

17 Oct, 2007

1 commit

  • 7589670f3   DCA: Add Direct Cache Access driver ... Browse Code »

    Direct Cache Access (DCA) is a method for warming the CPU cache before data
    is used, with the intent of lessening the impact of cache misses. This
    patch adds a manager and interface for matching up client requests for DCA
    services with devices that offer DCA services.

    In order to use DCA, a module must do bus writes with the appropriate tag
    bits set to trigger a cache read for a specific CPU. However, different
    CPUs and chipsets can require different sets of tag bits, and the methods
    for determining the correct bits may be simple hardcoding or may be a
    hardware specific magic incantation. This interface is a way for DCA
    clients to find the correct tag bits for the targeted CPU without needing
    to know the specifics.

    [Dave Miller] use DEFINE_SPINLOCK()

    Signed-off-by: Shannon Nelson
    Acked-by: David S. Miller
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Shannon Nelson