14 Oct, 2010

19 commits

  • It adds cache-sram support in P1/P2 QorIQ platforms as under:

    * A small abstraction over powerpc's remote heap allocator
    * Exports mpc85xx_cache_sram_alloc()/free() APIs
    * Supports only one contiguous SRAM window
    * Drivers can do the following in Kconfig to use these APIs
    "select FSL_85XX_CACHE_SRAM if MPC85xx"
    * Required SRAM size and the offset where SRAM should be mapped must be
    provided at kernel command line as :
    cache-sram-size=
    cache-sram-offset=

    Signed-off-by: Harninder Rai
    Signed-off-by: Vivek Mahajan
    Signed-off-by: Kumar Gala

    Harninder Rai
     
  • The device tree for Freescale's P1022DS reference board is missing the node
    for the ngPIXIS FPGA.

    Signed-off-by: Timur Tabi
    Signed-off-by: Kumar Gala

    Timur Tabi
     
  • arch/powerpc/kernel/paca.c: In function 'allocate_lppacas':
    arch/powerpc/kernel/paca.c:111:1: error: parameter name omitted
    arch/powerpc/kernel/paca.c:111:1: error: parameter name omitted

    Signed-off-by: Kumar Gala

    Kumar Gala
     
  • The P3041DS is in the same family of boards as the P4080DS and thus
    shares the corenet_ds code.

    Signed-off-by: Kumar Gala

    Kumar Gala
     
  • On an arch 2.06 hypervisor, a pending perfmon interrupt will be delivered
    to the hypervisor at any point the guest is running, regardless of
    MSR[EE]. In order to reflect this interrupt, the hypervisor has to mask
    the interrupt in PMGC0 -- and set MSRP[PMMP] to intercept futher guest
    accesses to the PMRs to detect when to unmask (and prevent the guest from
    unmasking early, or seeing inconsistent state).

    This has the side effect of ignoring any changes the guest makes to
    MSR[PMM], so wait until after the interrupt is clear, and thus the
    hypervisor should have cleared MSRP[PMMP], before setting MSR[PMM]. The
    counters wil not actually run until PMGC0[FAC] is cleared in
    pmc_start_ctrs(), so this will not reduce the effectiveness of PMM.

    Signed-off-by: Scott Wood
    Signed-off-by: Kumar Gala

    Scott Wood
     
  • Signed-off-by: Kumar Gala

    Kumar Gala
     
  • Add 'fsl,qoriq-gpio' compatiable to the list we search for to bind
    against for mpc8xxx_gpio. This compatiable will be used on P1-P5xxx
    QorIQ devices like P4080.

    Signed-off-by: Kumar Gala

    Kumar Gala
     
  • First we check to see if we are the first core booting up. This
    is accomplished by comparing the boot_cpuid with -1, if it is we
    assume this is the first core coming up.

    Secondly, we need to update the initial thread info structure
    to reflect the actual cpu we are running on otherwise
    smp_processor_id() and related functions will return the default
    initialization value of the struct or 0.

    Signed-off-by: Matthew McClintock
    Signed-off-by: Kumar Gala

    Matthew McClintock
     
  • Like the MPC8610 HPCD, the P1022DS ASoC DMA driver probes on individual DMA
    channel nodes, so the DMA controller nodes' compatible string must be
    listed in p1022_ds_ids[] to work.

    Signed-off-by: Timur Tabi
    Signed-off-by: Kumar Gala

    Timur Tabi
     
  • The first global-utilities node might not contain the rstcr
    property, so we should search all the nodes

    Signed-off-by: Matthew McClintock
    Acked-by: Timur Tabi
    Signed-off-by: Kumar Gala

    Matthew McClintock
     
  • There exists a four line chunk of code, which when configured for
    64 bit address space, can incorrectly set certain page flags during
    the TLB creation. It turns out that this is code which isn't used,
    but might still serve a purpose. Since it isn't obvious why it exists
    or why it causes problems, the below description covers both in detail.

    For powerpc bootstrap, the physical memory (at most 768M), is mapped
    into the kernel space via the following path:

    MMU_init()
    |
    + adjust_total_lowmem()
    |
    + map_mem_in_cams()
    |
    + settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);

    On settlbcam(), the kernel will create TLB entries according to the flag,
    PAGE_KERNEL_X.

    settlbcam()
    {
    ...
    TLBCAM[index].MAS1 = MAS1_VALID
    | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
    ^
    These entries cannot be invalidated by the
    kernel since MAS1_IPROT is set on TLB property.
    ...
    if (flags & _PAGE_USER) {
    TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
    TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
    }

    For classic BookE (flags & _PAGE_USER) is 'zero' so it's fine.
    But on boards like the the Freescale P4080, we want to support 36-bit
    physical address on it. So the following options may be set:

    CONFIG_FSL_BOOKE=y
    CONFIG_PTE_64BIT=y
    CONFIG_PHYS_64BIT=y

    As a result, boards like the P4080 will introduce PTE format as Book3E.
    As per the file: arch/powerpc/include/asm/pgtable-ppc32.h

    * #elif defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT)
    * #include

    So PAGE_KERNEL_X is __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX) and the
    book3E version of _PAGE_KERNEL_RWX is defined with:

    (_PAGE_BAP_SW | _PAGE_BAP_SR | _PAGE_DIRTY | _PAGE_BAP_SX)

    Note the _PAGE_BAP_SR, which is also defined in the book3E _PAGE_USER:

    #define _PAGE_USER (_PAGE_BAP_UR | _PAGE_BAP_SR) /* Can be read */

    So the possibility exists to wrongly assign the user MAS3_U bits
    to kernel (PAGE_KERNEL_X) address space via the following code fragment:

    if (flags & _PAGE_USER) {
    TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
    TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
    }

    Here is a dump of the TLB info from Simics with the above code present:
    ------
    L2 TLB1
    GT SSS UUU V I
    Row Logical Physical SS TLPID TID WIMGE XWR XWR F P V
    ----- ----------------- ------------------- -- ----- ----- ----- --- --- - - -
    0 c0000000-cfffffff 000000000-00fffffff 00 0 0 M XWR XWR 0 1 1
    1 d0000000-dfffffff 010000000-01fffffff 00 0 0 M XWR XWR 0 1 1
    2 e0000000-efffffff 020000000-02fffffff 00 0 0 M XWR XWR 0 1 1

    Actually this conditional code was used for two legacy functions:

    1: support KGDB to set break point.
    KGDB already dropped this; now uses its core write to set break point.

    2: io_block_mapping() to create TLB in segmentation size (not PAGE_SIZE)
    for device IO space.
    This use case is also removed from the latest PowerPC kernel.

    However, there may still be a use case for it in the future, like
    large user pages, so we can't remove it entirely. As an alternative,
    we match on all bits of _PAGE_USER instead of just any bits, so the
    case where just _PAGE_BAP_SR is set can't sneak through.

    With this done, the TLB appears without U having XWR as below:

    -------
    L2 TLB1
    GT SSS UUU V I
    Row Logical Physical SS TLPID TID WIMGE XWR XWR F P V
    ----- ----------------- ------------------- -- ----- ----- ----- --- --- - - -
    0 c0000000-cfffffff 000000000-00fffffff 00 0 0 M XWR 0 1 1
    1 d0000000-dfffffff 010000000-01fffffff 00 0 0 M XWR 0 1 1
    2 e0000000-efffffff 020000000-02fffffff 00 0 0 M XWR 0 1 1

    Signed-off-by: Tiejun Chen
    Signed-off-by: Paul Gortmaker
    Signed-off-by: Kumar Gala

    Paul Gortmaker
     
  • This patch adds support for MPC8308 P1M board.
    Supported devices:
    DUART
    Dual Ethernet
    NOR flash
    Both I2C controllers
    USB in peripheral mode
    PCI Express

    Signed-off-by: Ilya Yanok
    Signed-off-by: Kumar Gala

    Ilya Yanok
     
  • When we do an mpic_reset_core we need to make sure the dcache is flushed.

    Signed-off-by: Matthew McClintock
    Signed-off-by: Kumar Gala

    Matthew McClintock
     
  • Make kexec_down_cpus atmoic since it will be incremented by all cores as
    they are coming down.

    Remove duplicate calls to mpc85xx_smp_kexec_down, now it's called by the
    crash and normal kexec pathway only once.

    Increase the timeout to wait for other cores to shutdown.

    Signed-off-by: Matthew McClintock
    Signed-off-by: Kumar Gala

    Matthew McClintock
     
  • We no longer need to call this explicitly as a generic version is called
    by default.

    Signed-off-by: Matthew McClintock
    Signed-off-by: Kumar Gala

    Matthew McClintock
     
  • Right now just the kexec crash pathway turns turns off the interrupts.
    Pull that out and make a generic version for use elsewhere

    Signed-off-by: Matthew McClintock
    Signed-off-by: Kumar Gala

    Matthew McClintock
     
  • Register the __init and __exit functions in the PowerPC Book-E Watchdog
    driver as module entry/exit functions, and modify the Kconfig entry.

    Add a .release method for the PowerPC Book-E Watchdog driver, so that the
    watchdog is disabled when the driver is closed.

    Loosely based on original code from Jiang Yutang .

    Signed-off-by: Timur Tabi
    Signed-off-by: Kumar Gala

    Timur Tabi
     
  • Export the global variable 'ppc_tb_freq', so that modules (like the Book-E
    watchdog driver) can use it. To maintain consistency, ppc_proc_freq is
    changed to a GPL-only export. This is okay, because any module that needs
    this symbol should be an actual Linux driver, which must be GPL-licensed.

    Signed-off-by: Timur Tabi
    Acked-by: Josh Boyer
    Signed-off-by: Kumar Gala

    Timur Tabi
     
  • The following commit broke 83xx because it assumed the 83xx platforms
    exposed the "IMMR" address in BAR0 like the 85xx/86xx/QoriQ devices do:

    commit 3da34aae03d498ee62f75aa7467de93cce3030fd
    Author: Kumar Gala
    Date: Tue May 12 15:51:56 2009 -0500

    powerpc/fsl: Support unique MSI addresses per PCIe Root Complex

    However that is not true, so we have to search through the inbound
    window settings on 83xx to find which one matches the IMMR address to
    determine its PCI address.

    Reported-by: Ilya Yanok
    Signed-off-by: Kumar Gala

    Kumar Gala
     

13 Oct, 2010

18 commits

  • Replace EXTRA_CFLAGS with ccflags-y and EXTRA_AFLAGS with asflags-y.

    Signed-off-by: matt mooney
    Signed-off-by: Benjamin Herrenschmidt

    matt mooney
     
  • The default for llseek is changing, so we need
    explicit operations everywhere.

    Signed-off-by: Arnd Bergmann
    Cc: Jeremy Kerr
    Cc: linuxppc-dev@ozlabs.org
    Signed-off-by: Benjamin Herrenschmidt

    Arnd Bergmann
     
  • Current firmware only allows us to send IRQs to the first processor or
    all processors. We currently check to see if the passed in mask is equal
    to the all_mask, but the firmware is only considering whether the
    request is for the equivalent of the possible_mask. Thus, we think the
    request is for some subset of CPUs and only assign IRQs to the first CPU
    (on systems without irqbalance running) as evidenced by
    /proc/interrupts. By using possible_mask instead, we account for this
    and proper interleaving of interrupts occurs.

    Signed-off-by: Nishanth Aravamudan
    Signed-off-by: Benjamin Herrenschmidt

    Nishanth Aravamudan
     
  • Use set_dma_ops and remove unused oddly-named temp pointer sd.

    Signed-off-by: Milton Miller
    Signed-off-by: Nishanth Aravamudan
    Acked-by: Grant Likely
    Signed-off-by: Benjamin Herrenschmidt

    Nishanth Aravamudan
     
  • While looking at some code paths I came across this code that zeros
    memory then copies over the entire length.

    Signed-off-by: Milton Miller
    Signed-off-by: Nishanth Aravamudan
    Signed-off-by: Benjamin Herrenschmidt

    Nishanth Aravamudan
     
  • Release the TCE table as the XXX suggests, except on FW_FEATURE_ISERIES,
    where the tables are allocated globally and reused.

    Signed-off-by: Milton Miller
    Signed-off-by: Nishanth Aravamudan
    Signed-off-by: Benjamin Herrenschmidt

    Nishanth Aravamudan
     
  • The kernel doc for device_register (and device_initialize) very clearly
    state to call put_device not kfree after calling, even on error.

    Signed-off-by: Milton Miller
    Signed-off-by: Nishanth Aravamudan
    Acked-by: Grant Likely
    Signed-off-by: Benjamin Herrenschmidt

    Nishanth Aravamudan
     
  • The current check is wrong because it does not take the DMA offset intot
    account, and in the case of a driver which doesn't actually support
    64bits would falsely report that device as working.

    Signed-off-by: Milton Miller
    Signed-off-by: Nishanth Aravamudan
    Signed-off-by: Benjamin Herrenschmidt

    Nishanth Aravamudan
     
  • The table offset is in entries, each of which imply a dma address of
    an IOMMU page.

    Also, we should check the device can reach the whole IOMMU table.

    Signed-off-by: Milton Miller
    Signed-off-by: Nishanth Aravamudan
    Signed-off-by: Benjamin Herrenschmidt

    Nishanth Aravamudan
     
  • BUID_HI and BUID_LO are used to pass data to call_rtas, which expects
    ints or u32s. But the macro doesn't cast the return, so the result is
    still u64. Use the upper_32_bits and lower_32_bits macros that have been
    added to kernel.h.

    Found by getting printf format errors trying to debug print the args, no
    actual code change for 64 bit kernels where the macros are actually
    used.

    Signed-off-by: Milton Miller
    Signed-off-by: Nishanth Aravamudan
    Acked-by: Linas Vepstas
    Signed-off-by: Benjamin Herrenschmidt

    Nishanth Aravamudan
     
  • The function has an unsigned return type, but returns a negative constant
    to indicate an error condition. The result of calling the function is
    always stored in a variable of type (signed) int, and thus unsigned can be
    dropped from the return type.

    A sematic match that finds this problem is as follows:
    (http://coccinelle.lip6.fr/)

    //
    @exists@
    identifier f;
    constant C;
    @@

    unsigned f(...)
    { }
    //

    Signed-off-by: Julia Lawall
    Acked-by: Olof Johansson
    Signed-off-by: Benjamin Herrenschmidt

    Julia Lawall
     
  • In this case, a device_node structure is stored in another structure that
    is then freed without first decrementing the reference count of the
    device_node structure.

    The semantic match that finds this problem is as follows:
    (http://coccinelle.lip6.fr/)

    //
    @r exists@
    expression x;
    identifier f;
    position p1,p2;
    @@

    x@p1->f = \(of_find_node_by_path\|of_find_node_by_name\|of_find_node_by_phandle\|of_get_parent\|of_get_next_parent\|of_get_next_child\|of_find_compatible_node\|of_match_node\|of_find_node_by_type\|of_find_node_with_property\|of_find_matching_node\|of_parse_phandle\|of_node_get\)(...);
    ... when != of_node_put(x)
    kfree@p2(x)

    @script:python@
    p1 << r.p1;
    p2 << r.p2;
    @@
    cocci.print_main("call",p1)
    cocci.print_secs("free",p2)
    //

    Signed-off-by: Julia Lawall
    Signed-off-by: Benjamin Herrenschmidt

    Julia Lawall
     
  • Signed-off-by: Joe Perches
    Signed-off-by: Benjamin Herrenschmidt

    Joe Perches
     
  • Signed-off-by: Joe Perches
    Reviewed-by: Stephen Rothwell
    Signed-off-by: Benjamin Herrenschmidt

    Joe Perches
     
  • Enable partition migration in the kernel. To do this a new sysfs file,
    /sys/kernel/mobility/migration, is created. In order to initiate a migration
    the stream id (generated by the HMC managing the system) is written to this
    file.

    After a migration occurs, and what is the majority of this code, the device
    tree needs to be updated for the new system the partition is running on. This
    is done via the ibm,update-nodes and ibm,update-properties rtas calls which
    return information regarding which nodes and properties of the device tree
    are to be added/removed/updated.

    Signed-off-by: Nathan Fontenot
    Signed-off-by: Benjamin Herrenschmidt

    Nathan Fontenot
     
  • Export the rtas_ibm_suspend_me() routine. This is needed to perform
    partition migration in the kernel.

    Signed-off-by: Nathan Fontenot
    Signed-off-by: Benjamin Herrenschmidt

    Nathan Fontenot
     
  • Export routines associated with adding and removing device tree nodes on
    pseries needed for device tree updating.

    Signed-off-by: Nathan Fontenot
    Signed-off-by: Benjamin Herrenschmidt

    Nathan Fontenot
     
  • Benjamin Herrenschmidt
     

08 Oct, 2010

3 commits