02 Feb, 2015
16 commits
-
In general, uart module clock require it is great than 80Mhz to match 5Mbps
baud rate. When test below 14Mhz module clock, software reset cause state
machines off normal. And for i.MX6SL evk board low power test, it set uart
module clock to 4Mhz, which cause console port print out messy code.
The patch just is workaround to fix console issue.Signed-off-by: Fugang Duan
(cherry picked from commit d7061a8c6b17f1a0d9b7f161967d538b1a408e5c) -
In busfreq code, when switching between different busfreq mode,
the PLL2_BUS clk rate will be changed in asm code. But the kernel clock
tree is NOT aware of this change, so the clk tree information is NOT
updated timely. We must explicitly call imx_clk_set_rate() to update the
PLL2_BUS clk tree infomation.Signed-off-by: Bai Ping
(cherry picked from commit a8cf0e4633ee897b7efff715f889026262f7a027) -
When running an userspace program that does a 'tcflush(fd, TCIOFLUSH)' call
we still see the last received character in the URXD register afterwards.Clear UCR2_SRST bit so that the FIFO is flushed properly.
Since UCR2_SRST also resets some UART registers, we need to save and restore
some of them.Signed-off-by: Fabio Estevam
(cherry picked from commit 87a72b6a6367a714026d5f38207301e7f53b0aca) -
System may hang if cpufreq is updated during pu enable/disable flow, add cpufreq
mutex in before vddpu regulator enable/disable to make sure no any break happen.
Unfortunetly, there is no better way on v3.10 since both PU management and cpufreq
are based on regulator framework.
Another change is increasing cpufreq to the highest setpoint and then disable
cpufreq.That makes sure no any mutex OOps before reboot, such as cpufreq update thread
is killed after get cpufreq mutex while xPU driver fall into PU enable/disable flow.Signed-off-by: Anson Huang
Signed-off-by: Robin Gong
(cherry picked from commit a43de999958a30a04f1df13475bc69b432c05308) -
In non-linear_bypass_pp and non-tiled_bypass_pp modes, the triple fbdev frame
buffer would be rendered with video frames in turn. We need to fill all the
three frame buffers with black color before streaming on instead of filling only
one of them.Signed-off-by: Liu Ying
(cherry picked from commit e0155001082abc2432ec54ac86f56abbbb744fd3) -
Add an error check after mapping the SECVIO IRQ.
Signed-off-by: Victoria Milhoan
(cherry picked from commit 015acaecc54e6d78a2b266cf5588b974ed235a58) -
commit 738459e3f88538f2ece263424dafe5d91799e46b upstream.
If dma mapping for dma_addr_out fails, the descriptor memory is freed
but the previous dma mapping for dma_addr_in remains.
This patch resolves the missing dma unmap and groups resource
allocations at function start.Signed-off-by: Cristian Stoica
Signed-off-by: Herbert Xu
Signed-off-by: Greg Kroah-Hartman(cherry picked from commit 77204ef5865a366573b4ee87c74daf6361039b96)
(cherry picked from commit 04ed02fe44d3fbfe9e0ee0527718d7767f07d0d2) -
The hwrng output buffers (2) are cast inside of a a struct (caam_rng_ctx)
allocated in one DMA-tagged region. While the kernel's heap allocator
should place the overall struct on a cacheline aligned boundary, the 2
buffers contained within may not necessarily align. Consenquently, the ends
of unaligned buffers may not fully flush, and if so, stale data will be left
behind, resulting in small repeating patterns.This fix aligns the buffers inside the struct.
Note that not all of the data inside caam_rng_ctx necessarily needs to be
DMA-tagged, only the buffers themselves require this. However, a fix would
incur the expense of error-handling bloat in the case of allocation failure.Signed-off-by: Steve Cornelius
(cherry picked from commit 892f4439b5da36a447a16c8ea0474b51fc955274)
(cherry picked from commit c948b6c2b49a1e06fa94c88154583fc718312bd5) -
commit 307fd543f3d23f8f56850eca1b27b1be2fe71017 upstream.
Replace equivalent (and partially incorrect) scatter-gather functions
with ones from crypto-API.The replacement is motivated by page-faults in sg_copy_part triggered
by successive calls to crypto_hash_update. The following fault appears
after calling crypto_ahash_update twice, first with 13 and then
with 285 bytes:Unable to handle kernel paging request for data at address 0x00000008
Faulting instruction address: 0xf9bf9a8c
Oops: Kernel access of bad area, sig: 11 [#1]
SMP NR_CPUS=8 CoreNet Generic
Modules linked in: tcrypt(+) caamhash caam_jr caam tls
CPU: 6 PID: 1497 Comm: cryptomgr_test Not tainted
3.12.19-rt30-QorIQ-SDK-V1.6+g9fda9f2 #75
task: e9308530 ti: e700e000 task.ti: e700e000
NIP: f9bf9a8c LR: f9bfcf28 CTR: c0019ea0
REGS: e700fb80 TRAP: 0300 Not tainted
(3.12.19-rt30-QorIQ-SDK-V1.6+g9fda9f2)
MSR: 00029002 CR: 44f92024 XER: 20000000
DEAR: 00000008, ESR: 00000000GPR00: f9bfcf28 e700fc30 e9308530 e70b1e55 00000000 ffffffdd e70b1e54 0bebf888
GPR08: 902c7ef5 c0e771e2 00000002 00000888 c0019ea0 00000000 00000000 c07a4154
GPR16: c08d0000 e91a8f9c 00000001 e98fb400 00000100 e9c83028 e70b1e08 e70b1d48
GPR24: e992ce10 e70b1dc8 f9bfe4f4 e70b1e55 ffffffdd e70b1ce0 00000000 00000000
NIP [f9bf9a8c] sg_copy+0x1c/0x100 [caamhash]
LR [f9bfcf28] ahash_update_no_ctx+0x628/0x660 [caamhash]
Call Trace:
[e700fc30] [f9bf9c50] sg_copy_part+0xe0/0x160 [caamhash] (unreliable)
[e700fc50] [f9bfcf28] ahash_update_no_ctx+0x628/0x660 [caamhash]
[e700fcb0] [f954e19c] crypto_tls_genicv+0x13c/0x300 [tls]
[e700fd10] [f954e65c] crypto_tls_encrypt+0x5c/0x260 [tls]
[e700fd40] [c02250ec] __test_aead.constprop.9+0x2bc/0xb70
[e700fe40] [c02259f0] alg_test_aead+0x50/0xc0
[e700fe60] [c02241e4] alg_test+0x114/0x2e0
[e700fee0] [c022276c] cryptomgr_test+0x4c/0x60
[e700fef0] [c004f658] kthread+0x98/0xa0
[e700ff40] [c000fd04] ret_from_kernel_thread+0x5c/0x64Signed-off-by: Herbert Xu
Cc: Cristian Stoica
Signed-off-by: Greg Kroah-Hartman(cherry picked from commit c9ccfcc2d0e33b3390574b41facc54cba59dbf98)
(cherry picked from commit 3e2f6af66b8ad59ea1e4a47be9a3b5ba5c3e4a62) -
When the M4 core is enabled on i.MX6, the QSPI2 clk can't be gated,
otherwise, the M4 will hang. This patch add a check to make sure when
M4 is enabled, just skip the QSPI2 clk gating operations.Signed-off-by: Bai Ping
(cherry picked from commit e2f17323916eae636e63353d742c986227b72702)
(cherry picked from commit 60def702db2c083cc6c0486100a829d71dc74845) -
QSPI2/GPMI_IO share the same clock source but with the
different gate, need explicitely gate the QSPI2 & GPMI_IO
during the clock init phase according to the SOC design.The topo of the clock for the GPMI_IO and NAND as below:
mux --> pre divider --> post divider --gate-- >GPMI_IO
|-gate-- >QSPI2(Note: i.MX6SX:GPMI_NAND and GSPI2 is PINMUX conflicts.)
The SOC design spec required that if change the parent clock
of the GPMI_IO or QSPI2, need gate the GPMI_IO and QSPI2 first
otherwise, there will have some glitch which cause the divider
malfunciton. Thus, we need explicitely gate QSPI2 & GPMI_IO at
the clock initialization phase and then later on common clock
framework will gurantee that each time, the parent clock rate
changes after the child clock is disabled(gated).Signed-off-by: Jason Liu
(cherry picked from commit 7712fd2cfa2ba2d7577d2836cebd9ff7ac6d34a8)
(cherry picked from commit 110d63a5886e065e77a69f816216af044c096a44) -
QSPI may failed to alloc enough memory (256MB) for AHB read in
previous implementation, especially in 3G/1G memory layout kernel.
Dynamically alloc memory to avoid such issue.This implementation generally alloc 4MB memory for AHB read, it should
be enough for common scenarios, and the side effect (0.6% performance
drop) is minor.Previous implementation
root@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=1K count=32K
32768+0 records in
32768+0 records out
33554432 bytes (34 MB) copied, 2.16006 s, 15.5 MB/sroot@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=32M count=1
1+0 records in
1+0 records out
33554432 bytes (34 MB) copied, 1.43149 s, 23.4 MB/sAfter applied the patch
root@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=1K count=32K
32768+0 records in
32768+0 records out
33554432 bytes (34 MB) copied, 2.1743 s, 15.4 MB/sroot@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=32M count=1
1+0 records in
1+0 records out
33554432 bytes (34 MB) copied, 1.43158 s, 23.4 MB/sSigned-off-by: Allen Xu
(cherry picked from commit ebcd4437450c4f0075988ef9c8824e837546c70b) -
this is the enhanced fix for gpu kernel panic issue based on previous:
gpu causes kernel panic when running bonnie++ with suspend/resume.Date: Jan 14, 2015
Signed-off-by: Xianzhong
Acked-by: Jason Liu
(cherry picked from commit 5c8f06c77046e7ccca6a389af86431eb67e2b138) -
In function gckKERNEL_Dispatch, powerMutexAcquired is used to track
power mutex. It is missing from gcvHAL_WRITE_REGISTER. And in some
places return value of gckOS_AcquireMutex is not checked.Date: Dec 29, 2014
Signed-off-by: Zhenyong Chen
Acked-by: Jason Liu
(cherry picked from commit ee66831d2511f80416ddee8c79893c5e7d9cbad0) -
Only restore MII bus when MAC0 PHY is not available.
Signed-off-by: Fugang Duan
(cherry picked from commit 60d9d8ffd950947e52b5d99967f6741734bc5b03) -
AQAXiStatus register info is helpful to debug AXI BUS ERROR,
need dump this GPU register when AXI BUS ERROR happen.Date: Dec 03, 2014
Signed-off-by: Xianzhong
Acked-by: Jason Liu
(cherry picked from commit f92550c1310e339b3be4341b2032a60c1f0df280)
04 Jan, 2015
1 commit
-
This reverts commit 178bb7bed5b467463a3861aecdd5361ea9d295b7.
It causes the USB audio which defines quirk will be dead lock at its resume code
Signed-off-by: Peter Chen
24 Dec, 2014
1 commit
-
By previous implementation, there's the possibility that last picture remains
on screen when the program exits. This can be reproduced by not calling
STREAMOFF ioctl in v4l2 output application or just trying to kill the v4l2
output program. The driver has faults to handle this case, since it depends on
'pxp->s0_vbq.streaming' variable be true in close() function to call
pxp_streamoff() while the variable is set to 0 after the application calls
munmap(). The driver should call pxp_streamoff() even if the application
does not call STREAMOFF ioctl.This patch uses the local 'streaming' variable to track the streaming
status to fix this problem.Signed-off-by: Robby Cai
23 Dec, 2014
2 commits
-
On imx6sx, bit 17 and bit18 will power off/on VADC directly,
so read GPC_CNTR firstly before write to avoid touching other bits.Signed-off-by: Sandor Yu
(cherry picked from commit ce70fc330c33dd33a73e2f1c8d00f29ec4d68b1d) -
When this module removes, turn off all csi-related clocks
and also disable dummy disp-regulator in order to turn off disp-mix
to save power.Signed-off-by: Robby Cai
22 Dec, 2014
7 commits
-
This patch allows CAAM to be enabled as a wakeup source for the
Mega/Fast mix domain. If CAAM is enabled as a wakeup source, it
will continue to be powered on across Deep Sleep Mode (DSM). This
allows CAAM to be functional after the system resumes from DSM.Signed-off-by: Victoria Milhoan
(cherry picked from commit 290744e3b40a563319324e234fa5a65b49fd4d82) -
The CAAM driver prints a message for each algorithm it registers
with the Crypto API. This patch hides the messages unless debug is
enabled.Signed-off-by: Victoria Milhoan
(cherry picked from commit 84fcc913c4017d7c60ad19d07f277165b10e7848) -
added all supported math funtion on 8 byte boundary with
immediate flag bit set automaticallyadded MATH_SRC0_DPOVRD & MATH_SRC1_DPOVRD
The function/defines above are needed for creating descriptors
longer than 64 wordsSigned-off-by: Andrei Varvara
Reviewed-by: Phillips Kim-R1AAHA
Reviewed-by: Fleming Andrew-AFLEMING
Signed-off-by: Herbert Xu
(cherry picked from commit 3ebfa92f49a61a00e967112632ad10e92998bb75)
(cherry picked from commit 0df11f0e57b83eb5fc2efb61277e57dafbb804f5) -
Replace instances of of_irq_to_resource() with the simpler
equivalent irq_of_parse_and_map(). A similar patch was applied
previously, but lost due to later patches. Based on
upstream commit f7578496a671a96e501f16a5104893275e32c33a.Signed-off-by: Victoria Milhoan
(cherry picked from commit 9758f15682435ed7edbc98e02c01263e9f64f3c9) -
commit 4451d494b1910bf7b7f8381a637d0fe6d2142467 upstream.
buf_0 and buf_1 in caam_hash_state are not next to each other.
Accessing buf_1 is incorrect from &buf_0 with an offset of only
size_of(buf_0). The same issue is also with buflen_0 and buflen_1Signed-off-by: Cristian Stoica
Signed-off-by: Herbert Xu
Signed-off-by: Greg Kroah-Hartman(cherry picked from commit cad4e11a9778eee2e8c52e1df7bf1008fb49a580)
(cherry picked from commit 96e048ff8c7c62e2f1fe06f0da1fea791a220c0e) -
- phenomena: the name of the dev node of the thumb disk
inserted in the port of the pcie2usb device, would be
changed randomly after suspend resume on imx6sx.
- rootcause: PRST shouldn't be triggered during the suspend
resume on imx6sx pcie port.Signed-off-by: Richard Zhu
(cherry picked from commit b5ed6b9a8bf5ba7ce4dfe3a3aacdec9634397b6c) -
In order to save power consumption, do the
following actions when pcie is not used.
- turn off clocks on imx6q/dl.
- turn off clocks and power on imx6sxSigned-off-by: Richard Zhu
(cherry picked from commit e9796dfbae2a8b732022a6c96b3d7803099a70b5)
20 Dec, 2014
1 commit
-
Poweroff vadc analog and ext power when module remove.
Signed-off-by: Sandor Yu
19 Dec, 2014
9 commits
-
Enable USB as wakeup source if it is imx6sx and the usb device is connected.
We do this tricky thing for disable megafix off, since megafix control code
depends on wakeup source.If the usb device is connected, we want the connection is
not broken, and to support HSIC device since HSIC controller
does not support hot plug.It will not produce un-intended usb wakeup since the usb wakeup is controlled
by WIE bit in usb ctrl register, it is only enabled through /sys entry.Acked-by: Li Jun
Signed-off-by: Peter Chen -
Implement reset_resume callback so that the mixer values are properly
restored. Still no boot quirks are called, so it might not work well
on some devices.Signed-off-by: Takashi Iwai
-
We set both wartermark of txfifo and rxfifo 32 as half of fifo length 64.
That will cause easy rxfifo overflow:
If there is 31 bytes in rxfifo, rx script will wait the next dma request
(the 32th data come into the rxfifo) and schedule out to tx script. Once
tx script start to run, the rx script need to wait tx script finish even
if its priority higher than tx. Meanwhile, spi slave device may input
data continous, plus the rx data which triggered by new tx script(32 bytes).
That will quickly consume whole 64 bytes fifo, so we keep 16bytes availbale
even in the worst case new tx script triggered during two rx transfer. That
may slow down tx slightly, but better than overflow and RX DMA timeout.Signed-off-by: Robin Gong
(cherry picked from commit 16043ad0ad96aa04a90614e473aa17980af4b8af) -
Current ecspi rom script didn't take care of rxfifo overflow risk. Add new
ecspi tx script to check the rxfifo status, if it is near to full(>=48 bytes),
do not copy data to txfifo which will trigger data push into rxfifo. Because
rx script may not read rxfifo in time, we have to consider it.Signed-off-by: Robin Gong
(cherry picked from commit 17f472aa698aba0af5da4566df447e23306f4289) -
Add new ecspi tx sdma script in the head file.
Signed-off-by: Robin Gong
(cherry picked from commit 9ca3cf4f301dc6d4130624814e689b676125fd36) -
Sometimes the tail data can't trigger SDMA to read from rxfifo, or
SDMA miss the last dma request, in this case, DMA report RX timeout
and the rest tail data kept in rxfifo. Whatever, use pio read for the
tail rx data.Signed-off-by: Robin Gong
(cherry picked from commit 61fec9e4511e7626a2c5299f37c12cca95d12e88) -
Change dma timeout value with the transfer length if the length bigger than
1 MB.Signed-off-by: Robin Gong
(cherry picked from commit fb12a91a9ce6cd99d4c08483627ea0c94363ee08) -
We can only use page_address on memory that has been mapped using kmap,
when the buffer passed to the SPI has been allocated by vmalloc the page
has not necessarily been mapped through kmap. This means sometimes
page_address will return NULL causing the pointer we pass to sg_set_buf
to be invalid.As we only call page_address so that we can pass a virtual address to
sg_set_buf which will then immediately call virt_to_page on it, fix this
by calling sg_set_page directly rather then relying on the sg_set_buf
helper.Signed-off-by: Charles Keepax
Signed-off-by: Mark Brown
Cc: stable@vger.kernel.org
(cherry picked from commit c1aefbdd050e1fb15e92bcaf34d95b17ea952097)
(cherry picked from commit bf9cdf03f8d30db8e5c14645e1be9b49b0e945da) -
For the QSPI byte address not aligned in ROM code and kernel, we have to reset
power cycle to workaroud this issue. Use WDOG_B pin to trigger PWRON of pfuze.Signed-off-by: Robin Gong
(cherry picked from commit 86f82eadc612a746ab57760f78754e0619aa48b1)
18 Dec, 2014
1 commit
-
this crash issue is caused by kernel NULL pointer when access GPU database,
GPU database is shared by all kernels, it can be queried with any valid kernel.
this patch will find the valid kernel pointer to avoid GPU kernel crash.the crash backtrace with 'cat /sys/kernel/debug/gc/vidmem' on i.mx6sl:
[] (gckKERNEL_FindDatabase+0x8/0xec) from [] (vidmem_show+0x2c/0x60)
[] (vidmem_show+0x2c/0x60) from [] (seq_read+0x1dc/0x47c)
[] (seq_read+0x1dc/0x47c) from [] (vfs_read+0x98/0x144)
[] (vfs_read+0x98/0x144) from [] (SyS_read+0x3c/0x78)
[] (SyS_read+0x3c/0x78) from [] (ret_fast_syscall+0x0/0x30)Date: Dec 18, 2014
Signed-off-by: Xianzhong
Acked-by: Jason Liu
(cherry picked from commit 5b59e9d67ee1ce25e43fcb8934fcf0c75abfd0e3)
17 Dec, 2014
2 commits
-
Since commit commit 560a64749d1dd0ff ("ENGR00318936-2 input: keyboard: imx:
remove usless release interrupt enabled) the following problem happens:- Keep any keypad key pressed
- Enter low power mode via "echo mem > /sys/power/state"
- Then we are no longer able to wake-up the system via the keypadThe reason for this behaviour is that the KRIE (Release Interrupt) is not
enabled.In order to fix this problem, we should enable KRIE when a key is pressed
(KPKD bit is set) or enable KDIE when no key is pressed (KPKR is set).This way we will always have a valid source of keypad interrupt no matter if
the system entered low power mode while a keypad key was pressed or not.Signed-off-by: Fabio Estevam
-
SSI and SSI_IPG are controlled by the same clock gating bits, so register
them with imx_clk_gate2_shared.Signed-off-by: Shengjiu Wang
