07 Jan, 2012
40 commits
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Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus
resource fixups. This fixes the problem of "early" and "header" quirks
seeing incorrect root bus resources.CC: Paul Mundt
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Convert from pci_create_bus() to pci_create_root_bus(). This way the root
bus resources are correct immediately. This patch doesn't fix a problem
because powerpc fixed the resources before scanning the bus, but it makes
powerpc more consistent with other architectures.v2: fix build error with resource pointer passing
CC: Benjamin Herrenschmidt
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
No functional change. This is so we can use pcibios_phb_map_io_space()
before we have a struct pci_bus.v2: fix map io phb typo
CC: Benjamin Herrenschmidt
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
CC: Benjamin Herrenschmidt
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Supply root bus resources to pci_create_root_bus() so they're correct
immediately. This fixes the problem of "early" and "header" quirks seeing
incorrect root bus resources.CC: linux-parisc@vger.kernel.org
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
No functional change here; just converting from pci_scan_bus_parented()
to pci_create_bus() to make a future patch simpler.CC: linux-parisc@vger.kernel.org
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
This moves the truncate_pat_collision() call out of the pcibios_fixup_bus()
path so that when a future patch builds a list of root bus resources for
pci_create_bus(), it can use the truncated LMMIO range.truncate_pat_collision() used to be called in this path:
pci_scan_bus_parented
pci_create_bus
pci_scan_child_bus
pcibios_fixup_bus
lba_fixup_bus
truncate_pat_collisionAll of the PAT and lba_dev resource setup must be done before we call
pci_scan_bus_parented(), so it should be safe to move the
truncate_pat_collision() to just before pci_scan_bus_parented().CC: linux-parisc@vger.kernel.org
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Supply root bus resources to pci_create_root_bus() so they're correct
immediately. This fixes the problem of "early" and "header" quirks seeing
incorrect root bus resources.CC: linux-parisc@vger.kernel.org
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
No functional change here; just converting from pci_scan_bus_parented()
to pci_create_bus() to make a future patch simpler.CC: linux-parisc@vger.kernel.org
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus
resource fixups. This fixes the problem of "early" and "header" quirks
seeing incorrect root bus resources.CC: David Howells
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus
resource fixups. This fixes the problem of "early" and "header" quirks
seeing incorrect root bus resources.Based on original patch by Deng-Cheng Zhu.
Reference: https://lkml.org/lkml/2011/8/26/89
CC: Ralf Baechle
Signed-off-by: Deng-Cheng Zhu
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Microblaze doesn't need to replace pci_scan_child_bus() or do anything
special before pci_bus_add_devices(), so we can use the more generic PCI
path in pci_scan_root_bus().CC: Michal Simek
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Convert from pci_create_bus() to pci_create_root_bus(). This way the root
bus resources are correct immediately. This patch doesn't fix a problem
because microblaze fixed the resources before scanning the bus, but it makes
microblaze more consistent with other architectures. It also allows us to
use the pci_scan_root_bus() path safely.CC: Michal Simek
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
CC: Michal Simek
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
The pci_bus_for_each_resource() iterator sets "res" itself, so there's
no need to look it up in the bus->resource[] table.Logically part of 89a74ecccd and 8a66da71fa.
CC: Michal Simek
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Convert from pci_create_bus() to pci_create_root_bus(). This way the root
bus resources are correct immediately. This fixes the problem of "early"
and "header" quirks seeing incorrect root bus resources.We can't use pci_scan_root_bus() because, like x86, ACPI hotplug currently
requires pci_bus_add_devices() in a separate host bridge .start() method.v2: fix compile error by using window resource pointer instead
CC: Tony Luck
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
This doesn't change any functionality, but it makes a subsequent patch
slightly simpler.CC: Tony Luck
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus
resource fixups. This fixes the problem of "early" and "header" quirks
seeing incorrect root bus resources.Note that peer root buses are scanned with pci_scan_bus() (which is now
deprecated), so they have the default ioport_resource and iomem_resource
resources. This is unchanged from before, but these resources are
incorrect, and I don't know how to discover the correct ones.CC: David Howells
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus
resource fixups. This fixes the problem of "early" and "header" quirks
seeing incorrect root bus resources.CC: Russell King
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus
resource fixups. This fixes the problem of "early" and "header" quirks
seeing incorrect root bus resources.v2: fix up conversion
CC: linux-alpha@vger.kernel.org
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Users of pci_scan_bus_parented() should be converted to use either
pci_scan_root_bus() (preferred, but also calls pci_bus_add_devices)
or
pci_create_root_bus()
pci_scan_child_bus()Since pci_scan_bus_parented(), I'm marking it deprecated now and will
actually remove it later.Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
This converts pci_scan_bus_parented() to use pci_create_root_bus()
instead of pci_create_bus(). The new bus still has the default (incorrect)
resources, so this patch doesn't help fix that problem, but it does remove
one more use of pci_create_bus().Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
I plan to deprecate pci_scan_bus_parented(), so use pci_create_root_bus()
directly instead. pci_scan_bus() itself will be removed as soon as all
callers are gone, so this is just an interim step.v2: export pci_scan_bus
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
"Early" and "header" quirks often use incorrect bus resources because they
see the default resources assigned by pci_create_bus(), before the
architecture fixes them up (typically in pcibios_fixup_bus()). Regions
reserved by these quirks end up with the wrong parents.Here's the standard path for scanning a PCI root bus:
pci_scan_bus or pci_scan_bus_parented
pci_create_bus
Signed-off-by: Jesse Barnes -
pci_create_bus() assigns ioport_resource and iomem_resource as the default
bus resources, i.e., the entire address space. Architectures fix these
later, typically in pcibios_fixup_bus() or after pci_scan_bus_parented()
returns, but code that runs in the interim sees incorrect resource
information.This patch adds a new pci_create_root_bus() that sets the bus resources
correctly from a supplied list of resources.I intend to remove pci_create_bus() after changing all callers.
Based on original patch by Deng-Cheng Zhu.
Reference: http://www.spinics.net/lists/mips/msg41654.html
Reference: https://lkml.org/lkml/2011/8/26/88
Signed-off-by: Deng-Cheng Zhu
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Show the bus number and resources for every root bus we create. This
will become more interesting when we supply the correct resources
instead of using the defaults (ioport_resource and iomem_resource).Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
We'd like to supply a list of resources when we create a new PCI bus,
e.g., the root bus under a PCI host bridge. These are helpers for
constructing that list.These are exported because the plan is to replace this exported interface:
pci_scan_bus_parented()
with this one:
pci_add_resource(resources, ...)
pci_scan_root_bus(..., resources)Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
The SRIOV capability, namely page size and total_vfs of a device are
configured during enumeration phase of the device. This can potentially
interfere with the PCI operations of the platform, if the IOV capability
of the device is not enabled.The following patch postpones the configuration of the IOV capability of
the device to a later point, when the IOV capability is explicitly
enabled by the device driver.The patch is tested on x86 and power platform.
Tested-by: Donald Dutile
Signed-off-by: Ram Pai
Signed-off-by: Jesse Barnes -
During debugging pcie hotplug with SRIOV with pcie switch, I found
pci_stop_bus_device() is called several times for some child devices.So change original pci_remove_bus_device() to __pci_remove_bus_device(),
and make it only do remove work, and add a new pci_remove_bus_device
that calls pci_stop_bus_device() one time, and then call
__pci_remove_bus_device().Signed-off-by: Yinghai Lu
Signed-off-by: Jesse Barnes -
Commit 24d9b70b8c679264756a6980e668b96b3f964826 (x86: Use PCI method
for enabling AMD extended config space before MSR method) added a
message when IO access to PCI ECS was enabled via access to the NB_CFG
PCI register. This can lead to a bogus message like[ 0.365177] Extended Config Space enabled on 0 nodes
which is misleading because IO ECS access is subsequently enabled for
AMD CPUs (that support this) by modifying the corresponding NB_CFG
MSR.Furthermore it's not "Extended Config Space" that is enabled by this
register setting. It's the IO access that is enabled for extended
configruation space.IMHO the ambiguous message needs to be cancelled.
Cc: Jan Beulich
Cc: Robert Richter
Signed-off-by: Andreas Herrmann
Signed-off-by: Jesse Barnes -
The latency timer is read-only and hardwired to zero for all PCIe
devices, both Type 0 and Type 1, so don't bother trying to update it
and cluttering the dmesg log with meaningless "setting latency timer
to 64" messages.Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes -
This patch removes x86's architecture-specific 'pcibios_set_master()'
routine and lets the default PCI core based implementation handle PCI
device 'latency timer' setup.No functional change.
Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes -
This patch removes sh's architecture-specific 'pcibios_set_master()'
routine and lets the default PCI core based implementation handle PCI
device 'latency timer' setup.No functional change.
Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes -
This patch removes mn10300's architecture-specific 'pcibios_set_master()'
routine for ASB2305 and lets the default PCI core based implementation
handle PCI device 'latency timer' setup.No functional change.
Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes -
This patch removes MIPS' architecture-specific 'pcibios_set_master()'
routine and lets the default PCI core based implementation handle PCI
device 'latency timer' setup.No functional change.
Acked-by: Ralf Baechle
Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes -
This patch removes frv's architecture-specific 'pcibios_set_master()'
routine and lets the default PCI core based implementation handle PCI
device 'latency timer' setup.No functional change.
Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes -
The 'latency timer' of PCI devices, both Type 0 and Type 1,
is setup in architecture-specific code [see: 'pcibios_set_master()'].
There are two approaches being taken by all the architectures - check
if the 'latency timer' is currently set between 16 and 255 and if not
bring it within bounds, or, do nothing (and then there is the
gratuitously different PA-RISC implementation).There is nothing architecture-specific about PCI's 'latency timer' so
this patch pulls its setup functionality up into the PCI core by
creating a generic 'pcibios_set_master()' function using the '__weak'
attribute which can be used by all architectures as a default which,
if necessary, can then be over-ridden by architecture-specific code.No functional change.
Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes -
This patch converts Xtensa's architecture-specific
'pcibios_set_master()' routine to a non-inlined function. This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.Converting 'pci_bios_set_master()' to a non-inlined function will
allow Xtensa's 'pcibios_set_master()' implementation to remain
architecture-specific after the generic version is introduced and
thus, not change current behavior.No functional change.
Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes -
This patch converts UniCore's architecture-specific
'pcibios_set_master()' routine to a non-inlined function. This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.Converting 'pci_bios_set_master()' to a non-inlined function will
allow UniCore's 'pcibios_set_master()' implementation to remain
architecture-specific after the generic version is introduced and
thus, not change current behavior.No functional change.
Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes -
This patch converts TILE's architecture-specific 'pcibios_set_master()'
routine to a non-inlined function. This will allow follow on patches
to create a generic 'pcibios_set_master()' function using the '__weak'
attribute which can be used by all architectures as a default which,
if necessary, can then be over-ridden by architecture-specific code.Converting 'pci_bios_set_master()' to a non-inlined function will
allow TILE's 'pcibios_set_master()' implementation to remain
architecture-specific after the generic version is introduced and
thus, not change current behavior.No functional change.
Acked-by: Chris Metcalf
Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes
