29 Apr, 2019
1 commit
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This irqchip driver uses the hwspinlock framework (coprocessor HW regs
access concurrency) for the stm32mp1-exti device.
Hence, this driver needs to handle the hwspinlock driver dependency
using the deferred probe mechanism which requires to move this driver
into a platform one with a probe() ops.
This applies only for the device which is "st,stm32mp1-exti" compatible,
the management of the other devices (st,stm32h7-exti / st,stm32-exti) is
kept unchanged (use IRQCHIP_DECLARE)Signed-off-by: Fabien Dessenne
Signed-off-by: Marc Zyngier
21 Mar, 2019
3 commits
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…rm-platforms into irq/urgent
Pull irqchip updates for 5.1 from Marc Zyngier:
- irqsteer error handling fix
- GICv3 range coalescing fix
- stm32 coprocessor coexistence fixes
- mbigen MSI teardown fix
- non-DT secondary GIC infrastructure removed
- various cleanups (brcmstb-l2, mmp)
- new DT bindings (r8a774c0) -
The rising configuration status register (rtsr) is not banked.
As it is shared with the co-processor, it should not be written at probe
time, else the co-processor configuration will be lost.Fixes: f9fc1745501e ("irqchip/stm32: Add host and driver data structures")
Signed-off-by: Fabien Dessenne
Signed-off-by: Marc Zyngier -
Falling and rising configuration and status registers are not banked.
As they are shared with M4 co-processor, they should not be cleared
at probe time, else M4 co-processor configuration will be lost.Fixes: f9fc1745501e ("irqchip/stm32: Add host and driver data structures")
Signed-off-by: Loic Pallardy
Signed-off-by: Fabien Dessenne
Signed-off-by: Marc Zyngier
18 Jan, 2019
1 commit
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Domain translate function is needed to recover irq
configuration parameters from DT nodeFixes: 927abfc4461e ("irqchip/stm32: Add stm32mp1 support with hierarchy domain")
Signed-off-by: Loic Pallardy
Signed-off-by: Marc Zyngier
18 Dec, 2018
1 commit
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If a hwspinlock is defined in device tree use it to protect
configuration registers.Do not request for hwspinlock during the exti driver init since the
hwspinlock driver is not probed yet at that stage and the exti driver
does not support deferred probe.
Instead of this, postpone the hwspinlock request at the first time the
hwspinlock is actually needed.Use the hwspin_trylock_raw() API which is the most appropriated here
Indeed:
- hwspin_lock_() calls are under spin_lock protection (chip_data->rlock
or gc->lock).
- the _timeout() API relies on jiffies count which won't work if IRQs
are disabled which is the case here (a large part of the IRQ setup is
done atomically (see irq/manage.c))
As a consequence implement the retry/timeout lock from here. And since
all of this is done atomically, reduce the timeout delay to 1 ms.Signed-off-by: Benjamin Gaignard
Signed-off-by: Fabien Dessenne
Signed-off-by: Marc Zyngier
13 Dec, 2018
1 commit
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In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.Signed-off-by: Yangtao Li
Signed-off-by: Marc Zyngier
24 Aug, 2018
1 commit
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…arm-platforms into irq/urgent
Pull irqchip updates for 4.19, take #2 from Marc Zyngier:
- bcm7038: compilation fix for !SMP
- stm32: fix teardown on probe error
- s3c24xx: fix compilation warning
- renesas-irqc: r8a774a1 support
- tango: chained irq setup simplification
- gic-v3: allow wake-up sources
13 Aug, 2018
1 commit
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If there are any errors in stm32_exti_host_init() then it leads to a
NULL dereference in the callers. The function should clean up after
itself.Fixes: f9fc1745501e ("irqchip/stm32: Add host and driver data structures")
Reviewed-by: Ludovic Barre
Signed-off-by: Dan Carpenter
Signed-off-by: Marc Zyngier
19 Jul, 2018
1 commit
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This patch fixes a datasheet issue, in the draft version the "exti0"
was not connected whereas is it.Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier
06 Jun, 2018
1 commit
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A CONFIG_SMP=n build emits a harmless compile-time warning:
drivers/irqchip/irq-stm32-exti.c:495:12: error: 'stm32_exti_h_set_affinity' defined but not used [-Werror=unused-function]
The #ifdef is inconsistent here, and it's better to use an IS_ENABLED() check
that lets the compiler silently drop that function.Fixes: 927abfc4461e ("irqchip/stm32: Add stm32mp1 support with hierarchy domain")
Signed-off-by: Arnd Bergmann
Signed-off-by: Thomas Gleixner
Reviewed-by: Ludovic Barre
Cc: Rob Herring
Cc: Benjamin Gaignard
Cc: Radoslaw Pietrzyk
Cc: Jason Cooper
Cc: Marc Zyngier
Cc: linux-arm-kernel@lists.infradead.org
Cc: Maxime Coquelin
Cc: Alexandre Torgue
Link: https://lkml.kernel.org/r/20180605114347.1347128-1-arnd@arndb.de
24 May, 2018
8 commits
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This patch adds suspend/resume feature for exti hierarchy domain.
-suspend function sets wake_active into imr of each banks
-resume function restores the mask_cache interrupt into
imr of each banksSigned-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier -
Exti controller has been differently integrated on stm32mp1 SoC.
A parent irq has only one external interrupt. A hierachy domain could
be used. Handlers are call by parent, each parent interrupt could be
masked and unmasked according to the needs.Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier -
This patch prepares functions which could be reused by
next variant of stm32 exti controller.Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier -
This patch adds host and driver data structures to support
different stm32 exti controllers with variants.Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier -
This patch adds suspend feature.
-Use default irq_set_wake function to store wakeup request.
-Suspend function set wake_active into imr of each bank
and save rising/falling trigger registers.
-Resume function restore the mask_cache interrupt into
imr of each bank and restore rising/falling trigger registers.Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier -
This patch adds support of rising/falling pending registers.
Falling pending register (fpr) is needed for next revision.Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier -
-WARNING: struct irq_domain_ops should normally be const
-CHECK: Alignment should match open parenthesisSigned-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier -
- In stm32_exti_alloc function, discards irq_domain_set_info
with handle_simple_irq. This overwrite the setting defined while init
of generic chips. Exti controller manages edge irq type.
- Removes acking in chained irq handler as this is done by
irq_chip itself inside handle_edge_irq
- removes unneeded irq_domain_ops.xlate callbackAcked-by: Ludovic Barre
Tested-by: Ludovic Barre
Signed-off-by: Radoslaw Pietrzyk
Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier
29 Jan, 2018
1 commit
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Uniformize STMicroelectronics copyrights header and add SPDX identifier
CC: Maxime Coquelin
Signed-off-by: Benjamin Gaignard
Signed-off-by: Thomas Gleixner
Acked-by: Alexandre TORGUE
Acked-by: Maxime Coquelin
Cc: jason@lakedaemon.net
Cc: marc.zyngier@arm.com
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lkml.kernel.org/r/20171130084500.23439-1-benjamin.gaignard@st.com
07 Nov, 2017
4 commits
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Move irq_set_wake on interrupt mask, needed to wake up from
low power mode as the event mask is not able to do so.Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier -
-After cold boot, imr default value depends on hardware configuration.
-After hot reboot the registers must be cleared to avoid residue.Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier -
stm32h7 has up to 96 inputs
(3 banks of 32 inputs max).Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier -
-Prepare to manage multi-bank of external interrupts
(N banks of 32 inputs).
-Prepare to manage registers offsets by compatible
(registers offsets could be different follow per stm32 platform).Signed-off-by: Ludovic Barre
Signed-off-by: Marc Zyngier
23 Aug, 2017
1 commit
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Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.Cc: Thomas Gleixner
Cc: Jason Cooper
Cc: Lee Jones
Cc: Stefan Wahren
Cc: Florian Fainelli
Cc: Ray Jui
Cc: Scott Branden
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: Sylvain Lemieux
Cc: Maxime Coquelin
Cc: Chen-Yu Tsai
Cc: Thierry Reding
Cc: Jonathan Hunter
Cc: Michal Simek
Cc: "Sören Brinkmann"
Cc: linux-rpi-kernel@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-tegra@vger.kernel.org
Acked-by: Eric Anholt
Acked-by: Baruch Siach
Acked-by: Vladimir Zapolskiy
Acked-by: Matthias Brugger
Acked-by: Alexandre Torgue
Acked-by: Maxime Ripard
Signed-off-by: Rob Herring
Signed-off-by: Marc Zyngier
21 Sep, 2016
1 commit
-
The STM32 external interrupt controller consists of edge detectors that
generate interrupts requests or wake-up events.Each line can be independently configured as interrupt or wake-up source,
and triggers either on rising, falling or both edges. Each line can also
be masked independently.Originally-from: Maxime Coquelin
Signed-off-by: Alexandre TORGUE
Cc: Mark Rutland
Cc: devicetree@vger.kernel.org
Cc: Daniel Thompson
Cc: Jason Cooper
Cc: arnd@arndb.de
Cc: Marc Zyngier
Cc: bruherrera@gmail.com
Cc: Linus Walleij
Cc: linux-gpio@vger.kernel.org
Cc: Rob Herring
Cc: lee.jones@linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1474387259-18926-3-git-send-email-alexandre.torgue@st.com
Signed-off-by: Thomas Gleixner